Commit d2c19e89 authored by Pandith N's avatar Pandith N Committed by Andy Shevchenko

gpio: tangier: Introduce Intel Tangier GPIO driver

Intel Elkhart Lake and Merrifield platforms have same GPIO IP.
Intel Tangier implements the common GPIO functionalities for both
Elkhart Lake and Merrifield platforms.
Signed-off-by: default avatarPandith N <pandith.n@intel.com>
Co-developed-by: default avatarRaag Jadav <raag.jadav@intel.com>
Signed-off-by: default avatarRaag Jadav <raag.jadav@intel.com>
Co-developed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent 380c7ba3
...@@ -10287,6 +10287,7 @@ F: drivers/gpio/gpio-ml-ioh.c ...@@ -10287,6 +10287,7 @@ F: drivers/gpio/gpio-ml-ioh.c
F: drivers/gpio/gpio-pch.c F: drivers/gpio/gpio-pch.c
F: drivers/gpio/gpio-sch.c F: drivers/gpio/gpio-sch.c
F: drivers/gpio/gpio-sodaville.c F: drivers/gpio/gpio-sodaville.c
F: drivers/gpio/gpio-tangier.c
INTEL GVT-g DRIVERS (Intel GPU Virtualization) INTEL GVT-g DRIVERS (Intel GPU Virtualization)
M: Zhenyu Wang <zhenyuw@linux.intel.com> M: Zhenyu Wang <zhenyuw@linux.intel.com>
......
...@@ -619,6 +619,14 @@ config GPIO_SYSCON ...@@ -619,6 +619,14 @@ config GPIO_SYSCON
help help
Say yes here to support GPIO functionality though SYSCON driver. Say yes here to support GPIO functionality though SYSCON driver.
config GPIO_TANGIER
tristate
select GPIOLIB_IRQCHIP
help
GPIO support for Intel Tangier and compatible platforms.
If built as a module its name will be gpio-tangier.
config GPIO_TB10X config GPIO_TB10X
bool bool
select GPIO_GENERIC select GPIO_GENERIC
......
...@@ -145,6 +145,7 @@ obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o ...@@ -145,6 +145,7 @@ obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o
obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o
obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o
obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o
obj-$(CONFIG_GPIO_TANGIER) += gpio-tangier.o
obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o
obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o
obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o
......
This diff is collapsed.
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Intel Tangier GPIO functions
*
* Copyright (c) 2016, 2021, 2023 Intel Corporation.
*
* Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Pandith N <pandith.n@intel.com>
* Raag Jadav <raag.jadav@intel.com>
*/
#ifndef _GPIO_TANGIER_H_
#define _GPIO_TANGIER_H_
#include <linux/gpio/driver.h>
#include <linux/spinlock_types.h>
#include <linux/types.h>
struct device;
struct tng_gpio_context;
/**
* struct tng_wake_regs - Platform specific wake registers
* @gwmr: Wake mask
* @gwsr: Wake source
* @gsir: Secure input
*/
struct tng_wake_regs {
u32 gwmr;
u32 gwsr;
u32 gsir;
};
/**
* struct tng_gpio_pinrange - Map pin numbers to gpio numbers
* @gpio_base: Starting GPIO number of this range
* @pin_base: Starting pin number of this range
* @npins: Number of pins in this range
*/
struct tng_gpio_pinrange {
unsigned int gpio_base;
unsigned int pin_base;
unsigned int npins;
};
#define GPIO_PINRANGE(gstart, gend, pstart) \
(struct tng_gpio_pinrange) { \
.gpio_base = (gstart), \
.pin_base = (pstart), \
.npins = (gend) - (gstart) + 1, \
}
/**
* struct tng_gpio_pin_info - Platform specific pinout information
* @pin_ranges: Pin to GPIO mapping
* @nranges: Number of pin ranges
* @name: Respective pinctrl device name
*/
struct tng_gpio_pin_info {
const struct tng_gpio_pinrange *pin_ranges;
unsigned int nranges;
const char *name;
};
/**
* struct tng_gpio_info - Platform specific GPIO and IRQ information
* @base: GPIO base to start numbering with
* @ngpio: Amount of GPIOs supported by the controller
* @first: First IRQ to start numbering with
*/
struct tng_gpio_info {
int base;
u16 ngpio;
unsigned int first;
};
/**
* struct tng_gpio - Platform specific private data
* @chip: Instance of the struct gpio_chip
* @reg_base: Base address of MMIO registers
* @irq: Interrupt for the GPIO device
* @lock: Synchronization lock to prevent I/O race conditions
* @dev: The GPIO device
* @ctx: Context to be saved during suspend-resume
* @wake_regs: Platform specific wake registers
* @pin_info: Platform specific pinout information
* @info: Platform specific GPIO and IRQ information
*/
struct tng_gpio {
struct gpio_chip chip;
void __iomem *reg_base;
int irq;
raw_spinlock_t lock;
struct device *dev;
struct tng_gpio_context *ctx;
struct tng_wake_regs wake_regs;
struct tng_gpio_pin_info pin_info;
struct tng_gpio_info info;
};
int devm_tng_gpio_probe(struct device *dev, struct tng_gpio *gpio);
int tng_gpio_suspend(struct device *dev);
int tng_gpio_resume(struct device *dev);
#endif /* _GPIO_TANGIER_H_ */
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