Commit d2caa3ce authored by Tom Huynh's avatar Tom Huynh Committed by Scott Wood

powerpc/perf: fix fsl_emb_pmu_start to write correct pmc value

PMCs on PowerPC increases towards 0x80000000 and triggers an overflow
interrupt when the msb is set to collect a sample. Therefore, to setup
for the next sample collection, pmu_start should set the pmc value to
0x80000000 - left instead of left which incorrectly delays the next
overflow interrupt. Same as commit 9a45a940 ("powerpc/perf:
power_pmu_start restores incorrect values, breaking frequency events")
for book3s.
Signed-off-by: default avatarTom Huynh <tom.huynh@freescale.com>
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent 238cac16
...@@ -389,6 +389,7 @@ static void fsl_emb_pmu_del(struct perf_event *event, int flags) ...@@ -389,6 +389,7 @@ static void fsl_emb_pmu_del(struct perf_event *event, int flags)
static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags) static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
{ {
unsigned long flags; unsigned long flags;
unsigned long val;
s64 left; s64 left;
if (event->hw.idx < 0 || !event->hw.sample_period) if (event->hw.idx < 0 || !event->hw.sample_period)
...@@ -405,7 +406,10 @@ static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags) ...@@ -405,7 +406,10 @@ static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
event->hw.state = 0; event->hw.state = 0;
left = local64_read(&event->hw.period_left); left = local64_read(&event->hw.period_left);
write_pmc(event->hw.idx, left); val = 0;
if (left < 0x80000000L)
val = 0x80000000L - left;
write_pmc(event->hw.idx, val);
perf_event_update_userpage(event); perf_event_update_userpage(event);
perf_pmu_enable(event->pmu); perf_pmu_enable(event->pmu);
......
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