Commit d32d9864 authored by Mats Randgaard's avatar Mats Randgaard Committed by Mauro Carvalho Chehab

[media] Driver for Toshiba TC358743 HDMI to CSI-2 bridge

The driver is tested on our hardware and all the implemented features
works as expected.

Missing features:
- CEC support
- HDCP repeater support
- IR support
Signed-off-by: default avatarMats Randgaard <matrandg@cisco.com>
[hans.verkuil@cisco.com: updated copyright year to 2015]
[hans.verkuil@cisco.com: update confusing confctl_mutex comment]
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent bde2b96d
...@@ -10319,6 +10319,13 @@ F: drivers/char/toshiba.c ...@@ -10319,6 +10319,13 @@ F: drivers/char/toshiba.c
F: include/linux/toshiba.h F: include/linux/toshiba.h
F: include/uapi/linux/toshiba.h F: include/uapi/linux/toshiba.h
TOSHIBA TC358743 DRIVER
M: Mats Randgaard <matrandg@cisco.com>
L: linux-media@vger.kernel.org
S: Maintained
F: drivers/media/i2c/tc358743*
F: include/media/tc358743.h
TMIO MMC DRIVER TMIO MMC DRIVER
M: Ian Molton <ian@mnementh.co.uk> M: Ian Molton <ian@mnementh.co.uk>
L: linux-mmc@vger.kernel.org L: linux-mmc@vger.kernel.org
......
...@@ -287,6 +287,15 @@ config VIDEO_SAA711X ...@@ -287,6 +287,15 @@ config VIDEO_SAA711X
To compile this driver as a module, choose M here: the To compile this driver as a module, choose M here: the
module will be called saa7115. module will be called saa7115.
config VIDEO_TC358743
tristate "Toshiba TC358743 decoder"
depends on VIDEO_V4L2 && I2C
---help---
Support for the Toshiba TC358743 HDMI to MIPI CSI-2 bridge.
To compile this driver as a module, choose M here: the
module will be called tc358743.
config VIDEO_TVP514X config VIDEO_TVP514X
tristate "Texas Instruments TVP514x video decoder" tristate "Texas Instruments TVP514x video decoder"
depends on VIDEO_V4L2 && I2C depends on VIDEO_V4L2 && I2C
......
...@@ -78,3 +78,4 @@ obj-$(CONFIG_VIDEO_AK881X) += ak881x.o ...@@ -78,3 +78,4 @@ obj-$(CONFIG_VIDEO_AK881X) += ak881x.o
obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o
obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o
obj-$(CONFIG_VIDEO_OV2659) += ov2659.o obj-$(CONFIG_VIDEO_OV2659) += ov2659.o
obj-$(CONFIG_VIDEO_TC358743) += tc358743.o
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/*
* tc358743 - Toshiba HDMI to CSI-2 bridge
*
* Copyright 2015 Cisco Systems, Inc. and/or its affiliates. All rights
* reserved.
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
/*
* References (c = chapter, p = page):
* REF_01 - Toshiba, TC358743XBG (H2C), Functional Specification, Rev 0.60
* REF_02 - Toshiba, TC358743XBG_HDMI-CSI_Tv11p_nm.xls
*/
#ifndef _TC358743_
#define _TC358743_
enum tc358743_ddc5v_delays {
DDC5V_DELAY_0_MS,
DDC5V_DELAY_50_MS,
DDC5V_DELAY_100_MS,
DDC5V_DELAY_200_MS,
};
enum tc358743_hdmi_detection_delay {
HDMI_MODE_DELAY_0_MS,
HDMI_MODE_DELAY_25_MS,
HDMI_MODE_DELAY_50_MS,
HDMI_MODE_DELAY_100_MS,
};
struct tc358743_platform_data {
/* System clock connected to REFCLK (pin H5) */
u32 refclk_hz; /* 26 MHz, 27 MHz or 42 MHz */
/* DDC +5V debounce delay to avoid spurious interrupts when the cable
* is connected.
* Sets DDC5V_MODE in register DDC_CTL.
* Default: DDC5V_DELAY_0_MS
*/
enum tc358743_ddc5v_delays ddc5v_delay;
bool enable_hdcp;
/*
* The FIFO size is 512x32, so Toshiba recommend to set the default FIFO
* level to somewhere in the middle (e.g. 300), so it can cover speed
* mismatches in input and output ports.
*/
u16 fifo_level;
/* Bps pr lane is (refclk_hz / pll_prd) * pll_fbd */
u16 pll_prd;
u16 pll_fbd;
/* CSI
* Calculate CSI parameters with REF_02 for the highest resolution your
* CSI interface can handle. The driver will adjust the number of CSI
* lanes in use according to the pixel clock.
*
* The values in brackets are calculated with REF_02 when the number of
* bps pr lane is 823.5 MHz, and can serve as a starting point.
*/
u32 lineinitcnt; /* (0x00001770) */
u32 lptxtimecnt; /* (0x00000005) */
u32 tclk_headercnt; /* (0x00001d04) */
u32 tclk_trailcnt; /* (0x00000000) */
u32 ths_headercnt; /* (0x00000505) */
u32 twakeup; /* (0x00004650) */
u32 tclk_postcnt; /* (0x00000000) */
u32 ths_trailcnt; /* (0x00000004) */
u32 hstxvregcnt; /* (0x00000005) */
/* DVI->HDMI detection delay to avoid unnecessary switching between DVI
* and HDMI mode.
* Sets HDMI_DET_V in register HDMI_DET.
* Default: HDMI_MODE_DELAY_0_MS
*/
enum tc358743_hdmi_detection_delay hdmi_detection_delay;
/* Reset PHY automatically when TMDS clock goes from DC to AC.
* Sets PHY_AUTO_RST2 in register PHY_CTL2.
* Default: false
*/
bool hdmi_phy_auto_reset_tmds_detected;
/* Reset PHY automatically when TMDS clock passes 21 MHz.
* Sets PHY_AUTO_RST3 in register PHY_CTL2.
* Default: false
*/
bool hdmi_phy_auto_reset_tmds_in_range;
/* Reset PHY automatically when TMDS clock is detected.
* Sets PHY_AUTO_RST4 in register PHY_CTL2.
* Default: false
*/
bool hdmi_phy_auto_reset_tmds_valid;
/* Reset HDMI PHY automatically when hsync period is out of range.
* Sets H_PI_RST in register HV_RST.
* Default: false
*/
bool hdmi_phy_auto_reset_hsync_out_of_range;
/* Reset HDMI PHY automatically when vsync period is out of range.
* Sets V_PI_RST in register HV_RST.
* Default: false
*/
bool hdmi_phy_auto_reset_vsync_out_of_range;
};
/* custom controls */
/* Audio sample rate in Hz */
#define TC358743_CID_AUDIO_SAMPLING_RATE (V4L2_CID_USER_TC358743_BASE + 0)
/* Audio present status */
#define TC358743_CID_AUDIO_PRESENT (V4L2_CID_USER_TC358743_BASE + 1)
#endif
...@@ -174,6 +174,10 @@ enum v4l2_colorfx { ...@@ -174,6 +174,10 @@ enum v4l2_colorfx {
* We reserve 16 controls for this driver. */ * We reserve 16 controls for this driver. */
#define V4L2_CID_USER_ADV7180_BASE (V4L2_CID_USER_BASE + 0x1070) #define V4L2_CID_USER_ADV7180_BASE (V4L2_CID_USER_BASE + 0x1070)
/* The base for the tc358743 driver controls.
* We reserve 16 controls for this driver. */
#define V4L2_CID_USER_TC358743_BASE (V4L2_CID_USER_BASE + 0x1080)
/* MPEG-class control IDs */ /* MPEG-class control IDs */
/* The MPEG controls are applicable to all codec controls /* The MPEG controls are applicable to all codec controls
* and the 'MPEG' part of the define is historical */ * and the 'MPEG' part of the define is historical */
......
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