Commit d3ccbe86 authored by Jesse Barnes's avatar Jesse Barnes Committed by Keith Packard

drm/i915: fix PCH PLL assertion check for 3 pipes

Add a couple of checks now that we're using the 3rd transcoder:
  1) make sure the transcoder PLL enable bit is set for the transcoder
     in question
  2) when checking actual PLL enable, use the selected PLL number rather
     than the transcoder number (they could be different now)
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
parent 75770564
...@@ -803,6 +803,19 @@ static void assert_pch_pll(struct drm_i915_private *dev_priv, ...@@ -803,6 +803,19 @@ static void assert_pch_pll(struct drm_i915_private *dev_priv,
u32 val; u32 val;
bool cur_state; bool cur_state;
if (HAS_PCH_CPT(dev_priv->dev)) {
u32 pch_dpll;
pch_dpll = I915_READ(PCH_DPLL_SEL);
/* Make sure the selected PLL is enabled to the transcoder */
WARN(!((pch_dpll >> (4 * pipe)) & 8),
"transcoder %d PLL not enabled\n", pipe);
/* Convert the transcoder pipe number to a pll pipe number */
pipe = (pch_dpll >> (4 * pipe)) & 1;
}
reg = PCH_DPLL(pipe); reg = PCH_DPLL(pipe);
val = I915_READ(reg); val = I915_READ(reg);
cur_state = !!(val & DPLL_VCO_ENABLE); cur_state = !!(val & DPLL_VCO_ENABLE);
......
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