Commit d4408dd7 authored by Finn Thain's avatar Finn Thain Committed by Martin K. Petersen

scsi: ncr5380: Simplify register polling limit

When polling a device register under irq lock the polling loop terminates
after a given number of jiffies. Make this timeout independent of the HZ
setting.

All 5380 drivers benefit from this patch, which optimizes the PIO fast
path, because they all use PIO transfers (for phases other than DATA IN
and DATA OUT). Some cards support only PIO transfers (even for DATA
phases). CPU cycles are scarce on some of these systems, so a small
improvement here makes a big difference.
Signed-off-by: default avatarFinn Thain <fthain@telegraphics.com.au>
Reviewed-by: default avatarHannes Reinecke <hare@suse.com>
Tested-by: default avatarOndrej Zary <linux@rainbow-software.org>
Tested-by: default avatarMichael Schmitz <schmitzmic@gmail.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent abd12b09
...@@ -200,13 +200,9 @@ static int NCR5380_poll_politely2(struct Scsi_Host *instance, ...@@ -200,13 +200,9 @@ static int NCR5380_poll_politely2(struct Scsi_Host *instance,
int reg2, int bit2, int val2, int wait) int reg2, int bit2, int val2, int wait)
{ {
struct NCR5380_hostdata *hostdata = shost_priv(instance); struct NCR5380_hostdata *hostdata = shost_priv(instance);
unsigned long n = hostdata->poll_loops;
unsigned long deadline = jiffies + wait; unsigned long deadline = jiffies + wait;
unsigned long n;
/* Busy-wait for up to 10 ms */
n = min(10000U, jiffies_to_usecs(wait));
n *= hostdata->accesses_per_ms;
n /= 2000;
do { do {
if ((NCR5380_read(reg1) & bit1) == val1) if ((NCR5380_read(reg1) & bit1) == val1)
return 0; return 0;
...@@ -482,6 +478,7 @@ static int NCR5380_init(struct Scsi_Host *instance, int flags) ...@@ -482,6 +478,7 @@ static int NCR5380_init(struct Scsi_Host *instance, int flags)
struct NCR5380_hostdata *hostdata = shost_priv(instance); struct NCR5380_hostdata *hostdata = shost_priv(instance);
int i; int i;
unsigned long deadline; unsigned long deadline;
unsigned long accesses_per_ms;
instance->max_lun = 7; instance->max_lun = 7;
...@@ -530,7 +527,8 @@ static int NCR5380_init(struct Scsi_Host *instance, int flags) ...@@ -530,7 +527,8 @@ static int NCR5380_init(struct Scsi_Host *instance, int flags)
++i; ++i;
cpu_relax(); cpu_relax();
} while (time_is_after_jiffies(deadline)); } while (time_is_after_jiffies(deadline));
hostdata->accesses_per_ms = i / 256; accesses_per_ms = i / 256;
hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
return 0; return 0;
} }
......
...@@ -239,7 +239,7 @@ struct NCR5380_hostdata { ...@@ -239,7 +239,7 @@ struct NCR5380_hostdata {
* transfer to handle chip overruns */ * transfer to handle chip overruns */
struct work_struct main_task; struct work_struct main_task;
struct workqueue_struct *work_q; struct workqueue_struct *work_q;
unsigned long accesses_per_ms; /* chip register accesses per ms */ unsigned long poll_loops; /* register polling limit */
}; };
#ifdef __KERNEL__ #ifdef __KERNEL__
...@@ -252,6 +252,9 @@ struct NCR5380_cmd { ...@@ -252,6 +252,9 @@ struct NCR5380_cmd {
#define NCR5380_PIO_CHUNK_SIZE 256 #define NCR5380_PIO_CHUNK_SIZE 256
/* Time limit (ms) to poll registers when IRQs are disabled, e.g. during PDMA */
#define NCR5380_REG_POLL_TIME 10
static inline struct scsi_cmnd *NCR5380_to_scmd(struct NCR5380_cmd *ncmd_ptr) static inline struct scsi_cmnd *NCR5380_to_scmd(struct NCR5380_cmd *ncmd_ptr)
{ {
return ((struct scsi_cmnd *)ncmd_ptr) - 1; return ((struct scsi_cmnd *)ncmd_ptr) - 1;
......
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