Commit d60d0cff authored by Lihua Yao's avatar Lihua Yao Committed by Krzysztof Kozlowski

ARM: dts: s3c64xx: Fix init order of clock providers

fin_pll is the parent of clock-controller@7e00f000, specify
the dependency to ensure proper initialization order of clock
providers.

without this patch:
[    0.000000] S3C6410 clocks: apll = 0, mpll = 0
[    0.000000]  epll = 0, arm_clk = 0

with this patch:
[    0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000
[    0.000000]  epll = 24000000, arm_clk = 532000000

Cc: <stable@vger.kernel.org>
Fixes: 3f6d439f ("clk: reverse default clk provider initialization order in of_clk_init()")
Signed-off-by: default avatarLihua Yao <ylhuajnu@outlook.com>
Reviewed-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 56c126e8
...@@ -165,6 +165,10 @@ buzzer { ...@@ -165,6 +165,10 @@ buzzer {
}; };
}; };
&clocks {
clocks = <&fin_pll>;
};
&sdhci0 { &sdhci0 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
......
...@@ -69,6 +69,10 @@ ethernet@18000000 { ...@@ -69,6 +69,10 @@ ethernet@18000000 {
}; };
}; };
&clocks {
clocks = <&fin_pll>;
};
&sdhci0 { &sdhci0 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
......
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