Commit d64575ee authored by Jani Nikula's avatar Jani Nikula

drm/i915/irq: un-inline functions to avoid i915_drv.h include

Avoid including the i915_drv.h mega header from other header files to
make further header cleanup easier.
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/45431103f6cbd4322808907154336fdc176ff20d.1565085691.git.jani.nikula@intel.com
parent 5b51f28f
...@@ -595,6 +595,11 @@ void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv) ...@@ -595,6 +595,11 @@ void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv)
spin_unlock_irq(&dev_priv->irq_lock); spin_unlock_irq(&dev_priv->irq_lock);
} }
u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask)
{
return mask & ~i915->gt_pm.rps.pm_intrmsk_mbz;
}
void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv) void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv)
{ {
struct intel_rps *rps = &dev_priv->gt_pm.rps; struct intel_rps *rps = &dev_priv->gt_pm.rps;
...@@ -5196,3 +5201,17 @@ void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv) ...@@ -5196,3 +5201,17 @@ void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv)
intel_irq_reset(dev_priv); intel_irq_reset(dev_priv);
intel_irq_postinstall(dev_priv); intel_irq_postinstall(dev_priv);
} }
bool intel_irqs_enabled(struct drm_i915_private *dev_priv)
{
/*
* We only use drm_irq_uninstall() at unload and VT switch, so
* this is the only thing we need to check.
*/
return dev_priv->runtime_pm.irqs_enabled;
}
void intel_synchronize_irq(struct drm_i915_private *i915)
{
synchronize_irq(i915->drm.pdev->irq);
}
...@@ -6,12 +6,18 @@ ...@@ -6,12 +6,18 @@
#ifndef __I915_IRQ_H__ #ifndef __I915_IRQ_H__
#define __I915_IRQ_H__ #define __I915_IRQ_H__
#include <linux/ktime.h>
#include <linux/types.h> #include <linux/types.h>
#include "i915_drv.h" #include "display/intel_display.h"
struct drm_crtc;
struct drm_device;
struct drm_display_mode;
struct drm_i915_private; struct drm_i915_private;
struct intel_crtc; struct intel_crtc;
struct intel_crtc;
struct intel_gt;
struct intel_guc; struct intel_guc;
void intel_irq_init(struct drm_i915_private *dev_priv); void intel_irq_init(struct drm_i915_private *dev_priv);
...@@ -85,28 +91,12 @@ void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv); ...@@ -85,28 +91,12 @@ void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv); void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv); void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_rps_reset_ei(struct drm_i915_private *dev_priv); void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask);
static inline u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915,
u32 mask)
{
return mask & ~i915->gt_pm.rps.pm_intrmsk_mbz;
}
void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv); void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv);
void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv); void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv);
static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv) bool intel_irqs_enabled(struct drm_i915_private *dev_priv);
{ void intel_synchronize_irq(struct drm_i915_private *i915);
/*
* We only use drm_irq_uninstall() at unload and VT switch, so
* this is the only thing we need to check.
*/
return dev_priv->runtime_pm.irqs_enabled;
}
static inline void intel_synchronize_irq(struct drm_i915_private *i915)
{
synchronize_irq(i915->drm.pdev->irq);
}
int intel_get_crtc_scanline(struct intel_crtc *crtc); int intel_get_crtc_scanline(struct intel_crtc *crtc);
void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv, void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
......
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