Commit d676839b authored by John David Anglin's avatar John David Anglin Committed by Thadeu Lima de Souza Cascardo

parisc: Avoid trashing sr2 and sr3 in LWS code

BugLink: http://bugs.launchpad.net/bugs/1729107

commit f4125cfd upstream.

There is no need to trash sr2 and sr3 in the Light-weight syscall (LWS).  sr2
already points to kernel space (it's zero in userspace, otherwise syscalls
wouldn't work), and since the LWS code is executed in userspace, we can simply
ignore to preload sr3.
Signed-off-by: default avatarJohn David Anglin <dave.anglin@bell.net>
Signed-off-by: default avatarHelge Deller <deller@gmx.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5208b7fa
......@@ -479,11 +479,6 @@ lws_start:
comiclr,>> __NR_lws_entries, %r20, %r0
b,n lws_exit_nosys
/* WARNING: Trashing sr2 and sr3 */
mfsp %sr7,%r1 /* get userspace into sr3 */
mtsp %r1,%sr3
mtsp %r0,%sr2 /* get kernel space into sr2 */
/* Load table start */
ldil L%lws_table, %r1
ldo R%lws_table(%r1), %r28 /* Scratch use of r28 */
......@@ -632,9 +627,9 @@ cas_action:
stw %r1, 4(%sr2,%r20)
#endif
/* The load and store could fail */
1: ldw,ma 0(%sr3,%r26), %r28
1: ldw,ma 0(%r26), %r28
sub,<> %r28, %r25, %r0
2: stw,ma %r24, 0(%sr3,%r26)
2: stw,ma %r24, 0(%r26)
/* Free lock */
stw,ma %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG
......@@ -711,9 +706,9 @@ lws_compare_and_swap_2:
nop
/* 8bit load */
4: ldb 0(%sr3,%r25), %r25
4: ldb 0(%r25), %r25
b cas2_lock_start
5: ldb 0(%sr3,%r24), %r24
5: ldb 0(%r24), %r24
nop
nop
nop
......@@ -721,9 +716,9 @@ lws_compare_and_swap_2:
nop
/* 16bit load */
6: ldh 0(%sr3,%r25), %r25
6: ldh 0(%r25), %r25
b cas2_lock_start
7: ldh 0(%sr3,%r24), %r24
7: ldh 0(%r24), %r24
nop
nop
nop
......@@ -731,9 +726,9 @@ lws_compare_and_swap_2:
nop
/* 32bit load */
8: ldw 0(%sr3,%r25), %r25
8: ldw 0(%r25), %r25
b cas2_lock_start
9: ldw 0(%sr3,%r24), %r24
9: ldw 0(%r24), %r24
nop
nop
nop
......@@ -742,14 +737,14 @@ lws_compare_and_swap_2:
/* 64bit load */
#ifdef CONFIG_64BIT
10: ldd 0(%sr3,%r25), %r25
11: ldd 0(%sr3,%r24), %r24
10: ldd 0(%r25), %r25
11: ldd 0(%r24), %r24
#else
/* Load new value into r22/r23 - high/low */
10: ldw 0(%sr3,%r25), %r22
11: ldw 4(%sr3,%r25), %r23
10: ldw 0(%r25), %r22
11: ldw 4(%r25), %r23
/* Load new value into fr4 for atomic store later */
12: flddx 0(%sr3,%r24), %fr4
12: flddx 0(%r24), %fr4
#endif
cas2_lock_start:
......@@ -799,30 +794,30 @@ cas2_action:
ldo 1(%r0),%r28
/* 8bit CAS */
13: ldb,ma 0(%sr3,%r26), %r29
13: ldb,ma 0(%r26), %r29
sub,= %r29, %r25, %r0
b,n cas2_end
14: stb,ma %r24, 0(%sr3,%r26)
14: stb,ma %r24, 0(%r26)
b cas2_end
copy %r0, %r28
nop
nop
/* 16bit CAS */
15: ldh,ma 0(%sr3,%r26), %r29
15: ldh,ma 0(%r26), %r29
sub,= %r29, %r25, %r0
b,n cas2_end
16: sth,ma %r24, 0(%sr3,%r26)
16: sth,ma %r24, 0(%r26)
b cas2_end
copy %r0, %r28
nop
nop
/* 32bit CAS */
17: ldw,ma 0(%sr3,%r26), %r29
17: ldw,ma 0(%r26), %r29
sub,= %r29, %r25, %r0
b,n cas2_end
18: stw,ma %r24, 0(%sr3,%r26)
18: stw,ma %r24, 0(%r26)
b cas2_end
copy %r0, %r28
nop
......@@ -830,22 +825,22 @@ cas2_action:
/* 64bit CAS */
#ifdef CONFIG_64BIT
19: ldd,ma 0(%sr3,%r26), %r29
19: ldd,ma 0(%r26), %r29
sub,*= %r29, %r25, %r0
b,n cas2_end
20: std,ma %r24, 0(%sr3,%r26)
20: std,ma %r24, 0(%r26)
copy %r0, %r28
#else
/* Compare first word */
19: ldw,ma 0(%sr3,%r26), %r29
19: ldw,ma 0(%r26), %r29
sub,= %r29, %r22, %r0
b,n cas2_end
/* Compare second word */
20: ldw,ma 4(%sr3,%r26), %r29
20: ldw,ma 4(%r26), %r29
sub,= %r29, %r23, %r0
b,n cas2_end
/* Perform the store */
21: fstdx %fr4, 0(%sr3,%r26)
21: fstdx %fr4, 0(%r26)
copy %r0, %r28
#endif
......
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