Commit d6f4996e authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Shawn Guo

ARM: dts: imx25-pinfunc: Move MX25_PAD_TDO__TDO to a more sensible place

The pinfunc definitions are ordered by mux_reg and so automatically by
conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no
mux_reg. Put it to the place where it its in the order of conf_regs
instead of the top.
Signed-off-by: default avatarUwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e87c981c
...@@ -17,8 +17,6 @@ ...@@ -17,8 +17,6 @@
* <mux_reg conf_reg input_reg mux_mode input_val> * <mux_reg conf_reg input_reg mux_mode input_val>
*/ */
#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000
#define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000 #define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000
#define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000 #define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000
...@@ -541,6 +539,8 @@ ...@@ -541,6 +539,8 @@
#define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x01 0x000 #define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x01 0x000
#define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x05 0x000 #define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x05 0x000
#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000
#define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x00 0x000 #define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x00 0x000
#define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x05 0x000 #define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x05 0x000
......
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