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Commit d7a38566 authored by Shawn Guo's avatar Shawn Guo
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arm64: dts: fsl-ls1028a-qds: Drop overlay syntax hard coding 

As suggested by commit 9ae8578b ("of: Documentation: change overlay
example to use current syntax"), there is no need to have overlay syntax
be hard coded in the device tree source file any more.
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
Reviewed-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
parent 708756e1
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arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts
View file @ d7a38566
...@@ -12,102 +12,80 @@ ...@@ -12,102 +12,80 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
/ { &mdio_slot1 {
fragment@0 { #address-cells = <1>;
target = <&mdio_slot1>; #size-cells = <0>;
__overlay__ { slot1_sgmii: ethernet-phy@2 {
#address-cells = <1>; /* AQR112 */
#size-cells = <0>; reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
};
fragment@1 {
target = <&enetc_port0>;
__overlay__ {
phy-handle = <&slot1_sgmii>;
phy-mode = "usxgmii";
managed = "in-band-status";
status = "okay";
};
}; };
};
fragment@2 { &enetc_port0 {
target = <&mdio_slot2>; phy-handle = <&slot1_sgmii>;
phy-mode = "usxgmii";
__overlay__ { managed = "in-band-status";
#address-cells = <1>; status = "okay";
#size-cells = <0>; };
/* 4 ports on AQR412 */
slot2_qxgmii0: ethernet-phy@0 {
reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii1: ethernet-phy@1 {
reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii2: ethernet-phy@2 { &mdio_slot2 {
reg = <0x2>; #address-cells = <1>;
compatible = "ethernet-phy-ieee802.3-c45"; #size-cells = <0>;
};
slot2_qxgmii3: ethernet-phy@3 { /* 4 ports on AQR412 */
reg = <0x3>; slot2_qxgmii0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45"; reg = <0x0>;
}; compatible = "ethernet-phy-ieee802.3-c45";
};
}; };
fragment@3 { slot2_qxgmii1: ethernet-phy@1 {
target = <&mscc_felix_ports>; reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
__overlay__ { slot2_qxgmii2: ethernet-phy@2 {
port@0 { reg = <0x2>;
status = "okay"; compatible = "ethernet-phy-ieee802.3-c45";
phy-handle = <&slot2_qxgmii0>; };
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@1 { slot2_qxgmii3: ethernet-phy@3 {
status = "okay"; reg = <0x3>;
phy-handle = <&slot2_qxgmii1>; compatible = "ethernet-phy-ieee802.3-c45";
phy-mode = "usxgmii"; };
managed = "in-band-status"; };
};
port@2 { &mscc_felix_ports {
status = "okay"; port@0 {
phy-handle = <&slot2_qxgmii2>; status = "okay";
phy-mode = "usxgmii"; phy-handle = <&slot2_qxgmii0>;
managed = "in-band-status"; phy-mode = "usxgmii";
}; managed = "in-band-status";
};
port@3 { port@1 {
status = "okay"; status = "okay";
phy-handle = <&slot2_qxgmii3>; phy-handle = <&slot2_qxgmii1>;
phy-mode = "usxgmii"; phy-mode = "usxgmii";
managed = "in-band-status"; managed = "in-band-status";
};
};
}; };
fragment@4 { port@2 {
target = <&mscc_felix>; status = "okay";
phy-handle = <&slot2_qxgmii2>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
__overlay__ { port@3 {
status = "okay"; status = "okay";
}; phy-handle = <&slot2_qxgmii3>;
phy-mode = "usxgmii";
managed = "in-band-status";
}; };
}; };
&mscc_felix {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts
View file @ d7a38566
...@@ -11,98 +11,76 @@ ...@@ -11,98 +11,76 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
/ { &mdio_slot1 {
fragment@0 { #address-cells = <1>;
target = <&mdio_slot1>; #size-cells = <0>;
__overlay__ { slot1_sgmii: ethernet-phy@2 {
#address-cells = <1>; /* AQR112 */
#size-cells = <0>; reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
};
fragment@1 {
target = <&enetc_port0>;
__overlay__ {
phy-handle = <&slot1_sgmii>;
phy-mode = "2500base-x";
managed = "in-band-status";
status = "okay";
};
}; };
};
fragment@2 { &enetc_port0 {
target = <&mdio_slot2>; phy-handle = <&slot1_sgmii>;
phy-mode = "2500base-x";
__overlay__ { managed = "in-band-status";
#address-cells = <1>; status = "okay";
#size-cells = <0>; };
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a { &mdio_slot2 {
reg = <0xa>; #address-cells = <1>;
}; #size-cells = <0>;
slot2_qsgmii3: ethernet-phy@b { /* 4 ports on VSC8514 */
reg = <0xb>; slot2_qsgmii0: ethernet-phy@8 {
}; reg = <0x8>;
};
}; };
fragment@3 { slot2_qsgmii1: ethernet-phy@9 {
target = <&mscc_felix_ports>; reg = <0x9>;
};
__overlay__ { slot2_qsgmii2: ethernet-phy@a {
port@0 { reg = <0xa>;
status = "okay"; };
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 { slot2_qsgmii3: ethernet-phy@b {
status = "okay"; reg = <0xb>;
phy-handle = <&slot2_qsgmii1>; };
phy-mode = "qsgmii"; };
managed = "in-band-status";
};
port@2 { &mscc_felix_ports {
status = "okay"; port@0 {
phy-handle = <&slot2_qsgmii2>; status = "okay";
phy-mode = "qsgmii"; phy-handle = <&slot2_qsgmii0>;
managed = "in-band-status"; phy-mode = "qsgmii";
}; managed = "in-band-status";
};
port@3 { port@1 {
status = "okay"; status = "okay";
phy-handle = <&slot2_qsgmii3>; phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii"; phy-mode = "qsgmii";
managed = "in-band-status"; managed = "in-band-status";
};
};
}; };
fragment@4 { port@2 {
target = <&mscc_felix>; status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
__overlay__ { port@3 {
status = "okay"; status = "okay";
}; phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
}; };
}; };
&mscc_felix {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts
View file @ d7a38566
...@@ -12,71 +12,58 @@ ...@@ -12,71 +12,58 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
/ { &mdio_slot1 {
fragment@0 { #address-cells = <1>;
target = <&mdio_slot1>; #size-cells = <0>;
__overlay__ { /* 4 ports on AQR412 */
#address-cells = <1>; slot1_sxgmii0: ethernet-phy@0 {
#size-cells = <0>; reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
/* 4 ports on AQR412 */ };
slot1_sxgmii0: ethernet-phy@0 {
reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii1: ethernet-phy@1 {
reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii2: ethernet-phy@2 {
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii3: ethernet-phy@3 { slot1_sxgmii1: ethernet-phy@1 {
reg = <0x3>; reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-ieee802.3-c45";
};
};
}; };
fragment@1 { slot1_sxgmii2: ethernet-phy@2 {
target = <&mscc_felix_ports>; reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
__overlay__ { slot1_sxgmii3: ethernet-phy@3 {
port@0 { reg = <0x3>;
status = "okay"; compatible = "ethernet-phy-ieee802.3-c45";
phy-handle = <&slot1_sxgmii0>; };
phy-mode = "2500base-x"; };
};
port@1 { &mscc_felix_ports {
status = "okay"; port@0 {
phy-handle = <&slot1_sxgmii1>; status = "okay";
phy-mode = "2500base-x"; phy-handle = <&slot1_sxgmii0>;
}; phy-mode = "2500base-x";
};
port@2 { port@1 {
status = "okay"; status = "okay";
phy-handle = <&slot1_sxgmii2>; phy-handle = <&slot1_sxgmii1>;
phy-mode = "2500base-x"; phy-mode = "2500base-x";
}; };
port@3 { port@2 {
status = "okay"; status = "okay";
phy-handle = <&slot1_sxgmii3>; phy-handle = <&slot1_sxgmii2>;
phy-mode = "2500base-x"; phy-mode = "2500base-x";
};
};
}; };
fragment@2 { port@3 {
target = <&mscc_felix>; status = "okay";
__overlay__ { phy-handle = <&slot1_sxgmii3>;
status = "okay"; phy-mode = "2500base-x";
};
}; };
}; };
&mscc_felix {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts
View file @ d7a38566
...@@ -11,97 +11,75 @@ ...@@ -11,97 +11,75 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
/ { &mdio_slot1 {
fragment@0 { #address-cells = <1>;
target = <&mdio_slot1>; #size-cells = <0>;
__overlay__ { slot1_sgmii: ethernet-phy@1c {
#address-cells = <1>; /* 1st port on VSC8234 */
#size-cells = <0>; reg = <0x1c>;
slot1_sgmii: ethernet-phy@1c {
/* 1st port on VSC8234 */
reg = <0x1c>;
};
};
}; };
};
fragment@1 { &enetc_port0 {
target = <&enetc_port0>; phy-handle = <&slot1_sgmii>;
phy-mode = "sgmii";
__overlay__ { managed = "in-band-status";
phy-handle = <&slot1_sgmii>; status = "okay";
phy-mode = "sgmii"; };
managed = "in-band-status";
status = "okay";
};
};
fragment@2 {
target = <&mdio_slot2>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a { &mdio_slot2 {
reg = <0xa>; #address-cells = <1>;
}; #size-cells = <0>;
slot2_qsgmii3: ethernet-phy@b { /* 4 ports on VSC8514 */
reg = <0xb>; slot2_qsgmii0: ethernet-phy@8 {
}; reg = <0x8>;
};
}; };
fragment@3 { slot2_qsgmii1: ethernet-phy@9 {
target = <&mscc_felix_ports>; reg = <0x9>;
};
__overlay__ { slot2_qsgmii2: ethernet-phy@a {
port@0 { reg = <0xa>;
status = "okay"; };
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 { slot2_qsgmii3: ethernet-phy@b {
status = "okay"; reg = <0xb>;
phy-handle = <&slot2_qsgmii1>; };
phy-mode = "qsgmii"; };
managed = "in-band-status";
};
port@2 { &mscc_felix_ports {
status = "okay"; port@0 {
phy-handle = <&slot2_qsgmii2>; status = "okay";
phy-mode = "qsgmii"; phy-handle = <&slot2_qsgmii0>;
managed = "in-band-status"; phy-mode = "qsgmii";
}; managed = "in-band-status";
};
port@3 { port@1 {
status = "okay"; status = "okay";
phy-handle = <&slot2_qsgmii3>; phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii"; phy-mode = "qsgmii";
managed = "in-band-status"; managed = "in-band-status";
};
};
}; };
fragment@4 { port@2 {
target = <&mscc_felix>; status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
__overlay__ { port@3 {
status = "okay"; status = "okay";
}; phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
}; };
}; };
&mscc_felix {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts
View file @ d7a38566
...@@ -11,65 +11,51 @@ ...@@ -11,65 +11,51 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
/ { &mdio_slot1 {
fragment@0 { #address-cells = <1>;
target = <&mdio_slot1>; #size-cells = <0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* VSC8234 */ /* VSC8234 */
slot1_sgmii0: ethernet-phy@1c { slot1_sgmii0: ethernet-phy@1c {
reg = <0x1c>; reg = <0x1c>;
}; };
slot1_sgmii1: ethernet-phy@1d {
reg = <0x1d>;
};
slot1_sgmii2: ethernet-phy@1e { slot1_sgmii1: ethernet-phy@1d {
reg = <0x1e>; reg = <0x1d>;
}; };
slot1_sgmii3: ethernet-phy@1f { slot1_sgmii2: ethernet-phy@1e {
reg = <0x1f>; reg = <0x1e>;
};
};
}; };
fragment@1 { slot1_sgmii3: ethernet-phy@1f {
target = <&enetc_port0>; reg = <0x1f>;
__overlay__ {
phy-handle = <&slot1_sgmii0>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
}; };
};
fragment@2 { &enetc_port0 {
target = <&mscc_felix_ports>; phy-handle = <&slot1_sgmii0>;
__overlay__ { phy-mode = "sgmii";
port@1 { managed = "in-band-status";
status = "okay"; status = "okay";
phy-handle = <&slot1_sgmii1>; };
phy-mode = "sgmii";
managed = "in-band-status";
};
port@2 { &mscc_felix_ports {
status = "okay"; port@1 {
phy-handle = <&slot1_sgmii2>; status = "okay";
phy-mode = "sgmii"; phy-handle = <&slot1_sgmii1>;
managed = "in-band-status"; phy-mode = "sgmii";
}; managed = "in-band-status";
};
}; };
fragment@3 { port@2 {
target = <&mscc_felix>; status = "okay";
__overlay__ { phy-handle = <&slot1_sgmii2>;
status = "okay"; phy-mode = "sgmii";
}; managed = "in-band-status";
}; };
}; };
&mscc_felix {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts
View file @ d7a38566
...@@ -11,69 +11,58 @@ ...@@ -11,69 +11,58 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
/ { &mdio_slot1 {
fragment@0 { #address-cells = <1>;
target = <&mdio_slot1>; #size-cells = <0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* VSC8234 */ /* VSC8234 */
slot1_sgmii0: ethernet-phy@1c { slot1_sgmii0: ethernet-phy@1c {
reg = <0x1c>; reg = <0x1c>;
}; };
slot1_sgmii1: ethernet-phy@1d {
reg = <0x1d>;
};
slot1_sgmii2: ethernet-phy@1e { slot1_sgmii1: ethernet-phy@1d {
reg = <0x1e>; reg = <0x1d>;
}; };
slot1_sgmii3: ethernet-phy@1f { slot1_sgmii2: ethernet-phy@1e {
reg = <0x1f>; reg = <0x1e>;
};
};
}; };
fragment@1 { slot1_sgmii3: ethernet-phy@1f {
target = <&mscc_felix_ports>; reg = <0x1f>;
__overlay__ { };
port@0 { };
status = "okay";
phy-handle = <&slot1_sgmii0>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@1 { &mscc_felix_ports {
status = "okay"; port@0 {
phy-handle = <&slot1_sgmii1>; status = "okay";
phy-mode = "sgmii"; phy-handle = <&slot1_sgmii0>;
managed = "in-band-status"; phy-mode = "sgmii";
}; managed = "in-band-status";
};
port@2 { port@1 {
status = "okay"; status = "okay";
phy-handle = <&slot1_sgmii2>; phy-handle = <&slot1_sgmii1>;
phy-mode = "sgmii"; phy-mode = "sgmii";
managed = "in-band-status"; managed = "in-band-status";
}; };
port@3 { port@2 {
status = "okay"; status = "okay";
phy-handle = <&slot1_sgmii3>; phy-handle = <&slot1_sgmii2>;
phy-mode = "sgmii"; phy-mode = "sgmii";
managed = "in-band-status"; managed = "in-band-status";
};
};
}; };
fragment@2 { port@3 {
target = <&mscc_felix>; status = "okay";
__overlay__ { phy-handle = <&slot1_sgmii3>;
status = "okay"; phy-mode = "sgmii";
}; managed = "in-band-status";
}; };
}; };
&mscc_felix {
status = "okay";
};
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