Commit d7ac67b9 authored by Russell King (Oracle)'s avatar Russell King (Oracle)

Merge branches 'fixes' and 'misc' into for-linus

parents 657a292d 2335c9cb
...@@ -86,6 +86,7 @@ config ARM ...@@ -86,6 +86,7 @@ config ARM
select HAVE_ARCH_PFN_VALID select HAVE_ARCH_PFN_VALID
select HAVE_ARCH_SECCOMP select HAVE_ARCH_SECCOMP
select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
select HAVE_ARCH_STACKLEAK
select HAVE_ARCH_THREAD_STRUCT_WHITELIST select HAVE_ARCH_THREAD_STRUCT_WHITELIST
select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE
...@@ -115,6 +116,7 @@ config ARM ...@@ -115,6 +116,7 @@ config ARM
select HAVE_KERNEL_XZ select HAVE_KERNEL_XZ
select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
select HAVE_KRETPROBES if HAVE_KPROBES select HAVE_KRETPROBES if HAVE_KPROBES
select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
select HAVE_MOD_ARCH_SPECIFIC select HAVE_MOD_ARCH_SPECIFIC
select HAVE_NMI select HAVE_NMI
select HAVE_OPTPROBES if !THUMB2_KERNEL select HAVE_OPTPROBES if !THUMB2_KERNEL
...@@ -735,7 +737,7 @@ config ARM_ERRATA_764319 ...@@ -735,7 +737,7 @@ config ARM_ERRATA_764319
bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction" bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
depends on CPU_V7 depends on CPU_V7
help help
This option enables the workaround for the 764319 Cortex A-9 erratum. This option enables the workaround for the 764319 Cortex-A9 erratum.
CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an
unexpected Undefined Instruction exception when the DBGSWENABLE unexpected Undefined Instruction exception when the DBGSWENABLE
external pin is set to 0, even when the CP14 accesses are performed external pin is set to 0, even when the CP14 accesses are performed
......
...@@ -9,6 +9,7 @@ OBJS = ...@@ -9,6 +9,7 @@ OBJS =
HEAD = head.o HEAD = head.o
OBJS += misc.o decompress.o OBJS += misc.o decompress.o
CFLAGS_decompress.o += $(DISABLE_STACKLEAK_PLUGIN)
ifeq ($(CONFIG_DEBUG_UNCOMPRESS),y) ifeq ($(CONFIG_DEBUG_UNCOMPRESS),y)
OBJS += debug.o OBJS += debug.o
AFLAGS_head.o += -DDEBUG AFLAGS_head.o += -DDEBUG
......
...@@ -125,7 +125,7 @@ SECTIONS ...@@ -125,7 +125,7 @@ SECTIONS
. = BSS_START; . = BSS_START;
__bss_start = .; __bss_start = .;
.bss : { *(.bss) } .bss : { *(.bss .bss.*) }
_end = .; _end = .;
. = ALIGN(8); /* the stack must be 64-bit aligned */ . = ALIGN(8); /* the stack must be 64-bit aligned */
......
...@@ -26,6 +26,13 @@ struct stackframe { ...@@ -26,6 +26,13 @@ struct stackframe {
#endif #endif
}; };
static inline bool on_thread_stack(void)
{
unsigned long delta = current_stack_pointer ^ (unsigned long)current->stack;
return delta < THREAD_SIZE;
}
static __always_inline static __always_inline
void arm_get_current_stackframe(struct pt_regs *regs, struct stackframe *frame) void arm_get_current_stackframe(struct pt_regs *regs, struct stackframe *frame)
{ {
......
...@@ -42,7 +42,7 @@ ...@@ -42,7 +42,7 @@
#define PROC_INFO \ #define PROC_INFO \
. = ALIGN(4); \ . = ALIGN(4); \
__proc_info_begin = .; \ __proc_info_begin = .; \
*(.proc.info.init) \ KEEP(*(.proc.info.init)) \
__proc_info_end = .; __proc_info_end = .;
#define IDMAP_TEXT \ #define IDMAP_TEXT \
......
...@@ -1065,6 +1065,7 @@ vector_addrexcptn: ...@@ -1065,6 +1065,7 @@ vector_addrexcptn:
.globl vector_fiq .globl vector_fiq
.section .vectors, "ax", %progbits .section .vectors, "ax", %progbits
.reloc .text, R_ARM_NONE, .
W(b) vector_rst W(b) vector_rst
W(b) vector_und W(b) vector_und
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi ) ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi )
...@@ -1078,6 +1079,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_swi ) ...@@ -1078,6 +1079,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_swi )
#ifdef CONFIG_HARDEN_BRANCH_HISTORY #ifdef CONFIG_HARDEN_BRANCH_HISTORY
.section .vectors.bhb.loop8, "ax", %progbits .section .vectors.bhb.loop8, "ax", %progbits
.reloc .text, R_ARM_NONE, .
W(b) vector_rst W(b) vector_rst
W(b) vector_bhb_loop8_und W(b) vector_bhb_loop8_und
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi ) ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi )
...@@ -1090,6 +1092,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_loop8_swi ) ...@@ -1090,6 +1092,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_loop8_swi )
W(b) vector_bhb_loop8_fiq W(b) vector_bhb_loop8_fiq
.section .vectors.bhb.bpiall, "ax", %progbits .section .vectors.bhb.bpiall, "ax", %progbits
.reloc .text, R_ARM_NONE, .
W(b) vector_rst W(b) vector_rst
W(b) vector_bhb_bpiall_und W(b) vector_bhb_bpiall_und
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi ) ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi )
......
...@@ -119,6 +119,9 @@ no_work_pending: ...@@ -119,6 +119,9 @@ no_work_pending:
ct_user_enter save = 0 ct_user_enter save = 0
#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
bl stackleak_erase_on_task_stack
#endif
restore_user_regs fast = 0, offset = 0 restore_user_regs fast = 0, offset = 0
ENDPROC(ret_to_user_from_irq) ENDPROC(ret_to_user_from_irq)
ENDPROC(ret_to_user) ENDPROC(ret_to_user)
......
...@@ -395,11 +395,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, ...@@ -395,11 +395,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
return 0; return 0;
} }
struct mod_unwind_map {
const Elf_Shdr *unw_sec;
const Elf_Shdr *txt_sec;
};
static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr, static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
const Elf_Shdr *sechdrs, const char *name) const Elf_Shdr *sechdrs, const char *name)
{ {
......
...@@ -63,7 +63,7 @@ SECTIONS ...@@ -63,7 +63,7 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
__start___ex_table = .; __start___ex_table = .;
ARM_MMU_KEEP(*(__ex_table)) ARM_MMU_KEEP(KEEP(*(__ex_table)))
__stop___ex_table = .; __stop___ex_table = .;
} }
...@@ -83,7 +83,7 @@ SECTIONS ...@@ -83,7 +83,7 @@ SECTIONS
} }
.init.arch.info : { .init.arch.info : {
__arch_info_begin = .; __arch_info_begin = .;
*(.arch.info.init) KEEP(*(.arch.info.init))
__arch_info_end = .; __arch_info_end = .;
} }
.init.tagtable : { .init.tagtable : {
......
...@@ -74,7 +74,7 @@ SECTIONS ...@@ -74,7 +74,7 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
__start___ex_table = .; __start___ex_table = .;
ARM_MMU_KEEP(*(__ex_table)) ARM_MMU_KEEP(KEEP(*(__ex_table)))
__stop___ex_table = .; __stop___ex_table = .;
} }
...@@ -99,7 +99,7 @@ SECTIONS ...@@ -99,7 +99,7 @@ SECTIONS
} }
.init.arch.info : { .init.arch.info : {
__arch_info_begin = .; __arch_info_begin = .;
*(.arch.info.init) KEEP(*(.arch.info.init))
__arch_info_end = .; __arch_info_end = .;
} }
.init.tagtable : { .init.tagtable : {
...@@ -116,7 +116,7 @@ SECTIONS ...@@ -116,7 +116,7 @@ SECTIONS
#endif #endif
.init.pv_table : { .init.pv_table : {
__pv_table_begin = .; __pv_table_begin = .;
*(.pv_table) KEEP(*(.pv_table))
__pv_table_end = .; __pv_table_end = .;
} }
......
...@@ -29,7 +29,7 @@ int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr) ...@@ -29,7 +29,7 @@ int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr)
/* /*
* Set CPU resume address - * Set CPU resume address -
* secure firmware running on boot will jump to this address * secure firmware running on boot will jump to this address
* after setting proper CPU mode, and initialiing e.g. secure * after setting proper CPU mode, and initializing e.g. secure
* regs (the same mode all CPUs are booted to - usually HYP) * regs (the same mode all CPUs are booted to - usually HYP)
*/ */
writel(phys_resume_addr, writel(phys_resume_addr,
......
...@@ -27,7 +27,8 @@ cflags-$(CONFIG_ARM64) += -fpie $(DISABLE_STACKLEAK_PLUGIN) \ ...@@ -27,7 +27,8 @@ cflags-$(CONFIG_ARM64) += -fpie $(DISABLE_STACKLEAK_PLUGIN) \
cflags-$(CONFIG_ARM) += -DEFI_HAVE_STRLEN -DEFI_HAVE_STRNLEN \ cflags-$(CONFIG_ARM) += -DEFI_HAVE_STRLEN -DEFI_HAVE_STRNLEN \
-DEFI_HAVE_MEMCHR -DEFI_HAVE_STRRCHR \ -DEFI_HAVE_MEMCHR -DEFI_HAVE_STRRCHR \
-DEFI_HAVE_STRCMP -fno-builtin -fpic \ -DEFI_HAVE_STRCMP -fno-builtin -fpic \
$(call cc-option,-mno-single-pic-base) $(call cc-option,-mno-single-pic-base) \
$(DISABLE_STACKLEAK_PLUGIN)
cflags-$(CONFIG_RISCV) += -fpic -DNO_ALTERNATIVE -mno-relax cflags-$(CONFIG_RISCV) += -fpic -DNO_ALTERNATIVE -mno-relax
cflags-$(CONFIG_LOONGARCH) += -fpie cflags-$(CONFIG_LOONGARCH) += -fpie
...@@ -56,6 +57,10 @@ KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_CFI), $(KBUILD_CFLAGS)) ...@@ -56,6 +57,10 @@ KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_CFI), $(KBUILD_CFLAGS))
# disable LTO # disable LTO
KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_LTO), $(KBUILD_CFLAGS)) KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_LTO), $(KBUILD_CFLAGS))
# The .data section would be renamed to .data.efistub, therefore, remove
# `-fdata-sections` flag from KBUILD_CFLAGS_KERNEL
KBUILD_CFLAGS_KERNEL := $(filter-out -fdata-sections, $(KBUILD_CFLAGS_KERNEL))
lib-y := efi-stub-helper.o gop.o secureboot.o tpm.o \ lib-y := efi-stub-helper.o gop.o secureboot.o tpm.o \
file.o mem.o random.o randomalloc.o pci.o \ file.o mem.o random.o randomalloc.o pci.o \
skip_spaces.o lib-cmdline.o lib-ctype.o \ skip_spaces.o lib-cmdline.o lib-ctype.o \
......
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