Commit d7ca1106 authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Ben Skeggs

drm/nouveau/clk/gk20a: reorganize MNP calculation a bit

Move variables declarations to their actual scope of use, and simplify
code a bit.
Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent f5f1b06e
...@@ -163,16 +163,13 @@ gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate) ...@@ -163,16 +163,13 @@ gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate)
target_clk_f = rate * 2 / KHZ; target_clk_f = rate * 2 / KHZ;
ref_clk_f = clk->parent_rate / KHZ; ref_clk_f = clk->parent_rate / KHZ;
max_vco_f = clk->params->max_vco; target_vco_f = target_clk_f + target_clk_f / 50;
max_vco_f = max(clk->params->max_vco, target_vco_f);
min_vco_f = clk->params->min_vco; min_vco_f = clk->params->min_vco;
best_m = clk->params->max_m; best_m = clk->params->max_m;
best_n = clk->params->min_n; best_n = clk->params->min_n;
best_pl = clk->params->min_pl; best_pl = clk->params->min_pl;
target_vco_f = target_clk_f + target_clk_f / 50;
if (max_vco_f < target_vco_f)
max_vco_f = target_vco_f;
/* min_pl <= high_pl <= max_pl */ /* min_pl <= high_pl <= max_pl */
high_pl = (max_vco_f + target_vco_f - 1) / target_vco_f; high_pl = (max_vco_f + target_vco_f - 1) / target_vco_f;
high_pl = min(high_pl, clk->params->max_pl); high_pl = min(high_pl, clk->params->max_pl);
...@@ -195,9 +192,7 @@ gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate) ...@@ -195,9 +192,7 @@ gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate)
target_vco_f = target_clk_f * clk->pl_to_div(pl); target_vco_f = target_clk_f * clk->pl_to_div(pl);
for (m = clk->params->min_m; m <= clk->params->max_m; m++) { for (m = clk->params->min_m; m <= clk->params->max_m; m++) {
u32 u_f, vco_f; u32 u_f = ref_clk_f / m;
u_f = ref_clk_f / m;
if (u_f < clk->params->min_u) if (u_f < clk->params->min_u)
break; break;
...@@ -211,6 +206,8 @@ gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate) ...@@ -211,6 +206,8 @@ gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate)
break; break;
for (; n <= n2; n++) { for (; n <= n2; n++) {
u32 vco_f;
if (n < clk->params->min_n) if (n < clk->params->min_n)
continue; continue;
if (n > clk->params->max_n) if (n > clk->params->max_n)
......
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