clk: tegra: Bump SCLK clock rate to 216 MHz
AHB DMA is a running on 1/2 of SCLK rate, APB DMA on 1/4. Increasing SCLK rate results in an increased DMA transfer rate. Signed-off-by:Dmitry Osipenko <digetx@gmail.com> Acked-By:
Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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