Commit d863f053 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pm-6.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management fixes from Rafael Wysocki:
 "These fix assorted issues in the ARM cpufreq drivers and in the AMD
  P-state driver.

  Specifics:

   - Fix cpufreq policy reference counting in amd-pstate to prevent it
     from crashing on removal (Perry Yuan)

   - Fix double initialization and set suspend-freq for Apple's cpufreq
     driver (Arnd Bergmann, Hector Martin)

   - Fix reading of "reg" property, update cpufreq-dt's blocklist and
     update DT documentation for Qualcomm's cpufreq driver (Konrad
     Dybcio, Krzysztof Kozlowski)

   - Replace 0 with NULL in the Armada cpufreq driver (Miles Chen)

   - Fix potential overflows in the CPPC cpufreq driver (Pierre Gondois)

   - Update blocklist for the Tegra234 Soc cpufreq driver (Sumit Gupta)"

* tag 'pm-6.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  cpufreq: amd-pstate: fix kernel hang issue while amd-pstate unregistering
  cpufreq: armada-37xx: stop using 0 as NULL pointer
  cpufreq: apple-soc: Switch to the lowest frequency on suspend
  dt-bindings: cpufreq: cpufreq-qcom-hw: document interrupts
  cpufreq: Add SM6375 to cpufreq-dt-platdev blocklist
  cpufreq: Add Tegra234 to cpufreq-dt-platdev blocklist
  cpufreq: qcom-hw: Fix reading "reg" with address/size-cells != 2
  cpufreq: CPPC: Add u64 casts to avoid overflowing
  cpufreq: apple: remove duplicate intializer
parents cdbbca25 4f3085f8
...@@ -54,6 +54,17 @@ properties: ...@@ -54,6 +54,17 @@ properties:
- const: xo - const: xo
- const: alternate - const: alternate
interrupts:
minItems: 1
maxItems: 3
interrupt-names:
minItems: 1
items:
- const: dcvsh-irq-0
- const: dcvsh-irq-1
- const: dcvsh-irq-2
'#freq-domain-cells': '#freq-domain-cells':
const: 1 const: 1
......
...@@ -307,6 +307,7 @@ static void amd_pstate_adjust_perf(unsigned int cpu, ...@@ -307,6 +307,7 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
max_perf = min_perf; max_perf = min_perf;
amd_pstate_update(cpudata, min_perf, des_perf, max_perf, true); amd_pstate_update(cpudata, min_perf, des_perf, max_perf, true);
cpufreq_cpu_put(policy);
} }
static int amd_get_min_freq(struct amd_cpudata *cpudata) static int amd_get_min_freq(struct amd_cpudata *cpudata)
......
...@@ -280,6 +280,7 @@ static int apple_soc_cpufreq_init(struct cpufreq_policy *policy) ...@@ -280,6 +280,7 @@ static int apple_soc_cpufreq_init(struct cpufreq_policy *policy)
policy->cpuinfo.transition_latency = transition_latency; policy->cpuinfo.transition_latency = transition_latency;
policy->dvfs_possible_from_any_cpu = true; policy->dvfs_possible_from_any_cpu = true;
policy->fast_switch_possible = true; policy->fast_switch_possible = true;
policy->suspend_freq = freq_table[0].frequency;
if (policy_has_boost_freq(policy)) { if (policy_has_boost_freq(policy)) {
ret = cpufreq_enable_boost_support(); ret = cpufreq_enable_boost_support();
...@@ -321,7 +322,6 @@ static struct cpufreq_driver apple_soc_cpufreq_driver = { ...@@ -321,7 +322,6 @@ static struct cpufreq_driver apple_soc_cpufreq_driver = {
.flags = CPUFREQ_HAVE_GOVERNOR_PER_POLICY | .flags = CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
CPUFREQ_NEED_INITIAL_FREQ_CHECK | CPUFREQ_IS_COOLING_DEV, CPUFREQ_NEED_INITIAL_FREQ_CHECK | CPUFREQ_IS_COOLING_DEV,
.verify = cpufreq_generic_frequency_table_verify, .verify = cpufreq_generic_frequency_table_verify,
.attr = cpufreq_generic_attr,
.get = apple_soc_cpufreq_get_rate, .get = apple_soc_cpufreq_get_rate,
.init = apple_soc_cpufreq_init, .init = apple_soc_cpufreq_init,
.exit = apple_soc_cpufreq_exit, .exit = apple_soc_cpufreq_exit,
...@@ -329,6 +329,7 @@ static struct cpufreq_driver apple_soc_cpufreq_driver = { ...@@ -329,6 +329,7 @@ static struct cpufreq_driver apple_soc_cpufreq_driver = {
.fast_switch = apple_soc_cpufreq_fast_switch, .fast_switch = apple_soc_cpufreq_fast_switch,
.register_em = cpufreq_register_em_with_opp, .register_em = cpufreq_register_em_with_opp,
.attr = apple_soc_cpufreq_hw_attr, .attr = apple_soc_cpufreq_hw_attr,
.suspend = cpufreq_generic_suspend,
}; };
static int __init apple_soc_cpufreq_module_init(void) static int __init apple_soc_cpufreq_module_init(void)
......
...@@ -445,7 +445,7 @@ static int __init armada37xx_cpufreq_driver_init(void) ...@@ -445,7 +445,7 @@ static int __init armada37xx_cpufreq_driver_init(void)
return -ENODEV; return -ENODEV;
} }
clk = clk_get(cpu_dev, 0); clk = clk_get(cpu_dev, NULL);
if (IS_ERR(clk)) { if (IS_ERR(clk)) {
dev_err(cpu_dev, "Cannot get clock for CPU0\n"); dev_err(cpu_dev, "Cannot get clock for CPU0\n");
return PTR_ERR(clk); return PTR_ERR(clk);
......
...@@ -487,7 +487,8 @@ static unsigned int get_perf_level_count(struct cpufreq_policy *policy) ...@@ -487,7 +487,8 @@ static unsigned int get_perf_level_count(struct cpufreq_policy *policy)
cpu_data = policy->driver_data; cpu_data = policy->driver_data;
perf_caps = &cpu_data->perf_caps; perf_caps = &cpu_data->perf_caps;
max_cap = arch_scale_cpu_capacity(cpu); max_cap = arch_scale_cpu_capacity(cpu);
min_cap = div_u64(max_cap * perf_caps->lowest_perf, perf_caps->highest_perf); min_cap = div_u64((u64)max_cap * perf_caps->lowest_perf,
perf_caps->highest_perf);
if ((min_cap == 0) || (max_cap < min_cap)) if ((min_cap == 0) || (max_cap < min_cap))
return 0; return 0;
return 1 + max_cap / CPPC_EM_CAP_STEP - min_cap / CPPC_EM_CAP_STEP; return 1 + max_cap / CPPC_EM_CAP_STEP - min_cap / CPPC_EM_CAP_STEP;
...@@ -519,10 +520,10 @@ static int cppc_get_cpu_power(struct device *cpu_dev, ...@@ -519,10 +520,10 @@ static int cppc_get_cpu_power(struct device *cpu_dev,
cpu_data = policy->driver_data; cpu_data = policy->driver_data;
perf_caps = &cpu_data->perf_caps; perf_caps = &cpu_data->perf_caps;
max_cap = arch_scale_cpu_capacity(cpu_dev->id); max_cap = arch_scale_cpu_capacity(cpu_dev->id);
min_cap = div_u64(max_cap * perf_caps->lowest_perf, min_cap = div_u64((u64)max_cap * perf_caps->lowest_perf,
perf_caps->highest_perf); perf_caps->highest_perf);
perf_step = div_u64((u64)CPPC_EM_CAP_STEP * perf_caps->highest_perf,
perf_step = CPPC_EM_CAP_STEP * perf_caps->highest_perf / max_cap; max_cap);
min_step = min_cap / CPPC_EM_CAP_STEP; min_step = min_cap / CPPC_EM_CAP_STEP;
max_step = max_cap / CPPC_EM_CAP_STEP; max_step = max_cap / CPPC_EM_CAP_STEP;
......
...@@ -137,6 +137,7 @@ static const struct of_device_id blocklist[] __initconst = { ...@@ -137,6 +137,7 @@ static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "nvidia,tegra30", }, { .compatible = "nvidia,tegra30", },
{ .compatible = "nvidia,tegra124", }, { .compatible = "nvidia,tegra124", },
{ .compatible = "nvidia,tegra210", }, { .compatible = "nvidia,tegra210", },
{ .compatible = "nvidia,tegra234", },
{ .compatible = "qcom,apq8096", }, { .compatible = "qcom,apq8096", },
{ .compatible = "qcom,msm8996", }, { .compatible = "qcom,msm8996", },
...@@ -150,6 +151,7 @@ static const struct of_device_id blocklist[] __initconst = { ...@@ -150,6 +151,7 @@ static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "qcom,sdm845", }, { .compatible = "qcom,sdm845", },
{ .compatible = "qcom,sm6115", }, { .compatible = "qcom,sm6115", },
{ .compatible = "qcom,sm6350", }, { .compatible = "qcom,sm6350", },
{ .compatible = "qcom,sm6375", },
{ .compatible = "qcom,sm8150", }, { .compatible = "qcom,sm8150", },
{ .compatible = "qcom,sm8250", }, { .compatible = "qcom,sm8250", },
{ .compatible = "qcom,sm8350", }, { .compatible = "qcom,sm8350", },
......
...@@ -649,9 +649,10 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) ...@@ -649,9 +649,10 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
{ {
struct clk_hw_onecell_data *clk_data; struct clk_hw_onecell_data *clk_data;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct device_node *soc_node;
struct device *cpu_dev; struct device *cpu_dev;
struct clk *clk; struct clk *clk;
int ret, i, num_domains; int ret, i, num_domains, reg_sz;
clk = clk_get(dev, "xo"); clk = clk_get(dev, "xo");
if (IS_ERR(clk)) if (IS_ERR(clk))
...@@ -679,7 +680,21 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) ...@@ -679,7 +680,21 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
return ret; return ret;
/* Allocate qcom_cpufreq_data based on the available frequency domains in DT */ /* Allocate qcom_cpufreq_data based on the available frequency domains in DT */
num_domains = of_property_count_elems_of_size(dev->of_node, "reg", sizeof(u32) * 4); soc_node = of_get_parent(dev->of_node);
if (!soc_node)
return -EINVAL;
ret = of_property_read_u32(soc_node, "#address-cells", &reg_sz);
if (ret)
goto of_exit;
ret = of_property_read_u32(soc_node, "#size-cells", &i);
if (ret)
goto of_exit;
reg_sz += i;
num_domains = of_property_count_elems_of_size(dev->of_node, "reg", sizeof(u32) * reg_sz);
if (num_domains <= 0) if (num_domains <= 0)
return num_domains; return num_domains;
...@@ -743,6 +758,9 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) ...@@ -743,6 +758,9 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
else else
dev_dbg(dev, "QCOM CPUFreq HW driver initialized\n"); dev_dbg(dev, "QCOM CPUFreq HW driver initialized\n");
of_exit:
of_node_put(soc_node);
return ret; return ret;
} }
......
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