Commit d87be043 authored by Robin Murphy's avatar Robin Murphy Committed by Rafael J. Wysocki

ACPICA: IORT: Update for revision D

IORT revision D contains a few additions and fixes to
currently-supported tables:

- SMMUv3 proximity domain field is enlarged to 4 bytes for consistency
  with SRAT
- Root complex nodes gain an address size limit field equivalent to that
  of named components
- Named component nodes gain a way to describe PASID (substream_ID)
  support, encoded in their flags

Additionally, we fix a couple of outstanding points in passing:
- Add the stall support flag for named components defined in revision C
- Fix SMMUv3 HTTU override mask, which should always have been 2 bits
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarErik Schmauss <erik.schmauss@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent f4fe74cc
...@@ -67,7 +67,7 @@ ...@@ -67,7 +67,7 @@
* IORT - IO Remapping Table * IORT - IO Remapping Table
* *
* Conforms to "IO Remapping Table System Software on ARM Platforms", * Conforms to "IO Remapping Table System Software on ARM Platforms",
* Document number: ARM DEN 0049C, May 2017 * Document number: ARM DEN 0049D, March 2018
* *
******************************************************************************/ ******************************************************************************/
...@@ -152,10 +152,17 @@ struct acpi_iort_named_component { ...@@ -152,10 +152,17 @@ struct acpi_iort_named_component {
char device_name[1]; /* Path of namespace object */ char device_name[1]; /* Path of namespace object */
}; };
/* Masks for Flags field above */
#define ACPI_IORT_NC_STALL_SUPPORTED (1)
#define ACPI_IORT_NC_PASID_BITS (31<<1)
struct acpi_iort_root_complex { struct acpi_iort_root_complex {
u64 memory_properties; /* Memory access properties */ u64 memory_properties; /* Memory access properties */
u32 ats_attribute; u32 ats_attribute;
u32 pci_segment_number; u32 pci_segment_number;
u8 memory_address_limit; /* Memory address size limit */
u8 reserved[3]; /* Reserved, must be zero */
}; };
/* Values for ats_attribute field above */ /* Values for ats_attribute field above */
...@@ -209,9 +216,7 @@ struct acpi_iort_smmu_v3 { ...@@ -209,9 +216,7 @@ struct acpi_iort_smmu_v3 {
u32 pri_gsiv; u32 pri_gsiv;
u32 gerr_gsiv; u32 gerr_gsiv;
u32 sync_gsiv; u32 sync_gsiv;
u8 pxm; u32 pxm;
u8 reserved1;
u16 reserved2;
u32 id_mapping_index; u32 id_mapping_index;
}; };
...@@ -224,7 +229,7 @@ struct acpi_iort_smmu_v3 { ...@@ -224,7 +229,7 @@ struct acpi_iort_smmu_v3 {
/* Masks for Flags field above */ /* Masks for Flags field above */
#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1) #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
/******************************************************************************* /*******************************************************************************
......
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