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Commit d899b35f authored by Alan Cox's avatar Alan Cox Committed by Linus Torvalds
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[PATCH] update aec ide for new ifdefs

parent eb7ac3cd
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Showing with 0 additions and 10 deletions
drivers/ide/pci/aec62xx.c
View file @ d899b35f
...@@ -292,7 +292,6 @@ static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed) ...@@ -292,7 +292,6 @@ static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed)
} }
} }
#ifdef CONFIG_BLK_DEV_IDEDMA
static int config_chipset_for_dma (ide_drive_t *drive) static int config_chipset_for_dma (ide_drive_t *drive)
{ {
u8 speed = ide_dma_speed(drive, aec62xx_ratemask(drive)); u8 speed = ide_dma_speed(drive, aec62xx_ratemask(drive));
...@@ -303,7 +302,6 @@ static int config_chipset_for_dma (ide_drive_t *drive) ...@@ -303,7 +302,6 @@ static int config_chipset_for_dma (ide_drive_t *drive)
(void) aec62xx_tune_chipset(drive, speed); (void) aec62xx_tune_chipset(drive, speed);
return ide_dma_enable(drive); return ide_dma_enable(drive);
} }
#endif /* CONFIG_BLK_DEV_IDEDMA */
static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
{ {
...@@ -321,7 +319,6 @@ static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) ...@@ -321,7 +319,6 @@ static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
(void) aec62xx_tune_chipset(drive, speed); (void) aec62xx_tune_chipset(drive, speed);
} }
#ifdef CONFIG_BLK_DEV_IDEDMA
static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
{ {
ide_hwif_t *hwif = HWIF(drive); ide_hwif_t *hwif = HWIF(drive);
...@@ -405,7 +402,6 @@ static int aec62xx_irq_timeout (ide_drive_t *drive) ...@@ -405,7 +402,6 @@ static int aec62xx_irq_timeout (ide_drive_t *drive)
#endif #endif
return 0; return 0;
} }
#endif /* CONFIG_BLK_DEV_IDEDMA */
static unsigned int __init init_chipset_aec62xx (struct pci_dev *dev, const char *name) static unsigned int __init init_chipset_aec62xx (struct pci_dev *dev, const char *name)
{ {
...@@ -457,7 +453,6 @@ static void __init init_hwif_aec62xx (ide_hwif_t *hwif) ...@@ -457,7 +453,6 @@ static void __init init_hwif_aec62xx (ide_hwif_t *hwif)
hwif->mwdma_mask = 0x07; hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07; hwif->swdma_mask = 0x07;
#ifdef CONFIG_BLK_DEV_IDEDMA
hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate; hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate;
hwif->ide_dma_lostirq = &aec62xx_irq_timeout; hwif->ide_dma_lostirq = &aec62xx_irq_timeout;
hwif->ide_dma_timeout = &aec62xx_irq_timeout; hwif->ide_dma_timeout = &aec62xx_irq_timeout;
...@@ -465,7 +460,6 @@ static void __init init_hwif_aec62xx (ide_hwif_t *hwif) ...@@ -465,7 +460,6 @@ static void __init init_hwif_aec62xx (ide_hwif_t *hwif)
hwif->autodma = 1; hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma; hwif->drives[0].autodma = hwif->autodma;
hwif->drives[1].autodma = hwif->autodma; hwif->drives[1].autodma = hwif->autodma;
#endif /* CONFIG_BLK_DEV_IDEDMA */
} }
static void __init init_dma_aec62xx (ide_hwif_t *hwif, unsigned long dmabase) static void __init init_dma_aec62xx (ide_hwif_t *hwif, unsigned long dmabase)
......
drivers/ide/pci/aec62xx.h
View file @ d899b35f
...@@ -14,7 +14,6 @@ struct chipset_bus_clock_list_entry { ...@@ -14,7 +14,6 @@ struct chipset_bus_clock_list_entry {
}; };
struct chipset_bus_clock_list_entry aec6xxx_33_base [] = { struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
#ifdef CONFIG_BLK_DEV_IDEDMA
{ XFER_UDMA_6, 0x31, 0x07 }, { XFER_UDMA_6, 0x31, 0x07 },
{ XFER_UDMA_5, 0x31, 0x06 }, { XFER_UDMA_5, 0x31, 0x06 },
{ XFER_UDMA_4, 0x31, 0x05 }, { XFER_UDMA_4, 0x31, 0x05 },
...@@ -26,7 +25,6 @@ struct chipset_bus_clock_list_entry aec6xxx_33_base [] = { ...@@ -26,7 +25,6 @@ struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
{ XFER_MW_DMA_2, 0x31, 0x00 }, { XFER_MW_DMA_2, 0x31, 0x00 },
{ XFER_MW_DMA_1, 0x31, 0x00 }, { XFER_MW_DMA_1, 0x31, 0x00 },
{ XFER_MW_DMA_0, 0x0a, 0x00 }, { XFER_MW_DMA_0, 0x0a, 0x00 },
#endif /* CONFIG_BLK_DEV_IDEDMA */
{ XFER_PIO_4, 0x31, 0x00 }, { XFER_PIO_4, 0x31, 0x00 },
{ XFER_PIO_3, 0x33, 0x00 }, { XFER_PIO_3, 0x33, 0x00 },
{ XFER_PIO_2, 0x08, 0x00 }, { XFER_PIO_2, 0x08, 0x00 },
...@@ -36,7 +34,6 @@ struct chipset_bus_clock_list_entry aec6xxx_33_base [] = { ...@@ -36,7 +34,6 @@ struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
}; };
struct chipset_bus_clock_list_entry aec6xxx_34_base [] = { struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
#ifdef CONFIG_BLK_DEV_IDEDMA
{ XFER_UDMA_6, 0x41, 0x06 }, { XFER_UDMA_6, 0x41, 0x06 },
{ XFER_UDMA_5, 0x41, 0x05 }, { XFER_UDMA_5, 0x41, 0x05 },
{ XFER_UDMA_4, 0x41, 0x04 }, { XFER_UDMA_4, 0x41, 0x04 },
...@@ -48,7 +45,6 @@ struct chipset_bus_clock_list_entry aec6xxx_34_base [] = { ...@@ -48,7 +45,6 @@ struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
{ XFER_MW_DMA_2, 0x41, 0x00 }, { XFER_MW_DMA_2, 0x41, 0x00 },
{ XFER_MW_DMA_1, 0x42, 0x00 }, { XFER_MW_DMA_1, 0x42, 0x00 },
{ XFER_MW_DMA_0, 0x7a, 0x00 }, { XFER_MW_DMA_0, 0x7a, 0x00 },
#endif /* CONFIG_BLK_DEV_IDEDMA */
{ XFER_PIO_4, 0x41, 0x00 }, { XFER_PIO_4, 0x41, 0x00 },
{ XFER_PIO_3, 0x43, 0x00 }, { XFER_PIO_3, 0x43, 0x00 },
{ XFER_PIO_2, 0x78, 0x00 }, { XFER_PIO_2, 0x78, 0x00 },
......
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