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Commit d8ae1967 authored by Mateusz Kulikowski's avatar Mateusz Kulikowski Committed by Greg Kroah-Hartman
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staging: rtl8192e: Rename write_nic_byte 

Use naming schema found in other rtlwifi devices.
Rename write_nic_byte to rtl92e_writeb.
Signed-off-by: default avatarMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 97ef450b
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Showing with 141 additions and 139 deletions
drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c
View file @ d8ae1967
......@@ -81,7 +81,7 @@ bool rtl92e_send_cmd_pkt(struct net_device *dev, u8 *code_virtual_address,
} while (frag_offset < buffer_len);
write_nic_byte(dev, TPPoll, TPPoll_CQ);
rtl92e_writeb(dev, TPPoll, TPPoll_CQ);
Failed:
return rt_status;
}
drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
View file @ d8ae1967
......@@ -49,7 +49,7 @@ void rtl92e_start_beacon(struct net_device *dev)
write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
write_nic_word(dev, BCN_DMATIME, 256);
write_nic_byte(dev, BCN_ERR_THRESH, 100);
rtl92e_writeb(dev, BCN_ERR_THRESH, 100);
BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
......@@ -90,7 +90,7 @@ static void rtl8192e_update_msr(struct net_device *dev)
break;
}
write_nic_byte(dev, MSR, msr);
rtl92e_writeb(dev, MSR, msr);
if (priv->rtllib->LedControlHandler)
priv->rtllib->LedControlHandler(dev, LedAction);
}
......@@ -133,7 +133,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
break;
}
write_nic_byte(dev, MSR, btMsr);
rtl92e_writeb(dev, MSR, btMsr);
}
break;
......@@ -160,7 +160,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
case HW_VAR_SLOT_TIME:
priv->slot_time = val[0];
write_nic_byte(dev, SLOT_TIME, val[0]);
rtl92e_writeb(dev, SLOT_TIME, val[0]);
break;
......@@ -289,20 +289,20 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
RT_TRACE(COMP_QOS,
"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
AcmCtrl);
write_nic_byte(dev, AcmHwCtrl, AcmCtrl);
rtl92e_writeb(dev, AcmHwCtrl, AcmCtrl);
break;
}
case HW_VAR_SIFS:
write_nic_byte(dev, SIFS, val[0]);
write_nic_byte(dev, SIFS+1, val[0]);
rtl92e_writeb(dev, SIFS, val[0]);
rtl92e_writeb(dev, SIFS+1, val[0]);
break;
case HW_VAR_RF_TIMING:
{
u8 Rf_Timing = *((u8 *)val);
write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
rtl92e_writeb(dev, rFPGA0_RFTiming1, Rf_Timing);
break;
}
......@@ -683,7 +683,7 @@ static void rtl8192_hwconfig(struct net_device *dev)
break;
}
write_nic_byte(dev, BW_OPMODE, regBwOpMode);
rtl92e_writeb(dev, BW_OPMODE, regBwOpMode);
{
u32 ratr_value = 0;
......@@ -691,7 +691,7 @@ static void rtl8192_hwconfig(struct net_device *dev)
if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value);
write_nic_byte(dev, UFWP, 1);
rtl92e_writeb(dev, UFWP, 1);
}
regTmp = rtl92e_readb(dev, 0x313);
regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
......@@ -721,7 +721,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
rtl92e_reset_desc_ring(dev);
priv->Rf_Mode = RF_OP_By_SW_3wire;
if (priv->ResetProgress == RESET_TYPE_NORESET) {
write_nic_byte(dev, ANAPAR, 0x37);
rtl92e_writeb(dev, ANAPAR, 0x37);
mdelay(500);
}
priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
......@@ -744,9 +744,9 @@ bool rtl92e_start_adapter(struct net_device *dev)
if (ICVersion >= 0x4) {
SwitchingRegulatorOutput = rtl92e_readb(dev, SWREGULATOR);
if (SwitchingRegulatorOutput != 0xb8) {
write_nic_byte(dev, SWREGULATOR, 0xa8);
rtl92e_writeb(dev, SWREGULATOR, 0xa8);
mdelay(1);
write_nic_byte(dev, SWREGULATOR, 0xb8);
rtl92e_writeb(dev, SWREGULATOR, 0xb8);
}
}
RT_TRACE(COMP_INIT, "BB Config Start!\n");
......@@ -774,10 +774,10 @@ bool rtl92e_start_adapter(struct net_device *dev)
udelay(500);
}
rtl8192_hwconfig(dev);
write_nic_byte(dev, CMDR, CR_RE | CR_TE);
rtl92e_writeb(dev, CMDR, CR_RE | CR_TE);
write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
(MXDMA2_NoLimit<<MXDMA2_TX_SHIFT)));
rtl92e_writeb(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
(MXDMA2_NoLimit<<MXDMA2_TX_SHIFT)));
write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
write_nic_word(dev, MAC4, ((u16 *)(dev->dev_addr + 4))[0]);
write_nic_dword(dev, RCR, priv->ReceiveConfig);
......@@ -805,7 +805,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
write_nic_dword(dev, RRSR, ulRegRead);
write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
write_nic_byte(dev, ACK_TIMEOUT, 0x30);
rtl92e_writeb(dev, ACK_TIMEOUT, 0x30);
if (priv->ResetProgress == RESET_TYPE_NORESET)
rtl92e_set_wireless_mode(dev, priv->rtllib->mode);
......@@ -816,7 +816,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
SECR_value |= SCR_TxEncEnable;
SECR_value |= SCR_RxDecEnable;
SECR_value |= SCR_NoSKMC;
write_nic_byte(dev, SECR, SECR_value);
rtl92e_writeb(dev, SECR, SECR_value);
}
write_nic_word(dev, ATIMWND, 2);
write_nic_word(dev, BCN_INTERVAL, 100);
......@@ -826,7 +826,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
for (i = 0; i < QOS_QUEUE_NUM; i++)
write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
}
write_nic_byte(dev, 0xbe, 0xc0);
rtl92e_writeb(dev, 0xbe, 0xc0);
rtl92e_config_mac(dev);
......@@ -875,7 +875,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
write_nic_byte(dev, 0x87, 0x0);
rtl92e_writeb(dev, 0x87, 0x0);
if (priv->RegRfOff) {
RT_TRACE((COMP_INIT | COMP_RF | COMP_POWER),
......@@ -979,7 +979,7 @@ static void rtl8192_net_update(struct net_device *dev)
write_nic_word(dev, BCN_DMATIME, 256);
write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
write_nic_byte(dev, BCN_ERR_THRESH, 100);
rtl92e_writeb(dev, BCN_ERR_THRESH, 100);
BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
......@@ -1003,7 +1003,7 @@ void rtl92e_link_change(struct net_device *dev)
(KEY_TYPE_WEP104 == ieee->pairwise_key_type))
rtl92e_enable_hw_security_config(dev);
} else {
write_nic_byte(dev, 0x173, 0);
rtl92e_writeb(dev, 0x173, 0);
}
rtl8192e_update_msr(dev);
......@@ -2108,7 +2108,7 @@ void rtl92e_stop_adapter(struct net_device *dev, bool reset)
if (!priv->rtllib->bSupportRemoteWakeUp) {
u1bTmp = 0x0;
write_nic_byte(dev, CMDR, u1bTmp);
rtl92e_writeb(dev, CMDR, u1bTmp);
}
mdelay(20);
......@@ -2129,8 +2129,8 @@ void rtl92e_stop_adapter(struct net_device *dev, bool reset)
write_nic_dword(dev, WFCRC2, 0xffffffff);
write_nic_byte(dev, PMR, 0x5);
write_nic_byte(dev, MacBlkCtrl, 0xa);
rtl92e_writeb(dev, PMR, 0x5);
rtl92e_writeb(dev, MacBlkCtrl, 0xa);
}
}
......@@ -2186,7 +2186,7 @@ void rtl92e_update_ratr_table(struct net_device *dev)
ieee->pHTInfo->bCurShortGI20MHz)
ratr_value |= 0x80000000;
write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
write_nic_byte(dev, UFWP, 1);
rtl92e_writeb(dev, UFWP, 1);
}
void
......
drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c
View file @ d8ae1967
......@@ -96,7 +96,7 @@ static bool fw_download_code(struct net_device *dev, u8 *code_virtual_address,
} while (frag_offset < buffer_len);
write_nic_byte(dev, TPPoll, TPPoll_CQ);
rtl92e_writeb(dev, TPPoll, TPPoll_CQ);
return true;
}
......@@ -123,8 +123,8 @@ static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
}
CPU_status = rtl92e_readl(dev, CPU_GEN);
write_nic_byte(dev, CPU_GEN,
(u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
rtl92e_writeb(dev, CPU_GEN,
(u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
mdelay(1);
timeout = jiffies + msecs_to_jiffies(200);
......
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
View file @ d8ae1967
......@@ -553,7 +553,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev)
u32 dwRegValue = 0;
bRegValue = rtl92e_readb(dev, BB_GLOBAL_RESET);
write_nic_byte(dev, BB_GLOBAL_RESET, (bRegValue|BB_GLOBAL_RESET_BIT));
rtl92e_writeb(dev, BB_GLOBAL_RESET, (bRegValue|BB_GLOBAL_RESET_BIT));
dwRegValue = rtl92e_readl(dev, CPU_GEN);
write_nic_dword(dev, CPU_GEN, (dwRegValue&(~CPU_GEN_BB_RST)));
......@@ -943,8 +943,8 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel,
(u16)CurrentCmd->Para2);
break;
case CmdID_WritePortUchar:
write_nic_byte(dev, CurrentCmd->Para1,
(u8)CurrentCmd->Para2);
rtl92e_writeb(dev, CurrentCmd->Para1,
(u8)CurrentCmd->Para2);
break;
case CmdID_RF_WriteReg:
for (eRFPath = 0; eRFPath <
......@@ -1182,12 +1182,12 @@ static void rtl8192_SetBWModeWorkItem(struct net_device *dev)
switch (priv->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
regBwOpMode |= BW_OPMODE_20MHZ;
write_nic_byte(dev, BW_OPMODE, regBwOpMode);
rtl92e_writeb(dev, BW_OPMODE, regBwOpMode);
break;
case HT_CHANNEL_WIDTH_20_40:
regBwOpMode &= ~BW_OPMODE_20MHZ;
write_nic_byte(dev, BW_OPMODE, regBwOpMode);
rtl92e_writeb(dev, BW_OPMODE, regBwOpMode);
break;
default:
......@@ -1341,13 +1341,13 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation)
RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x\n",
initial_gain);
write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
rtl92e_writeb(dev, rOFDM0_XAAGCCore1, initial_gain);
rtl92e_writeb(dev, rOFDM0_XBAGCCore1, initial_gain);
rtl92e_writeb(dev, rOFDM0_XCAGCCore1, initial_gain);
rtl92e_writeb(dev, rOFDM0_XDAGCCore1, initial_gain);
RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x\n",
POWER_DETECTION_TH);
write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
rtl92e_writeb(dev, 0xa0a, POWER_DETECTION_TH);
break;
case IG_Restore:
RT_TRACE(COMP_SCAN,
......@@ -1409,7 +1409,7 @@ void rtl92e_set_rf_off(struct net_device *dev)
rtl92e_set_bb_reg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07);
rtl92e_writeb(dev, ANAPAR_FOR_8192PciE, 0x07);
}
......@@ -1455,7 +1455,7 @@ static bool SetRFPowerState8190(struct net_device *dev,
RT_CLEAR_PS_LEVEL(pPSC,
RT_RF_OFF_LEVL_HALT_NIC);
} else {
write_nic_byte(dev, ANAPAR, 0x37);
rtl92e_writeb(dev, ANAPAR, 0x37);
mdelay(1);
rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1,
0x4, 0x1);
......
drivers/staging/rtl8192e/rtl8192e/rtl_cam.c
View file @ d8ae1967
......@@ -65,7 +65,7 @@ void rtl92e_enable_hw_security_config(struct net_device *dev)
RT_TRACE(COMP_SEC, "%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n",
__func__, ieee->hwsec_active, ieee->pairwise_key_type,
SECR_value);
write_nic_byte(dev, SECR, SECR_value);
rtl92e_writeb(dev, SECR, SECR_value);
}
void rtl92e_set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex,
......
drivers/staging/rtl8192e/rtl8192e/rtl_core.c
View file @ d8ae1967
......@@ -125,7 +125,7 @@ u16 rtl92e_readw(struct net_device *dev, int x)
return readw((u8 __iomem *)dev->mem_start + x);
}
void write_nic_byte(struct net_device *dev, int x, u8 y)
void rtl92e_writeb(struct net_device *dev, int x, u8 y)
{
writeb(y, (u8 __iomem *)dev->mem_start + x);
......@@ -1385,7 +1385,7 @@ static void rtl819x_ifsilentreset(struct net_device *dev)
priv->bForcedSilentReset = false;
priv->bResetInProgress = false;
write_nic_byte(dev, UFWP, 1);
rtl92e_writeb(dev, UFWP, 1);
RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n",
priv->reset_count);
}
......@@ -2393,7 +2393,7 @@ static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
}
if ((ieee->pairwise_key_type == KEY_TYPE_CCMP)
&& ieee->pHTInfo->bCurrentHTSupport) {
write_nic_byte(dev, 0x173, 1);
rtl92e_writeb(dev, 0x173, 1);
}
} else {
......
drivers/staging/rtl8192e/rtl8192e/rtl_core.h
View file @ d8ae1967
......@@ -581,7 +581,7 @@ extern const struct ethtool_ops rtl819x_ethtool_ops;
u8 rtl92e_readb(struct net_device *dev, int x);
u32 rtl92e_readl(struct net_device *dev, int x);
u16 rtl92e_readw(struct net_device *dev, int x);
void write_nic_byte(struct net_device *dev, int x, u8 y);
void rtl92e_writeb(struct net_device *dev, int x, u8 y);
void write_nic_word(struct net_device *dev, int x, u16 y);
void write_nic_dword(struct net_device *dev, int x, u32 y);
......
drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
View file @ d8ae1967
This diff is collapsed.
drivers/staging/rtl8192e/rtl8192e/rtl_eeprom.c
View file @ d8ae1967
......@@ -28,12 +28,13 @@
static void eprom_cs(struct net_device *dev, short bit)
{
if (bit)
write_nic_byte(dev, EPROM_CMD,
(1 << EPROM_CS_SHIFT) |
rtl92e_readb(dev, EPROM_CMD));
rtl92e_writeb(dev, EPROM_CMD,
(1 << EPROM_CS_SHIFT) |
rtl92e_readb(dev, EPROM_CMD));
else
write_nic_byte(dev, EPROM_CMD, rtl92e_readb(dev, EPROM_CMD)
& ~(1<<EPROM_CS_SHIFT));
rtl92e_writeb(dev, EPROM_CMD,
rtl92e_readb(dev, EPROM_CMD) &
~(1<<EPROM_CS_SHIFT));
udelay(EPROM_DELAY);
}
......@@ -41,11 +42,11 @@ static void eprom_cs(struct net_device *dev, short bit)
static void eprom_ck_cycle(struct net_device *dev)
{
write_nic_byte(dev, EPROM_CMD,
(1<<EPROM_CK_SHIFT) | rtl92e_readb(dev, EPROM_CMD));
rtl92e_writeb(dev, EPROM_CMD,
(1<<EPROM_CK_SHIFT) | rtl92e_readb(dev, EPROM_CMD));
udelay(EPROM_DELAY);
write_nic_byte(dev, EPROM_CMD,
rtl92e_readb(dev, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT));
rtl92e_writeb(dev, EPROM_CMD,
rtl92e_readb(dev, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT));
udelay(EPROM_DELAY);
}
......@@ -53,11 +54,12 @@ static void eprom_ck_cycle(struct net_device *dev)
static void eprom_w(struct net_device *dev, short bit)
{
if (bit)
write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) |
rtl92e_readb(dev, EPROM_CMD));
rtl92e_writeb(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) |
rtl92e_readb(dev, EPROM_CMD));
else
write_nic_byte(dev, EPROM_CMD, rtl92e_readb(dev, EPROM_CMD)
& ~(1<<EPROM_W_SHIFT));
rtl92e_writeb(dev, EPROM_CMD,
rtl92e_readb(dev, EPROM_CMD) &
~(1<<EPROM_W_SHIFT));
udelay(EPROM_DELAY);
}
......@@ -95,8 +97,8 @@ u32 eprom_read(struct net_device *dev, u32 addr)
u32 ret;
ret = 0;
write_nic_byte(dev, EPROM_CMD,
(EPROM_CMD_PROGRAM << EPROM_CMD_OPERATING_MODE_SHIFT));
rtl92e_writeb(dev, EPROM_CMD,
(EPROM_CMD_PROGRAM << EPROM_CMD_OPERATING_MODE_SHIFT));
udelay(EPROM_DELAY);
if (priv->epromtype == EEPROM_93C56) {
......@@ -133,7 +135,7 @@ u32 eprom_read(struct net_device *dev, u32 addr)
eprom_cs(dev, 0);
eprom_ck_cycle(dev);
write_nic_byte(dev, EPROM_CMD,
(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
rtl92e_writeb(dev, EPROM_CMD,
(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
return ret;
}
drivers/staging/rtl8192e/rtl8192e/rtl_pm.c
View file @ d8ae1967
......@@ -53,8 +53,8 @@ int rtl8192E_suspend(struct pci_dev *pdev, pm_message_t state)
write_nic_dword(dev, WFCRC0, 0xffffffff);
write_nic_dword(dev, WFCRC1, 0xffffffff);
write_nic_dword(dev, WFCRC2, 0xffffffff);
write_nic_byte(dev, PMR, 0x5);
write_nic_byte(dev, MacBlkCtrl, 0xa);
rtl92e_writeb(dev, PMR, 0x5);
rtl92e_writeb(dev, MacBlkCtrl, 0xa);
}
out_pci_suspend:
netdev_info(dev, "WOL is %s\n", priv->rtllib->bSupportRemoteWakeUp ?
......
drivers/staging/rtl8192e/rtl8192e/rtl_wx.c
View file @ d8ae1967
......@@ -961,7 +961,7 @@ static int r8192_wx_set_enc_ext(struct net_device *dev,
} else {
if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) &&
ieee->pHTInfo->bCurrentHTSupport)
write_nic_byte(dev, 0x173, 1);
rtl92e_writeb(dev, 0x173, 1);
rtl92e_set_key(dev, 4, idx, alg,
(u8 *)ieee->ap_mac_addr, 0, key);
rtl92e_set_swcam(dev, 4, idx, alg,
......
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