Commit d8cfb80c authored by Vladimir Kondratiev's avatar Vladimir Kondratiev Committed by Kalle Valo

wil6210: detect HW capabilities

Read relevant information (HW ID for now) once on init
and set capabilities accordingly.
Signed-off-by: default avatarVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent 49cb5dfb
......@@ -31,6 +31,36 @@ static bool debug_fw; /* = false; */
module_param(debug_fw, bool, S_IRUGO);
MODULE_PARM_DESC(debug_fw, " load driver if FW not ready. For FW debug");
static
void wil_set_capabilities(struct wil6210_priv *wil)
{
u32 rev_id = ioread32(wil->csr + HOSTADDR(RGF_USER_JTAG_DEV_ID));
bitmap_zero(wil->hw_capabilities, hw_capability_last);
switch (rev_id) {
case JTAG_DEV_ID_MARLON_B0:
wil_info(wil, "Board hardware is Marlon B0\n");
wil->hw_version = HW_VER_MARLON_B0;
break;
case JTAG_DEV_ID_SPARROW_A0:
wil_info(wil, "Board hardware is Sparrow A0\n");
wil->hw_version = HW_VER_SPARROW_A0;
break;
case JTAG_DEV_ID_SPARROW_A1:
wil_info(wil, "Board hardware is Sparrow A1\n");
wil->hw_version = HW_VER_SPARROW_A1;
break;
case JTAG_DEV_ID_SPARROW_B0:
wil_info(wil, "Board hardware is Sparrow B0\n");
wil->hw_version = HW_VER_SPARROW_B0;
break;
default:
wil_err(wil, "Unknown board hardware 0x%08x\n", rev_id);
wil->hw_version = HW_VER_UNKNOWN;
}
}
void wil_disable_irq(struct wil6210_priv *wil)
{
int irq = wil->pdev->irq;
......@@ -205,7 +235,7 @@ static int wil_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
pci_set_drvdata(pdev, wil);
wil->pdev = pdev;
wil->board = board;
wil_set_capabilities(wil);
wil6210_clear_irq(wil);
wil->platform_handle =
......
......@@ -188,6 +188,20 @@ struct RGF_ICR {
#define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
#define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
#define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
#define JTAG_DEV_ID_MARLON_B0 (0x0612072f)
#define JTAG_DEV_ID_SPARROW_A0 (0x0632072f)
#define JTAG_DEV_ID_SPARROW_A1 (0x1632072f)
#define JTAG_DEV_ID_SPARROW_B0 (0x2632072f)
enum {
HW_VER_UNKNOWN,
HW_VER_MARLON_B0, /* JTAG_DEV_ID_MARLON_B0 */
HW_VER_SPARROW_A0, /* JTAG_DEV_ID_SPARROW_A0 */
HW_VER_SPARROW_A1, /* JTAG_DEV_ID_SPARROW_A1 */
HW_VER_SPARROW_B0, /* JTAG_DEV_ID_SPARROW_B0 */
};
/* popular locations */
#define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
......@@ -426,6 +440,11 @@ enum {
fw_recovery_running = 2,
};
enum {
hw_capability_dummy, /* to avoid zero array */
hw_capability_last
};
struct wil_back_rx {
struct list_head list;
/* request params, converted to CPU byte order - what we asked for */
......@@ -452,6 +471,7 @@ struct wil6210_priv {
DECLARE_BITMAP(status, wil_status_last);
u32 fw_version;
u32 hw_version;
DECLARE_BITMAP(hw_capabilities, hw_capability_last);
struct wil_board *board;
u8 n_mids; /* number of additional MIDs as reported by FW */
u32 recovery_count; /* num of FW recovery attempts in a short time */
......
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