Commit d9c41bf3 authored by Boris Brezillon's avatar Boris Brezillon Committed by Alexandre Belloni

ARM: dts: at91: Declare EBI/NAND controllers

Declare new nodes for the EBI and NAND controllers embedded in various
at91/sama5 SoCs.
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 3a689dcb
...@@ -99,6 +99,16 @@ ramc0: ramc@ffffea00 { ...@@ -99,6 +99,16 @@ ramc0: ramc@ffffea00 {
reg = <0xffffea00 0x200>; reg = <0xffffea00 0x200>;
}; };
smc: smc@ffffec00 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffec00 0x200>;
};
matrix: matrix@ffffee00 {
compatible = "atmel,at91sam9260-matrix", "syscon";
reg = <0xffffee00 0x200>;
};
pmc: pmc@fffffc00 { pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9260-pmc", "syscon"; compatible = "atmel,at91sam9260-pmc", "syscon";
reg = <0xfffffc00 0x100>; reg = <0xfffffc00 0x100>;
...@@ -1011,6 +1021,33 @@ usb0: ohci@500000 { ...@@ -1011,6 +1021,33 @@ usb0: ohci@500000 {
clock-names = "ohci_clk", "hclk", "uhpck"; clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,at91sam9260-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x80000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000
0x6 0x0 0x70000000 0x10000000
0x7 0x0 0x80000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,at91sam9260-nand-controller";
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
}; };
i2c-gpio-0 { i2c-gpio-0 {
......
...@@ -91,6 +91,33 @@ fb0: fb@0x00600000 { ...@@ -91,6 +91,33 @@ fb0: fb@0x00600000 {
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,at91sam9261-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x80000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000
0x6 0x0 0x70000000 0x10000000
0x7 0x0 0x80000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,at91sam9261-nand-controller";
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
nand0: nand@40000000 { nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand"; compatible = "atmel,at91rm9200-nand";
#address-cells = <1>; #address-cells = <1>;
...@@ -262,6 +289,11 @@ ramc: ramc@ffffea00 { ...@@ -262,6 +289,11 @@ ramc: ramc@ffffea00 {
reg = <0xffffea00 0x200>; reg = <0xffffea00 0x200>;
}; };
smc: smc@ffffec00 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffec00 0x200>;
};
matrix: matrix@ffffee00 { matrix: matrix@ffffee00 {
compatible = "atmel,at91sam9261-matrix", "syscon"; compatible = "atmel,at91sam9261-matrix", "syscon";
reg = <0xffffee00 0x200>; reg = <0xffffee00 0x200>;
......
...@@ -361,11 +361,26 @@ ramc0: ramc@ffffe200 { ...@@ -361,11 +361,26 @@ ramc0: ramc@ffffe200 {
reg = <0xffffe200 0x200>; reg = <0xffffe200 0x200>;
}; };
smc0: smc@ffffe400 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffe400 0x200>;
};
ramc1: ramc@ffffe800 { ramc1: ramc@ffffe800 {
compatible = "atmel,at91sam9260-sdramc"; compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffe800 0x200>; reg = <0xffffe800 0x200>;
}; };
smc1: smc@ffffea00 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffea00 0x200>;
};
matrix: matrix@ffffec00 {
compatible = "atmel,at91sam9263-matrix", "syscon";
reg = <0xffffec00 0x200>;
};
pit: timer@fffffd30 { pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit"; compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>; reg = <0xfffffd30 0xf>;
...@@ -1017,6 +1032,52 @@ usb0: ohci@00a00000 { ...@@ -1017,6 +1032,52 @@ usb0: ohci@00a00000 {
clock-names = "ohci_clk", "hclk", "uhpck"; clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled"; status = "disabled";
}; };
ebi0: ebi@10000000 {
compatible = "atmel,at91sam9263-ebi0";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc0>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x80000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller0: nand-controller {
compatible = "atmel,at91sam9260-nand-controller";
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
ebi1: ebi@70000000 {
compatible = "atmel,at91sam9263-ebi1";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc1>;
atmel,matrix = <&matrix>;
reg = <0x80000000 0x20000000>;
ranges = <0x0 0x0 0x80000000 0x10000000
0x1 0x0 0x90000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller1: nand-controller {
compatible = "atmel,at91sam9260-nand-controller";
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
}; };
i2c-gpio-0 { i2c-gpio-0 {
......
...@@ -113,6 +113,16 @@ ramc1: ramc@ffffe600 { ...@@ -113,6 +113,16 @@ ramc1: ramc@ffffe600 {
clock-names = "ddrck"; clock-names = "ddrck";
}; };
smc: smc@ffffe800 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffe800 0x200>;
};
matrix: matrix@ffffea00 {
compatible = "atmel,at91sam9g45-matrix", "syscon";
reg = <0xffffea00 0x200>;
};
pmc: pmc@fffffc00 { pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g45-pmc", "syscon"; compatible = "atmel,at91sam9g45-pmc", "syscon";
reg = <0xfffffc00 0x100>; reg = <0xfffffc00 0x100>;
...@@ -1314,6 +1324,31 @@ usb1: ehci@00800000 { ...@@ -1314,6 +1324,31 @@ usb1: ehci@00800000 {
clock-names = "usb_clk", "ehci_clk"; clock-names = "usb_clk", "ehci_clk";
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,at91sam9g45-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x80000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,at91sam9g45-nand-controller";
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
}; };
i2c-gpio-0 { i2c-gpio-0 {
......
...@@ -89,6 +89,17 @@ aic: interrupt-controller@fffff000 { ...@@ -89,6 +89,17 @@ aic: interrupt-controller@fffff000 {
atmel,external-irqs = <31>; atmel,external-irqs = <31>;
}; };
matrix: matrix@ffffde00 {
compatible = "atmel,at91sam9n12-matrix", "syscon";
reg = <0xffffde00 0x100>;
};
pmecc: ecc-engine@ffffe000 {
compatible = "atmel,at91sam9g45-pmecc";
reg = <0xffffe000 0x600>,
<0xffffe600 0x200>;
};
ramc0: ramc@ffffe800 { ramc0: ramc@ffffe800 {
compatible = "atmel,at91sam9g45-ddramc"; compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe800 0x200>; reg = <0xffffe800 0x200>;
...@@ -96,6 +107,11 @@ ramc0: ramc@ffffe800 { ...@@ -96,6 +107,11 @@ ramc0: ramc@ffffe800 {
clock-names = "ddrck"; clock-names = "ddrck";
}; };
smc: smc@ffffea00 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffea00 0x200>;
};
pmc: pmc@fffffc00 { pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9n12-pmc", "syscon"; compatible = "atmel,at91sam9n12-pmc", "syscon";
reg = <0xfffffc00 0x200>; reg = <0xfffffc00 0x200>;
...@@ -1028,6 +1044,32 @@ usb0: ohci@00500000 { ...@@ -1028,6 +1044,32 @@ usb0: ohci@00500000 {
clock-names = "ohci_clk", "hclk", "uhpck"; clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,at91sam9x5-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x60000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,at91sam9g45-nand-controller";
ecc-engine = <&pmecc>;
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
}; };
i2c-gpio-0 { i2c-gpio-0 {
......
...@@ -92,6 +92,31 @@ fb0: fb@00500000 { ...@@ -92,6 +92,31 @@ fb0: fb@00500000 {
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,at91sam9rl-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x80000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,at91sam9g45-nand-controller";
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
nand0: nand@40000000 { nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand"; compatible = "atmel,at91rm9200-nand";
#address-cells = <1>; #address-cells = <1>;
...@@ -364,6 +389,16 @@ ramc0: ramc@ffffea00 { ...@@ -364,6 +389,16 @@ ramc0: ramc@ffffea00 {
reg = <0xffffea00 0x200>; reg = <0xffffea00 0x200>;
}; };
smc: smc@ffffec00 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffec00 0x200>;
};
matrix: matrix@ffffee00 {
compatible = "atmel,at91sam9rl-matrix", "syscon";
reg = <0xffffee00 0x200>;
};
aic: interrupt-controller@fffff000 { aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
compatible = "atmel,at91rm9200-aic"; compatible = "atmel,at91rm9200-aic";
......
...@@ -97,6 +97,17 @@ aic: interrupt-controller@fffff000 { ...@@ -97,6 +97,17 @@ aic: interrupt-controller@fffff000 {
atmel,external-irqs = <31>; atmel,external-irqs = <31>;
}; };
matrix: matrix@ffffde00 {
compatible = "atmel,at91sam9x5-matrix", "syscon";
reg = <0xffffde00 0x100>;
};
pmecc: ecc-engine@ffffe000 {
compatible = "atmel,at91sam9g45-pmecc";
reg = <0xffffe000 0x600>,
<0xffffe600 0x200>;
};
ramc0: ramc@ffffe800 { ramc0: ramc@ffffe800 {
compatible = "atmel,at91sam9g45-ddramc"; compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe800 0x200>; reg = <0xffffe800 0x200>;
...@@ -104,6 +115,11 @@ ramc0: ramc@ffffe800 { ...@@ -104,6 +115,11 @@ ramc0: ramc@ffffe800 {
clock-names = "ddrck"; clock-names = "ddrck";
}; };
smc: smc@ffffea00 {
compatible = "atmel,at91sam9260-smc", "syscon";
reg = <0xffffea00 0x200>;
};
pmc: pmc@fffffc00 { pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9x5-pmc", "syscon"; compatible = "atmel,at91sam9x5-pmc", "syscon";
reg = <0xfffffc00 0x200>; reg = <0xfffffc00 0x200>;
...@@ -1236,6 +1252,32 @@ usb1: ehci@00700000 { ...@@ -1236,6 +1252,32 @@ usb1: ehci@00700000 {
clock-names = "usb_clk", "ehci_clk"; clock-names = "usb_clk", "ehci_clk";
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,at91sam9x5-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&smc>;
atmel,matrix = <&matrix>;
reg = <0x10000000 0x60000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x20000000 0x10000000
0x2 0x0 0x30000000 0x10000000
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,at91sam9g45-nand-controller";
ecc-engine = <&pmecc>;
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
}; };
i2c-gpio-0 { i2c-gpio-0 {
......
...@@ -135,6 +135,12 @@ ahb { ...@@ -135,6 +135,12 @@ ahb {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
nfc_sram: sram@00100000 {
compatible = "mmio-sram";
no-memory-wc;
reg = <0x00100000 0x2400>;
};
usb0: gadget@00300000 { usb0: gadget@00300000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -291,6 +297,32 @@ L2: cache-controller@00a00000 { ...@@ -291,6 +297,32 @@ L2: cache-controller@00a00000 {
cache-level = <2>; cache-level = <2>;
}; };
ebi: ebi@10000000 {
compatible = "atmel,sama5d3-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&hsmc>;
reg = <0x10000000 0x10000000
0x40000000 0x30000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,sama5d3-nand-controller";
atmel,nfc-sram = <&nfc_sram>;
atmel,nfc-io = <&nfc_io>;
ecc-engine = <&pmecc>;
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
nand0: nand@80000000 { nand0: nand@80000000 {
compatible = "atmel,sama5d2-nand"; compatible = "atmel,sama5d2-nand";
#address-cells = <1>; #address-cells = <1>;
...@@ -347,6 +379,11 @@ sdmmc1: sdio-host@b0000000 { ...@@ -347,6 +379,11 @@ sdmmc1: sdio-host@b0000000 {
status = "disabled"; status = "disabled";
}; };
nfc_io: nfc-io@c0000000 {
compatible = "atmel,sama5d3-nfc-io", "syscon";
reg = <0xc0000000 0x8000000>;
};
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -1010,6 +1047,22 @@ tcb1: timer@f8010000 { ...@@ -1010,6 +1047,22 @@ tcb1: timer@f8010000 {
clock-names = "t0_clk", "slow_clk"; clock-names = "t0_clk", "slow_clk";
}; };
hsmc: hsmc@f8014000 {
compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
reg = <0xf8014000 0x1000>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
clocks = <&hsmc_clk>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
pmecc: ecc-engine@ffffc070 {
compatible = "atmel,sama5d2-pmecc";
reg = <0xffffc070 0x490>,
<0xffffc500 0x100>;
};
};
pdmic: pdmic@f8018000 { pdmic: pdmic@f8018000 {
compatible = "atmel,sama5d2-pdmic"; compatible = "atmel,sama5d2-pdmic";
reg = <0xf8018000 0x124>; reg = <0xf8018000 0x124>;
......
...@@ -429,6 +429,22 @@ trng@f8040000 { ...@@ -429,6 +429,22 @@ trng@f8040000 {
clocks = <&trng_clk>; clocks = <&trng_clk>;
}; };
hsmc: hsmc@ffffc000 {
compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
reg = <0xffffc000 0x1000>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
clocks = <&hsmc_clk>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
pmecc: ecc-engine@ffffc070 {
compatible = "atmel,at91sam9g45-pmecc";
reg = <0xffffc070 0x490>,
<0xffffc500 0x100>;
};
};
dma0: dma-controller@ffffe600 { dma0: dma-controller@ffffe600 {
compatible = "atmel,at91sam9g45-dma"; compatible = "atmel,at91sam9g45-dma";
reg = <0xffffe600 0x200>; reg = <0xffffe600 0x200>;
...@@ -554,6 +570,66 @@ pinctrl_dbgu: dbgu-0 { ...@@ -554,6 +570,66 @@ pinctrl_dbgu: dbgu-0 {
}; };
}; };
ebi {
pinctrl_ebi_addr: ebi-addr-0 {
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nand_addr: ebi-addr-1 {
atmel,pins =
<AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs0: ebi-cs0-0 {
atmel,pins =
<AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs1: ebi-cs1-0 {
atmel,pins =
<AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs2: ebi-cs2-0 {
atmel,pins =
<AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nwait: ebi-nwait-0 {
atmel,pins =
<AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
atmel,pins =
<AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
i2c0 { i2c0 {
pinctrl_i2c0: i2c0-0 { pinctrl_i2c0: i2c0-0 {
atmel,pins = atmel,pins =
...@@ -1326,6 +1402,12 @@ rtc@fffffeb0 { ...@@ -1326,6 +1402,12 @@ rtc@fffffeb0 {
}; };
}; };
nfc_sram: sram@200000 {
compatible = "mmio-sram";
no-memory-wc;
reg = <0x200000 0x2400>;
};
usb0: gadget@00500000 { usb0: gadget@00500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1461,6 +1543,32 @@ usb2: ehci@00700000 { ...@@ -1461,6 +1543,32 @@ usb2: ehci@00700000 {
status = "disabled"; status = "disabled";
}; };
ebi: ebi@10000000 {
compatible = "atmel,sama5d3-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&hsmc>;
reg = <0x10000000 0x10000000
0x40000000 0x30000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x40000000 0x10000000
0x2 0x0 0x50000000 0x10000000
0x3 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,sama5d3-nand-controller";
atmel,nfc-sram = <&nfc_sram>;
atmel,nfc-io = <&nfc_io>;
ecc-engine = <&pmecc>;
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
nand0: nand@60000000 { nand0: nand@60000000 {
compatible = "atmel,at91rm9200-nand"; compatible = "atmel,at91rm9200-nand";
#address-cells = <1>; #address-cells = <1>;
...@@ -1492,5 +1600,10 @@ nfc@70000000 { ...@@ -1492,5 +1600,10 @@ nfc@70000000 {
clocks = <&hsmc_clk>; clocks = <&hsmc_clk>;
}; };
}; };
nfc_io: nfc-io@70000000 {
compatible = "atmel,sama5d3-nfc-io", "syscon";
reg = <0x70000000 0x8000000>;
};
}; };
}; };
...@@ -124,6 +124,12 @@ ahb { ...@@ -124,6 +124,12 @@ ahb {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
nfc_sram: sram@100000 {
compatible = "mmio-sram";
no-memory-wc;
reg = <0x100000 0x2400>;
};
usb0: gadget@00400000 { usb0: gadget@00400000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -280,6 +286,32 @@ L2: cache-controller@00a00000 { ...@@ -280,6 +286,32 @@ L2: cache-controller@00a00000 {
cache-level = <2>; cache-level = <2>;
}; };
ebi: ebi@10000000 {
compatible = "atmel,sama5d3-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&hsmc>;
reg = <0x10000000 0x10000000
0x60000000 0x28000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x8000000>;
clocks = <&mck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,sama5d3-nand-controller";
atmel,nfc-sram = <&nfc_sram>;
atmel,nfc-io = <&nfc_io>;
ecc-engine = <&pmecc>;
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
nand0: nand@80000000 { nand0: nand@80000000 {
compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand"; compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
#address-cells = <1>; #address-cells = <1>;
...@@ -311,6 +343,11 @@ nfc@90000000 { ...@@ -311,6 +343,11 @@ nfc@90000000 {
}; };
}; };
nfc_io: nfc-io@90000000 {
compatible = "atmel,sama5d3-nfc-io", "syscon";
reg = <0x90000000 0x8000000>;
};
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -1287,6 +1324,22 @@ sha@fc050000 { ...@@ -1287,6 +1324,22 @@ sha@fc050000 {
status = "okay"; status = "okay";
}; };
hsmc: smc@fc05c000 {
compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
reg = <0xfc05c000 0x1000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
clocks = <&hsmc_clk>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
pmecc: ecc-engine@ffffc070 {
compatible = "atmel,sama5d4-pmecc";
reg = <0xfc05c070 0x490>,
<0xfc05c500 0x100>;
};
};
rstc@fc068600 { rstc@fc068600 {
compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
reg = <0xfc068600 0x10>; reg = <0xfc068600 0x10>;
...@@ -1447,6 +1500,113 @@ pinctrl_dbgu: dbgu-0 { ...@@ -1447,6 +1500,113 @@ pinctrl_dbgu: dbgu-0 {
}; };
}; };
ebi {
pinctrl_ebi_addr: ebi-addr-0 {
atmel,pins =
<AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nand_addr: ebi-addr-1 {
atmel,pins =
<AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs0: ebi-cs0-0 {
atmel,pins =
<AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs1: ebi-cs1-0 {
atmel,pins =
<AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs2: ebi-cs2-0 {
atmel,pins =
<AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_cs3: ebi-cs3-0 {
atmel,pins =
<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
atmel,pins =
<AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_data_8_15: ebi-data-msb-0 {
atmel,pins =
<AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
atmel,pins =
<AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
atmel,pins =
<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nwait: ebi-nwait-0 {
atmel,pins =
<AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
atmel,pins =
<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
atmel,pins =
<AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
i2c0 { i2c0 {
pinctrl_i2c0: i2c0-0 { pinctrl_i2c0: i2c0-0 {
atmel,pins = atmel,pins =
......
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