Commit d9fd3c1c authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://cifs.bkbits.net/linux-2.5cifs

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 44ce64b1 b596fd12
......@@ -210,6 +210,11 @@ config FORCE_MAX_ZONEORDER
depends on SA1111
default "9"
config DMABOUNCE
bool
depends on SA1111
default y
source arch/arm/mm/Kconfig
# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
......
......@@ -5,6 +5,7 @@
obj-y += platform.o
obj-$(CONFIG_ARM_AMBA) += amba.o
obj-$(CONFIG_ICST525) += icst525.o
obj-$(CONFIG_SA1111) += sa1111.o sa1111-pcibuf.o
obj-$(CONFIG_SA1111) += sa1111.o
obj-$(CONFIG_PCI_HOST_PLX90X0) += plx90x0.o
obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
obj-$(CONFIG_DMABOUNCE) += dmabounce.o
......@@ -25,6 +25,7 @@
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/dma-mapping.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -547,15 +548,6 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
"%4.4lx", info->offset);
/*
* If the parent device has a DMA mask associated with it,
* propagate it down to the children.
*/
if (sachip->dev->dma_mask) {
dev->dma_mask = *sachip->dev->dma_mask;
dev->dev.dma_mask = &dev->dma_mask;
}
dev->devid = info->devid;
dev->dev.parent = sachip->dev;
dev->dev.bus = &sa1111_bus_type;
......@@ -573,15 +565,37 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
if (ret) {
printk("SA1111: failed to allocate resource for %s\n",
dev->res.name);
kfree(dev);
goto out;
}
ret = device_register(&dev->dev);
if (ret) {
release_resource(&dev->res);
out:
kfree(dev);
goto out;
}
/*
* If the parent device has a DMA mask associated with it,
* propagate it down to the children.
*/
if (sachip->dev->dma_mask) {
dev->dma_mask = *sachip->dev->dma_mask;
dev->dev.dma_mask = &dev->dma_mask;
if (dev->dma_mask != 0xffffffffUL) {
ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
if (ret) {
printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
kfree(dev);
device_unregister(dev);
}
}
}
out:
return ret;
}
......@@ -742,61 +756,31 @@ static void __sa1111_remove(struct sa1111 *sachip)
*
* This routine only identifies whether or not a given DMA address
* is susceptible to the bug.
*
* This should only get called for sa1111_device types due to the
* way we configure our device dma_masks.
*/
int sa1111_check_dma_bug(dma_addr_t addr)
int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
{
struct sa1111 *sachip = g_sa1111;
unsigned int physaddr = SA1111_DMA_ADDR((unsigned int)addr);
unsigned int smcr;
u32 dma_mask = *dev->dma_mask;
/* Section 4.6 of the "Intel StrongARM SA-1111 Development Module
/*
* Section 4.6 of the "Intel StrongARM SA-1111 Development Module
* User's Guide" mentions that jumpers R51 and R52 control the
* target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
* SDRAM bank 1 on Neponset). The default configuration selects
* Assabet, so any address in bank 1 is necessarily invalid.
*/
if ((machine_is_assabet() || machine_is_pfs168()) && addr >= 0xc8000000)
return -1;
if ((machine_is_assabet() || machine_is_pfs168()) &&
(addr >= 0xc8000000 || (addr + size) >= 0xc8000000))
return 1;
/* The bug only applies to buffers located more than one megabyte
* above the start of the target bank:
/*
* Check to see if either the start or end are illegal.
*/
if (physaddr<(1<<20))
return 0;
smcr = sa1111_readl(sachip->base + SA1111_SMCR);
switch (FExtr(smcr, SMCR_DRAC)) {
case 01: /* 10 row + bank address bits, A<20> must not be set */
if (physaddr & (1<<20))
return -1;
break;
case 02: /* 11 row + bank address bits, A<23> must not be set */
if (physaddr & (1<<23))
return -1;
break;
case 03: /* 12 row + bank address bits, A<24> must not be set */
if (physaddr & (1<<24))
return -1;
break;
case 04: /* 13 row + bank address bits, A<25> must not be set */
if (physaddr & (1<<25))
return -1;
break;
case 05: /* 14 row + bank address bits, A<20> must not be set */
if (physaddr & (1<<20))
return -1;
break;
case 06: /* 15 row + bank address bits, A<20> must not be set */
if (physaddr & (1<<20))
return -1;
break;
default:
printk(KERN_ERR "%s(): invalid SMCR DRAC value 0%lo\n",
__FUNCTION__, FExtr(smcr, SMCR_DRAC));
return -1;
}
return 0;
return ((addr & ~(*dev->dma_mask))) ||
((addr + size - 1) & ~(*dev->dma_mask));
}
struct sa1111_save_data {
......@@ -1293,7 +1277,6 @@ module_exit(sa1111_exit);
MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
MODULE_LICENSE("GPL");
EXPORT_SYMBOL(sa1111_check_dma_bug);
EXPORT_SYMBOL(sa1111_select_audio_mode);
EXPORT_SYMBOL(sa1111_set_audio_rate);
EXPORT_SYMBOL(sa1111_get_audio_rate);
......
......@@ -965,7 +965,7 @@ static void cdrom_buffer_sectors (ide_drive_t *drive, unsigned long sector,
struct cdrom_info *info = drive->driver_data;
/* Number of sectors to read into the buffer. */
int sectors_to_buffer = MIN (sectors_to_transfer,
int sectors_to_buffer = min_t(int, sectors_to_transfer,
(SECTOR_BUFFER_SIZE >> SECTOR_BITS) -
info->nsectors_buffered);
......@@ -1114,7 +1114,7 @@ static ide_startstop_t cdrom_read_intr (ide_drive_t *drive)
/* First, figure out if we need to bit-bucket
any of the leading sectors. */
nskip = MIN((int)(rq->current_nr_sectors - bio_cur_sectors(rq->bio)), sectors_to_transfer);
nskip = min_t(int, rq->current_nr_sectors - bio_cur_sectors(rq->bio), sectors_to_transfer);
while (nskip > 0) {
/* We need to throw away a sector. */
......@@ -1144,7 +1144,7 @@ static ide_startstop_t cdrom_read_intr (ide_drive_t *drive)
/* Transfer data to the buffers.
Figure out how many sectors we can transfer
to the current buffer. */
this_transfer = MIN (sectors_to_transfer,
this_transfer = min_t(int, sectors_to_transfer,
rq->current_nr_sectors);
/* Read this_transfer sectors
......@@ -1860,7 +1860,7 @@ static ide_startstop_t cdrom_write_intr(ide_drive_t *drive)
/*
* Figure out how many sectors we can transfer
*/
this_transfer = MIN(sectors_to_transfer,rq->current_nr_sectors);
this_transfer = min_t(int, sectors_to_transfer, rq->current_nr_sectors);
while (this_transfer > 0) {
HWIF(drive)->atapi_output_bytes(drive, rq->buffer, SECTOR_SIZE);
......
......@@ -54,8 +54,6 @@
#define BLOCKS_PER_FRAME (CD_FRAMESIZE / BLOCK_SIZE)
#define MIN(a,b) ((a) < (b) ? (a) : (b))
/* special command codes for strategy routine. */
#define PACKET_COMMAND 4315
#define REQUEST_SENSE_COMMAND 4316
......
......@@ -741,7 +741,7 @@ static inline ide_drive_t *choose_drive (ide_hwgroup_t *hwgroup)
&& 0 < (signed long)(WAKEUP(drive) - (jiffies - best->service_time))
&& 0 < (signed long)((jiffies + t) - WAKEUP(drive)))
{
ide_stall_queue(best, IDE_MIN(t, 10 * WAIT_MIN_SLEEP));
ide_stall_queue(best, min_t(long, t, 10 * WAIT_MIN_SLEEP));
goto repeat;
}
} while ((drive = drive->next) != best);
......
......@@ -508,8 +508,8 @@ int proc_ide_write_settings
}
if (*p != ':')
goto parse_error;
len = IDE_MIN(p - start, MAX_LEN);
strncpy(name, start, IDE_MIN(len, MAX_LEN));
len = min(p - start, MAX_LEN);
strncpy(name, start, min(len, MAX_LEN));
name[len] = 0;
if (n > 0) {
......
......@@ -4698,7 +4698,7 @@ static void idetape_setup (ide_drive_t *drive, idetape_tape_t *tape, int minor)
* Ensure that the number we got makes sense; limit
* it within IDETAPE_DSC_RW_MIN and IDETAPE_DSC_RW_MAX.
*/
tape->best_dsc_rw_frequency = max((unsigned long) min(t, (unsigned long) IDETAPE_DSC_RW_MAX), (unsigned long) IDETAPE_DSC_RW_MIN);
tape->best_dsc_rw_frequency = max_t(unsigned long, min_t(unsigned long, t, IDETAPE_DSC_RW_MAX), IDETAPE_DSC_RW_MIN);
printk(KERN_INFO "ide-tape: %s <-> %s: %dKBps, %d*%dkB buffer, "
"%dkB pipeline, %lums tDSC%s\n",
drive->name, tape->name, tape->capabilities.speed,
......
......@@ -243,25 +243,7 @@ int __init ali14xx_init(void)
}
#ifdef MODULE
static void __exit ali14xx_release_hwif(ide_hwif_t *hwif)
{
if (hwif->chipset != ide_ali14xx)
return;
hwif->chipset = ide_unknown;
hwif->tuneproc = NULL;
hwif->mate = NULL;
hwif->channel = 0;
}
static void __exit ali14xx_exit(void)
{
ali14xx_release_hwif(&ide_hwifs[0]);
ali14xx_release_hwif(&ide_hwifs[1]);
}
module_init(ali14xx_init);
module_exit(ali14xx_exit);
#endif
MODULE_AUTHOR("see local file");
......
......@@ -155,27 +155,7 @@ int __init dtc2278_init(void)
}
#ifdef MODULE
static void __exit dtc2278_release_hwif(ide_hwif_t *hwif)
{
if (hwif->chipset != ide_dtc2278)
return;
hwif->serialized = 0;
hwif->chipset = ide_unknown;
hwif->tuneproc = NULL;
hwif->drives[0].no_unmask = 0;
hwif->drives[1].no_unmask = 0;
hwif->mate = NULL;
}
static void __exit dtc2278_exit(void)
{
dtc2278_release_hwif(&ide_hwifs[0]);
dtc2278_release_hwif(&ide_hwifs[1]);
}
module_init(dtc2278_init);
module_exit(dtc2278_exit);
#endif
MODULE_AUTHOR("See Local File");
......
......@@ -360,31 +360,7 @@ int __init ht6560b_init(void)
}
#ifdef MODULE
static void __exit ht6560b_release_hwif(ide_hwif_t *hwif)
{
if (hwif->chipset != ide_ht6560b)
return;
hwif->chipset = ide_unknown;
hwif->tuneproc = NULL;
hwif->selectproc = NULL;
hwif->serialized = 0;
hwif->mate = NULL;
hwif->channel = 0;
hwif->drives[0].drive_data = 0;
hwif->drives[1].drive_data = 0;
}
static void __exit ht6560b_exit(void)
{
ht6560b_release_hwif(&ide_hwifs[0]);
ht6560b_release_hwif(&ide_hwifs[1]);
release_region(HT_CONFIG_PORT, 1);
}
module_init(ht6560b_init);
module_exit(ht6560b_exit);
#endif
MODULE_AUTHOR("See Local File");
......
......@@ -311,29 +311,7 @@ int __init pdc4030_init(void)
}
#ifdef MODULE
static void __exit pdc4030_release_hwif(ide_hwif_t *hwif)
{
hwif->chipset = ide_unknown;
hwif->selectproc = NULL;
hwif->serialized = 0;
hwif->drives[0].io_32bit = 0;
hwif->drives[1].io_32bit = 0;
hwif->drives[0].keep_settings = 0;
hwif->drives[1].keep_settings = 0;
hwif->drives[0].noprobe = 0;
hwif->drives[1].noprobe = 0;
}
static void __exit pdc4030_exit(void)
{
unsigned int index;
for (index = 0; index < MAX_HWIFS; index++)
pdc4030_release_hwif(&ide_hwifs[index]);
}
module_init(pdc4030_init);
module_exit(pdc4030_exit);
#endif
MODULE_AUTHOR("Peter Denison");
......
......@@ -262,7 +262,7 @@ static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
pio = ide_get_best_pio_mode(drive, pio, 255, &d);
pio = IDE_MIN(pio,4);
pio = min_t(u8, pio, 4);
switch (pio) {
case 0: break;
......@@ -354,12 +354,12 @@ static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
probe_hwif_init(hwif);
}
#ifdef MODULE
/*
* qd_unsetup:
*
* called to unsetup an ata channel : back to default values, unlinks tuning
*/
/*
static void __exit qd_unsetup(ide_hwif_t *hwif)
{
u8 config = hwif->config_data;
......@@ -389,7 +389,7 @@ static void __exit qd_unsetup(ide_hwif_t *hwif)
printk(KERN_WARNING "keeping settings !\n");
}
}
#endif
*/
/*
* qd_probe:
......@@ -496,14 +496,7 @@ int __init qd65xx_init(void)
}
#ifdef MODULE
static void __exit qd65xx_exit(void)
{
qd_unsetup(&ide_hwifs[0]);
qd_unsetup(&ide_hwifs[1]);
}
module_init(qd65xx_init);
module_exit(qd65xx_exit);
#endif
MODULE_AUTHOR("Samuel Thibault");
......
......@@ -173,33 +173,7 @@ int __init umc8672_init(void)
}
#ifdef MODULE
static void __exit umc8672_release_hwif(ide_hwif_t *hwif)
{
if (hwif->chipset != ide_umc8672)
return;
hwif->chipset = ide_unknown;
hwif->tuneproc = NULL;
hwif->mate = NULL;
hwif->channel = 0;
}
static void __exit umc8672_exit(void)
{
unsigned long flags;
umc8672_release_hwif(&ide_hwifs[0]);
umc8672_release_hwif(&ide_hwifs[1]);
local_irq_save(flags);
outb_p(0xa5, 0x108); /* disable umc */
local_irq_restore(flags);
release_region(0x108, 2);
}
module_init(umc8672_init);
module_exit(umc8672_exit);
#endif
MODULE_AUTHOR("Wolfram Podien");
......
......@@ -200,7 +200,7 @@ static void program_drive_counts (ide_drive_t *drive, int setup_count, int activ
*/
if (channel) {
drive->drive_data = setup_count;
setup_count = IDE_MAX(drives[0].drive_data,
setup_count = max(drives[0].drive_data,
drives[1].drive_data);
cmdprintk("Secondary interface, setup_count = %d\n",
setup_count);
......
......@@ -132,6 +132,9 @@ static struct pci_device_id generic_pci_tbl[] = {
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7},
{ PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8},
{ PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9},
{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10},
{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11},
{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12},
{ 0, },
};
MODULE_DEVICE_TABLE(pci, generic_pci_tbl);
......
......@@ -129,6 +129,33 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = {
.enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
.bootable = OFF_BOARD,
.extra = 0,
},{ /* 10 */
.vendor = PCI_VENDOR_ID_TOSHIBA,
.device = PCI_DEVICE_ID_TOSHIBA_PICCOLO,
.name = "Piccolo0102",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 11 */
.vendor = PCI_VENDOR_ID_TOSHIBA,
.device = PCI_DEVICE_ID_TOSHIBA_PICCOLO_1,
.name = "Piccolo0103",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 12 */
.vendor = PCI_VENDOR_ID_TOSHIBA,
.device = PCI_DEVICE_ID_TOSHIBA_PICCOLO_2,
.name = "Piccolo0105",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{
.vendor = 0,
.device = 0,
......
......@@ -375,7 +375,7 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
return;
}
via_set_drive(drive, XFER_PIO_0 + MIN(pio, 5));
via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5));
}
/**
......
......@@ -146,7 +146,7 @@ static void idescsi_input_buffers (ide_drive_t *drive, idescsi_pc_t *pc, unsigne
idescsi_discard_data (drive, bcount);
return;
}
count = IDE_MIN (pc->sg->length - pc->b_count, bcount);
count = min(pc->sg->length - pc->b_count, bcount);
buf = page_address(pc->sg->page) + pc->sg->offset;
atapi_input_bytes (drive, buf + pc->b_count, count);
bcount -= count; pc->b_count += count;
......@@ -168,7 +168,7 @@ static void idescsi_output_buffers (ide_drive_t *drive, idescsi_pc_t *pc, unsign
idescsi_output_zeros (drive, bcount);
return;
}
count = IDE_MIN (pc->sg->length - pc->b_count, bcount);
count = min(pc->sg->length - pc->b_count, bcount);
buf = page_address(pc->sg->page) + pc->sg->offset;
atapi_output_bytes (drive, buf + pc->b_count, count);
bcount -= count; pc->b_count += count;
......@@ -396,7 +396,7 @@ static int idescsi_end_request (ide_drive_t *drive, int uptodate, int nrsecs)
if (!test_bit(PC_WRITING, &pc->flags) && pc->actually_transferred && pc->actually_transferred <= 1024 && pc->buffer) {
printk(", rst = ");
scsi_buf = pc->scsi_cmd->request_buffer;
hexdump(scsi_buf, IDE_MIN(16, pc->scsi_cmd->request_bufflen));
hexdump(scsi_buf, min_t(unsigned, 16, pc->scsi_cmd->request_bufflen));
} else printk("\n");
}
}
......@@ -413,7 +413,7 @@ static int idescsi_end_request (ide_drive_t *drive, int uptodate, int nrsecs)
static inline unsigned long get_timeout(idescsi_pc_t *pc)
{
return IDE_MAX(WAIT_CMD, pc->timeout - jiffies);
return max_t(unsigned long, WAIT_CMD, pc->timeout - jiffies);
}
static int idescsi_expiry(ide_drive_t *drive)
......@@ -580,7 +580,7 @@ static ide_startstop_t idescsi_issue_pc (ide_drive_t *drive, idescsi_pc_t *pc)
scsi->pc=pc; /* Set the current packet command */
pc->actually_transferred=0; /* We haven't transferred any data yet */
pc->current_position=pc->buffer;
bcount.all = IDE_MIN(pc->request_transfer, 63 * 1024); /* Request to transfer the entire buffer at once */
bcount.all = min(pc->request_transfer, 63 * 1024); /* Request to transfer the entire buffer at once */
feature.all = 0;
if (drive->using_dma && rq->bio) {
......
......@@ -44,7 +44,7 @@ static inline void atomic_set(atomic_t *v, int i)
: "cc");
}
static inline void atomic_add(int i, volatile atomic_t *v)
static inline void atomic_add(int i, atomic_t *v)
{
unsigned long tmp, tmp2;
......@@ -59,7 +59,7 @@ static inline void atomic_add(int i, volatile atomic_t *v)
: "cc");
}
static inline void atomic_sub(int i, volatile atomic_t *v)
static inline void atomic_sub(int i, atomic_t *v)
{
unsigned long tmp, tmp2;
......@@ -77,7 +77,7 @@ static inline void atomic_sub(int i, volatile atomic_t *v)
#define atomic_inc(v) atomic_add(1, v)
#define atomic_dec(v) atomic_sub(1, v)
static inline int atomic_dec_and_test(volatile atomic_t *v)
static inline int atomic_dec_and_test(atomic_t *v)
{
unsigned long tmp;
int result;
......@@ -95,7 +95,7 @@ static inline int atomic_dec_and_test(volatile atomic_t *v)
return result == 0;
}
static inline int atomic_add_negative(int i, volatile atomic_t *v)
static inline int atomic_add_negative(int i, atomic_t *v)
{
unsigned long tmp;
int result;
......@@ -138,7 +138,7 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
#define atomic_set(v,i) (((v)->counter) = (i))
static inline void atomic_add(int i, volatile atomic_t *v)
static inline void atomic_add(int i, atomic_t *v)
{
unsigned long flags;
......@@ -147,7 +147,7 @@ static inline void atomic_add(int i, volatile atomic_t *v)
local_irq_restore(flags);
}
static inline void atomic_sub(int i, volatile atomic_t *v)
static inline void atomic_sub(int i, atomic_t *v)
{
unsigned long flags;
......@@ -156,7 +156,7 @@ static inline void atomic_sub(int i, volatile atomic_t *v)
local_irq_restore(flags);
}
static inline void atomic_inc(volatile atomic_t *v)
static inline void atomic_inc(atomic_t *v)
{
unsigned long flags;
......@@ -165,7 +165,7 @@ static inline void atomic_inc(volatile atomic_t *v)
local_irq_restore(flags);
}
static inline void atomic_dec(volatile atomic_t *v)
static inline void atomic_dec(atomic_t *v)
{
unsigned long flags;
......@@ -174,7 +174,7 @@ static inline void atomic_dec(volatile atomic_t *v)
local_irq_restore(flags);
}
static inline int atomic_dec_and_test(volatile atomic_t *v)
static inline int atomic_dec_and_test(atomic_t *v)
{
unsigned long flags;
int val;
......@@ -187,7 +187,7 @@ static inline int atomic_dec_and_test(volatile atomic_t *v)
return val == 0;
}
static inline int atomic_add_negative(int i, volatile atomic_t *v)
static inline int atomic_add_negative(int i, atomic_t *v)
{
unsigned long flags;
int val;
......
#ifndef __ASM_ARM_DIV64
#define __ASM_ARM_DIV64
#include <asm/system.h>
/*
* The semantics of do_div() are:
*
......@@ -31,7 +33,11 @@
register unsigned long long __n asm("r0") = n; \
register unsigned long long __res asm("r2"); \
register unsigned int __rem asm(__xh); \
asm("bl __do_div64" \
asm( __asmeq("%0", __xh) \
__asmeq("%1", "r2") \
__asmeq("%2", "r0") \
__asmeq("%3", "r4") \
"bl __do_div64" \
: "=r" (__rem), "=r" (__res) \
: "r" (__n), "r" (__base) \
: "ip", "lr", "cc"); \
......
......@@ -16,29 +16,6 @@
*/
extern void consistent_sync(void *kaddr, size_t size, int rw);
/*
* For SA-1111 these functions are "magic" and utilize bounce
* bufferes as needed to work around SA-1111 DMA bugs.
*/
dma_addr_t sa1111_map_single(struct device *dev, void *, size_t, enum dma_data_direction);
void sa1111_unmap_single(struct device *dev, dma_addr_t, size_t, enum dma_data_direction);
int sa1111_map_sg(struct device *dev, struct scatterlist *, int, enum dma_data_direction);
void sa1111_unmap_sg(struct device *dev, struct scatterlist *, int, enum dma_data_direction);
void sa1111_dma_sync_single_for_cpu(struct device *dev, dma_addr_t, size_t, enum dma_data_direction);
void sa1111_dma_sync_single_for_device(struct device *dev, dma_addr_t, size_t, enum dma_data_direction);
void sa1111_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *, int, enum dma_data_direction);
void sa1111_dma_sync_sg_for_device(struct device *dev, struct scatterlist *, int, enum dma_data_direction);
#ifdef CONFIG_SA1111
extern struct bus_type sa1111_bus_type;
#define dmadev_is_sa1111(dev) ((dev)->bus == &sa1111_bus_type)
#else
#define dmadev_is_sa1111(dev) (0)
#endif
/*
* Return whether the given device DMA address mask can be supported
* properly. For example, if your device can only drive the low 24-bits
......@@ -70,6 +47,14 @@ static inline int dma_is_consistent(dma_addr_t handle)
return 0;
}
/*
* DMA errors are defined by all-bits-set in the DMA address.
*/
static inline int dma_mapping_error(dma_addr_t dma_addr)
{
return dma_addr == ~0;
}
/**
* dma_alloc_coherent - allocate consistent memory for DMA
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
......@@ -118,6 +103,7 @@ dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int
#define dma_free_writecombine(dev,size,cpu_addr,handle) \
dma_free_coherent(dev,size,cpu_addr,handle)
/**
* dma_map_single - map a single buffer for streaming DMA
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
......@@ -132,16 +118,17 @@ dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int
* can regain ownership by calling dma_unmap_single() or
* dma_sync_single_for_cpu().
*/
#ifndef CONFIG_DMABOUNCE
static inline dma_addr_t
dma_map_single(struct device *dev, void *cpu_addr, size_t size,
enum dma_data_direction dir)
{
if (dmadev_is_sa1111(dev))
return sa1111_map_single(dev, cpu_addr, size, dir);
consistent_sync(cpu_addr, size, dir);
return __virt_to_bus((unsigned long)cpu_addr);
}
#else
extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
#endif
/**
* dma_map_page - map a portion of a page for streaming DMA
......@@ -180,15 +167,16 @@ dma_map_page(struct device *dev, struct page *page,
* After this call, reads by the CPU to the buffer are guaranteed to see
* whatever the device wrote there.
*/
#ifndef CONFIG_DMABOUNCE
static inline void
dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
enum dma_data_direction dir)
{
if (dmadev_is_sa1111(dev))
sa1111_unmap_single(dev, handle, size, dir);
/* nothing to do */
}
#else
extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
#endif
/**
* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
......@@ -233,15 +221,13 @@ dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
* Device ownership issues as mentioned above for dma_map_single are
* the same here.
*/
#ifndef CONFIG_DMABOUNCE
static inline int
dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
int i;
if (dmadev_is_sa1111(dev))
return sa1111_map_sg(dev, sg, nents, dir);
for (i = 0; i < nents; i++, sg++) {
char *virt;
......@@ -252,6 +238,9 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
return nents;
}
#else
extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
#endif
/**
* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
......@@ -264,17 +253,18 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
* Again, CPU read rules concerning calls here are the same as for
* dma_unmap_single() above.
*/
#ifndef CONFIG_DMABOUNCE
static inline void
dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
if (dmadev_is_sa1111(dev)) {
sa1111_unmap_sg(dev, sg, nents, dir);
return;
}
/* nothing to do */
}
#else
extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
#endif
/**
* dma_sync_single_for_cpu
......@@ -293,15 +283,11 @@ dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
* must first the perform a dma_sync_for_device, and then the
* device again owns the buffer.
*/
#ifndef CONFIG_DMABOUNCE
static inline void
dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
enum dma_data_direction dir)
{
if (dmadev_is_sa1111(dev)) {
sa1111_dma_sync_single_for_cpu(dev, handle, size, dir);
return;
}
consistent_sync((void *)__bus_to_virt(handle), size, dir);
}
......@@ -309,13 +295,13 @@ static inline void
dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
enum dma_data_direction dir)
{
if (dmadev_is_sa1111(dev)) {
sa1111_dma_sync_single_for_device(dev, handle, size, dir);
return;
}
consistent_sync((void *)__bus_to_virt(handle), size, dir);
}
#else
extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
#endif
/**
* dma_sync_sg_for_cpu
......@@ -330,17 +316,13 @@ dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
* The same as dma_sync_single_for_* but for a scatter-gather list,
* same rules and usage.
*/
#ifndef CONFIG_DMABOUNCE
static inline void
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction dir)
{
int i;
if (dmadev_is_sa1111(dev)) {
sa1111_dma_sync_sg_for_cpu(dev, sg, nents, dir);
return;
}
for (i = 0; i < nents; i++, sg++) {
char *virt = page_address(sg->page) + sg->offset;
consistent_sync(virt, sg->length, dir);
......@@ -353,24 +335,73 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
{
int i;
if (dmadev_is_sa1111(dev)) {
sa1111_dma_sync_sg_for_device(dev, sg, nents, dir);
return;
}
for (i = 0; i < nents; i++, sg++) {
char *virt = page_address(sg->page) + sg->offset;
consistent_sync(virt, sg->length, dir);
}
}
#else
extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
#endif
#ifdef CONFIG_DMABOUNCE
/*
* DMA errors are defined by all-bits-set in the DMA address.
* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
* and utilize bounce buffers as needed to work around limited DMA windows.
*
* On the SA-1111, a bug limits DMA to only certain regions of RAM.
* On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
* On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM)
*
* The following are helper functions used by the dmabounce subystem
*
*/
static inline int dma_mapping_error(dma_addr_t dma_addr)
{
return dma_addr == ~0;
}
/**
* dmabounce_register_dev
*
* @dev: valid struct device pointer
* @small_buf_size: size of buffers to use with small buffer pool
* @large_buf_size: size of buffers to use with large buffer pool (can be 0)
*
* This function should be called by low-level platform code to register
* a device as requireing DMA buffer bouncing. The function will allocate
* appropriate DMA pools for the device.
*
*/
extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
/**
* dmabounce_unregister_dev
*
* @dev: valid struct device pointer
*
* This function should be called by low-level platform code when device
* that was previously registered with dmabounce_register_dev is removed
* from the system.
*
*/
extern void dmabounce_unregister_dev(struct device *);
/**
* dma_needs_bounce
*
* @dev: valid struct device pointer
* @dma_handle: dma_handle of unbounced buffer
* @size: size of region being mapped
*
* Platforms that utilize the dmabounce mechanism must implement
* this function.
*
* The dmabounce routines call this function whenever a dma-mapping
* is requested to determine whether a given buffer needs to be bounced
* or not. The function must return 0 if the the buffer is OK for
* DMA access and 1 if the buffer needs to be bounced.
*
*/
extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
#endif /* CONFIG_DMABOUNCE */
#endif /* __KERNEL__ */
#endif
......@@ -42,6 +42,15 @@
#define CR_XP (1 << 23) /* Extended page tables */
#define CR_VE (1 << 24) /* Vectored interrupts */
/*
* This is used to ensure the compiler did actually allocate the register we
* asked it for some inline assembly sequences. Apparently we can't trust
* the compiler from one version to another so a bit of paranoia won't hurt.
* This string is meant to be concatenated with the inline asm string and
* will cause compilation to stop on mismatch.
*/
#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
#ifndef __ASSEMBLY__
#include <linux/kernel.h>
......
......@@ -15,6 +15,7 @@
#include <asm/errno.h>
#include <asm/arch/memory.h>
#include <asm/domain.h>
#include <asm/system.h>
#define VERIFY_READ 0
#define VERIFY_WRITE 1
......@@ -107,7 +108,9 @@ extern int __get_user_8(void *);
extern int __get_user_bad(void);
#define __get_user_x(__r1,__p,__e,__s,__i...) \
__asm__ __volatile__ ("bl __get_user_" #__s \
__asm__ __volatile__ ( \
__asmeq("%0", "r0") __asmeq("%1", "r1") \
"bl __get_user_" #__s \
: "=&r" (__e), "=r" (__r1) \
: "0" (__p) \
: __i, "cc")
......@@ -223,7 +226,9 @@ extern int __put_user_8(void *, unsigned long long);
extern int __put_user_bad(void);
#define __put_user_x(__r1,__p,__e,__s) \
__asm__ __volatile__ ("bl __put_user_" #__s \
__asm__ __volatile__ ( \
__asmeq("%0", "r0") __asmeq("%2", "r1") \
"bl __put_user_" #__s \
: "=&r" (__e) \
: "0" (__p), "r" (__r1) \
: "ip", "lr", "cc")
......
......@@ -215,8 +215,6 @@ typedef unsigned char byte; /* used everywhere */
#define SECTOR_SIZE 512
#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
#define IDE_MIN(a,b) ((a)<(b) ? (a):(b))
#define IDE_MAX(a,b) ((a)>(b) ? (a):(b))
/*
* Timeouts for various operations:
......
......@@ -1383,6 +1383,9 @@
#define PCI_DEVICE_ID_SBE_WANXL400 0x0104
#define PCI_VENDOR_ID_TOSHIBA 0x1179
#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102
#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103
#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105
#define PCI_DEVICE_ID_TOSHIBA_601 0x0601
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_A 0x0603
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment