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Commit db2f95de authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc 

From Sascha Hauer <s.hauer@pengutronix.de>:

ARM i.MX SoC updates

based on imx-multiplatform branch.

* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM i.MX51 babbage: Add display support
  ARM i.MX6: Add IPU support
  ARM i.MX51: Add IPU support
  ARM i.MX53: Add IPU support
  ARM i.MX5: switch IPU clk support to devicetree bindings
  ARM i.MX6: fix ldb_di_sel mux
  ARM i.MX51: setup MIPI during startup
  mx2_camera: Fix regression caused by clock conversion
  ARM: clk-imx27: Add missing clock for mx2-camera
  ARM i.MX27: Fix low reference clock path
  ARM: dts: imx27-3ds: Remove local watchdog inclusion
  watchdog: Support imx watchdog on SOC_IMX53
  ARM: mach-imx: Support for DryIce RTC in i.MX53
  ARM : i.MX27 : split code for allocation of ressources of camera and eMMA
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1bf0bc1e d6aef84a
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Showing with 3009 additions and 2206 deletions
Documentation/arm64/memory.txt
View file @ db2f95de
......@@ -27,17 +27,17 @@ Start End Size Use
-----------------------------------------------------------------------
0000000000000000 0000007fffffffff 512GB user
ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc
ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page]
ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space
ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
ffffffbbffff0000 ffffffbcffffffff 64KB [guard page]
ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space
ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap]
ffffffbbffff0000 ffffffbcffffffff ~2MB [guard]
ffffffbffc000000 ffffffbfffffffff 64MB modules
......
Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
View file @ db2f95de
......@@ -12,13 +12,13 @@ Optional properties:
Examples:
i2c@83fc4000 { /* I2C2 on i.MX51 */
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x83fc4000 0x4000>;
interrupts = <63>;
};
i2c@70038000 { /* HS-I2C on i.MX51 */
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x70038000 0x4000>;
interrupts = <64>;
clock-frequency = <400000>;
......
MAINTAINERS
View file @ db2f95de
......@@ -797,7 +797,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://git.pengutronix.de/git/imx/linux-2.6.git
F: arch/arm/mach-imx/
F: arch/arm/plat-mxc/
F: arch/arm/configs/imx*_defconfig
ARM/FREESCALE IMX6
......
Makefile
View file @ db2f95de
VERSION = 3
PATCHLEVEL = 7
SUBLEVEL = 0
EXTRAVERSION = -rc4
EXTRAVERSION = -rc5
NAME = Terrified Chipmunk
# *DOCUMENTATION*
......
arch/arm/Kconfig
View file @ db2f95de
......@@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE
Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
config ARCH_MXC
bool "Freescale MXC/iMX-based"
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select USE_OF
help
Support for Freescale MXC/iMX-based family of processors
config ARCH_MXS
bool "Freescale MXS-based"
select ARCH_REQUIRE_GPIOLIB
......@@ -1058,7 +1045,7 @@ source "arch/arm/mach-msm/Kconfig"
source "arch/arm/mach-mv78xx0/Kconfig"
source "arch/arm/plat-mxc/Kconfig"
source "arch/arm/mach-imx/Kconfig"
source "arch/arm/mach-mxs/Kconfig"
......
arch/arm/Kconfig.debug
View file @ db2f95de
......@@ -412,6 +412,14 @@ endchoice
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
default "debug/imx.S" if DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX31_IMX35_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX50_IMX53_UART ||\
DEBUG_IMX6Q_UART2 || \
DEBUG_IMX6Q_UART4
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
......
arch/arm/Makefile
View file @ db2f95de
......@@ -196,7 +196,6 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
plat-$(CONFIG_ARCH_MXC) += mxc
plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_ARCH_S3C64XX) += samsung
plat-$(CONFIG_ARCH_ZYNQ) += versatile
......
arch/arm/boot/dts/imx27-3ds.dts
View file @ db2f95de
......@@ -23,10 +23,6 @@ memory {
soc {
aipi@10000000 { /* aipi */
wdog@10002000 {
status = "okay";
};
uart1: serial@1000a000 {
fsl,uart-has-rtscts;
status = "okay";
......
arch/arm/boot/dts/imx27.dtsi
View file @ db2f95de
......@@ -113,7 +113,7 @@ cspi2: cspi@1000f000 {
i2c1: i2c@10012000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
reg = <0x10012000 0x1000>;
interrupts = <12>;
status = "disabled";
......@@ -205,7 +205,7 @@ uart6: serial@1001c000 {
i2c2: i2c@1001d000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
reg = <0x1001d000 0x1000>;
interrupts = <1>;
status = "disabled";
......
arch/arm/boot/dts/imx51-babbage.dts
View file @ db2f95de
......@@ -22,6 +22,22 @@ memory {
};
soc {
display@di0 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1_1>;
};
display@di1 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 1>;
interface-pix-fmt = "rgb565";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp2_1>;
};
aips@70000000 { /* aips-1 */
spba@70000000 {
esdhc@70004000 { /* ESDHC1 */
......
arch/arm/boot/dts/imx51.dtsi
View file @ db2f95de
......@@ -62,6 +62,13 @@ soc {
interrupt-parent = <&tzic>;
ranges;
ipu: ipu@40000000 {
#crtc-cells = <1>;
compatible = "fsl,imx51-ipu";
reg = <0x40000000 0x20000000>;
interrupts = <11 10>;
};
aips@70000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
......@@ -295,6 +302,66 @@ pinctrl_i2c2_1: i2c2grp-1 {
};
};
ipu_disp1 {
pinctrl_ipu_disp1_1: ipudisp1grp-1 {
fsl,pins = <
528 0x5 /* MX51_PAD_DISP1_DAT0__DISP1_DAT0 */
529 0x5 /* MX51_PAD_DISP1_DAT1__DISP1_DAT1 */
530 0x5 /* MX51_PAD_DISP1_DAT2__DISP1_DAT2 */
531 0x5 /* MX51_PAD_DISP1_DAT3__DISP1_DAT3 */
532 0x5 /* MX51_PAD_DISP1_DAT4__DISP1_DAT4 */
533 0x5 /* MX51_PAD_DISP1_DAT5__DISP1_DAT5 */
535 0x5 /* MX51_PAD_DISP1_DAT6__DISP1_DAT6 */
537 0x5 /* MX51_PAD_DISP1_DAT7__DISP1_DAT7 */
539 0x5 /* MX51_PAD_DISP1_DAT8__DISP1_DAT8 */
541 0x5 /* MX51_PAD_DISP1_DAT9__DISP1_DAT9 */
543 0x5 /* MX51_PAD_DISP1_DAT10__DISP1_DAT10 */
545 0x5 /* MX51_PAD_DISP1_DAT11__DISP1_DAT11 */
547 0x5 /* MX51_PAD_DISP1_DAT12__DISP1_DAT12 */
549 0x5 /* MX51_PAD_DISP1_DAT13__DISP1_DAT13 */
551 0x5 /* MX51_PAD_DISP1_DAT14__DISP1_DAT14 */
553 0x5 /* MX51_PAD_DISP1_DAT15__DISP1_DAT15 */
555 0x5 /* MX51_PAD_DISP1_DAT16__DISP1_DAT16 */
557 0x5 /* MX51_PAD_DISP1_DAT17__DISP1_DAT17 */
559 0x5 /* MX51_PAD_DISP1_DAT18__DISP1_DAT18 */
563 0x5 /* MX51_PAD_DISP1_DAT19__DISP1_DAT19 */
567 0x5 /* MX51_PAD_DISP1_DAT20__DISP1_DAT20 */
571 0x5 /* MX51_PAD_DISP1_DAT21__DISP1_DAT21 */
575 0x5 /* MX51_PAD_DISP1_DAT22__DISP1_DAT22 */
579 0x5 /* MX51_PAD_DISP1_DAT23__DISP1_DAT23 */
584 0x5 /* MX51_PAD_DI1_PIN2__DI1_PIN2 (hsync) */
583 0x5 /* MX51_PAD_DI1_PIN3__DI1_PIN3 (vsync) */
>;
};
};
ipu_disp2 {
pinctrl_ipu_disp2_1: ipudisp2grp-1 {
fsl,pins = <
603 0x5 /* MX51_PAD_DISP2_DAT0__DISP2_DAT0 */
608 0x5 /* MX51_PAD_DISP2_DAT1__DISP2_DAT1 */
613 0x5 /* MX51_PAD_DISP2_DAT2__DISP2_DAT2 */
614 0x5 /* MX51_PAD_DISP2_DAT3__DISP2_DAT3 */
615 0x5 /* MX51_PAD_DISP2_DAT4__DISP2_DAT4 */
616 0x5 /* MX51_PAD_DISP2_DAT5__DISP2_DAT5 */
617 0x5 /* MX51_PAD_DISP2_DAT6__DISP2_DAT6 */
622 0x5 /* MX51_PAD_DISP2_DAT7__DISP2_DAT7 */
627 0x5 /* MX51_PAD_DISP2_DAT8__DISP2_DAT8 */
633 0x5 /* MX51_PAD_DISP2_DAT9__DISP2_DAT9 */
637 0x5 /* MX51_PAD_DISP2_DAT10__DISP2_DAT10 */
643 0x5 /* MX51_PAD_DISP2_DAT11__DISP2_DAT11 */
648 0x5 /* MX51_PAD_DISP2_DAT12__DISP2_DAT12 */
652 0x5 /* MX51_PAD_DISP2_DAT13__DISP2_DAT13 */
656 0x5 /* MX51_PAD_DISP2_DAT14__DISP2_DAT14 */
661 0x5 /* MX51_PAD_DISP2_DAT15__DISP2_DAT15 */
593 0x5 /* MX51_PAD_DI2_PIN2__DI2_PIN2 (hsync) */
595 0x5 /* MX51_PAD_DI2_PIN3__DI2_PIN3 (vsync) */
597 0x5 /* MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK */
599 0x5 /* MX51_PAD_DI_GP4__DI2_PIN15 */
>;
};
};
uart1 {
pinctrl_uart1_1: uart1grp-1 {
fsl,pins = <
......@@ -377,7 +444,7 @@ cspi@83fc0000 {
i2c@83fc4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x83fc4000 0x4000>;
interrupts = <63>;
status = "disabled";
......@@ -386,7 +453,7 @@ i2c@83fc4000 { /* I2C2 */
i2c@83fc8000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x83fc8000 0x4000>;
interrupts = <62>;
status = "disabled";
......
arch/arm/boot/dts/imx53.dtsi
View file @ db2f95de
......@@ -67,6 +67,13 @@ soc {
interrupt-parent = <&tzic>;
ranges;
ipu: ipu@18000000 {
#crtc-cells = <1>;
compatible = "fsl,imx53-ipu";
reg = <0x18000000 0x080000000>;
interrupts = <11 10>;
};
aips@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
......@@ -432,7 +439,7 @@ gpio7: gpio@53fe4000 {
i2c@53fec000 { /* I2C3 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
reg = <0x53fec000 0x4000>;
interrupts = <64>;
status = "disabled";
......@@ -488,7 +495,7 @@ cspi@63fc0000 {
i2c@63fc4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
reg = <0x63fc4000 0x4000>;
interrupts = <63>;
status = "disabled";
......@@ -497,7 +504,7 @@ i2c@63fc4000 { /* I2C2 */
i2c@63fc8000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
reg = <0x63fc8000 0x4000>;
interrupts = <62>;
status = "disabled";
......
arch/arm/boot/dts/imx6q.dtsi
View file @ db2f95de
......@@ -882,7 +882,7 @@ usdhc@0219c000 { /* uSDHC4 */
i2c@021a0000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a0000 0x4000>;
interrupts = <0 36 0x04>;
clocks = <&clks 125>;
......@@ -892,7 +892,7 @@ i2c@021a0000 { /* I2C1 */
i2c@021a4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a4000 0x4000>;
interrupts = <0 37 0x04>;
clocks = <&clks 126>;
......@@ -902,7 +902,7 @@ i2c@021a4000 { /* I2C2 */
i2c@021a8000 { /* I2C3 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a8000 0x4000>;
interrupts = <0 38 0x04>;
clocks = <&clks 127>;
......@@ -1001,5 +1001,23 @@ uart5: serial@021f4000 {
status = "disabled";
};
};
ipu1: ipu@02400000 {
#crtc-cells = <1>;
compatible = "fsl,imx6q-ipu";
reg = <0x02400000 0x400000>;
interrupts = <0 6 0x4 0 5 0x4>;
clocks = <&clks 130>, <&clks 131>, <&clks 132>;
clock-names = "bus", "di0", "di1";
};
ipu2: ipu@02800000 {
#crtc-cells = <1>;
compatible = "fsl,imx6q-ipu";
reg = <0x02800000 0x400000>;
interrupts = <0 8 0x4 0 7 0x4>;
clocks = <&clks 133>, <&clks 134>, <&clks 137>;
clock-names = "bus", "di0", "di1";
};
};
};
arch/arm/configs/imx_v4_v5_defconfig
View file @ db2f95de
......@@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_IMX_V4_V5=y
CONFIG_ARCH_MULTI_V4T=y
CONFIG_ARCH_MULTI_V5=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MX1ADS=y
CONFIG_MACH_SCB9328=y
CONFIG_MACH_APF9328=y
......
arch/arm/configs/imx_v6_v7_defconfig
View file @ db2f95de
......@@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_MACH_MX31LILLY=y
CONFIG_MACH_MX31LITE=y
CONFIG_MACH_PCM037=y
......
arch/arm/include/asm/io.h
View file @ db2f95de
......@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
{
asm volatile("strh %1, %0"
: "+Qo" (*(volatile u16 __force *)addr)
: "+Q" (*(volatile u16 __force *)addr)
: "r" (val));
}
......@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
{
u16 val;
asm volatile("ldrh %1, %0"
: "+Qo" (*(volatile u16 __force *)addr),
: "+Q" (*(volatile u16 __force *)addr),
"=r" (val));
return val;
}
......
arch/arm/include/asm/sched_clock.h
View file @ db2f95de
......@@ -10,7 +10,5 @@
extern void sched_clock_postinit(void);
extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
unsigned long rate);
#endif
arch/arm/include/asm/vfpmacros.h
View file @ db2f95de
......@@ -27,9 +27,9 @@
#if __LINUX_ARM_ARCH__ <= 6
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
tst \tmp, #HWCAP_VFPv3D16
ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
addne \base, \base, #32*4 @ step over unused register space
tst \tmp, #HWCAP_VFPD32
ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
addeq \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
......@@ -51,9 +51,9 @@
#if __LINUX_ARM_ARCH__ <= 6
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
tst \tmp, #HWCAP_VFPv3D16
stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
addne \base, \base, #32*4 @ step over unused register space
tst \tmp, #HWCAP_VFPD32
stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
addeq \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
......
arch/arm/plat-mxc/include/mach/debug-macro.S → arch/arm/include/debug/imx.S
View file @ db2f95de
......@@ -10,27 +10,38 @@
* published by the Free Software Foundation.
*
*/
#include <mach/hardware.h>
#ifdef CONFIG_DEBUG_IMX1_UART
#define UART_PADDR MX1_UART1_BASE_ADDR
#define UART_PADDR 0x00206000
#elif defined (CONFIG_DEBUG_IMX25_UART)
#define UART_PADDR MX25_UART1_BASE_ADDR
#define UART_PADDR 0x43f90000
#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
#define UART_PADDR MX2x_UART1_BASE_ADDR
#define UART_PADDR 0x1000a000
#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
#define UART_PADDR MX3x_UART1_BASE_ADDR
#define UART_PADDR 0x43f90000
#elif defined (CONFIG_DEBUG_IMX51_UART)
#define UART_PADDR MX51_UART1_BASE_ADDR
#define UART_PADDR 0x73fbc000
#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
#define UART_PADDR MX53_UART1_BASE_ADDR
#define UART_PADDR 0x53fbc000
#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
#define UART_PADDR MX6Q_UART2_BASE_ADDR
#define UART_PADDR 0x021e8000
#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
#define UART_PADDR MX6Q_UART4_BASE_ADDR
#define UART_PADDR 0x021f0000
#endif
#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
/*
* FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to
* stay sync with that. It's hard to maintain, and should be fixed
* globally for multi-platform build to use a fixed virtual address
* for low-level debug uart port across platforms.
*/
#define IMX_IO_P2V(x) ( \
(((x) & 0x80000000) >> 7) | \
(0xf4000000 + \
(((x) & 0x50000000) >> 6) + \
(((x) & 0x0b000000) >> 4) + \
(((x) & 0x000fffff))))
#define UART_VADDR IMX_IO_P2V(UART_PADDR)
.macro addruart, rp, rv, tmp
ldr \rp, =UART_PADDR @ physical
......
arch/arm/include/uapi/asm/hwcap.h
View file @ db2f95de
......@@ -18,11 +18,12 @@
#define HWCAP_THUMBEE (1 << 11)
#define HWCAP_NEON (1 << 12)
#define HWCAP_VFPv3 (1 << 13)
#define HWCAP_VFPv3D16 (1 << 14)
#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
#define HWCAP_TLS (1 << 15)
#define HWCAP_VFPv4 (1 << 16)
#define HWCAP_IDIVA (1 << 17)
#define HWCAP_IDIVT (1 << 18)
#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
......
arch/arm/kernel/sched_clock.c
View file @ db2f95de
......@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
update_sched_clock();
}
void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
unsigned long rate)
{
setup_sched_clock(read, bits, rate);
cd.needs_suspend = true;
}
void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
{
unsigned long r, w;
......@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
static int sched_clock_suspend(void)
{
sched_clock_poll(sched_clock_timer.data);
if (cd.needs_suspend)
cd.suspended = true;
cd.suspended = true;
return 0;
}
static void sched_clock_resume(void)
{
if (cd.needs_suspend) {
cd.epoch_cyc = read_sched_clock();
cd.epoch_cyc_copy = cd.epoch_cyc;
cd.suspended = false;
}
cd.epoch_cyc = read_sched_clock();
cd.epoch_cyc_copy = cd.epoch_cyc;
cd.suspended = false;
}
static struct syscore_ops sched_clock_ops = {
......
arch/arm/plat-mxc/3ds_debugboard.c → arch/arm/mach-imx/3ds_debugboard.c
View file @ db2f95de
......@@ -21,7 +21,7 @@
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <mach/hardware.h>
#include "hardware.h"
/* LAN9217 ethernet base address */
#define LAN9217_BASE_ADDR(n) (n + 0x0)
......
arch/arm/mach-imx/Kconfig
View file @ db2f95de
config ARCH_MXC
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
select ARCH_REQUIRE_GPIOLIB
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR if !ZBOOT_ROM
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select USE_OF
help
Support for Freescale MXC/iMX-based family of processors
menu "Freescale i.MX support"
depends on ARCH_MXC
config MXC_IRQ_PRIOR
bool "Use IRQ priority"
help
Select this if you want to use prioritized IRQ handling.
This feature prevents higher priority ISR to be interrupted
by lower priority IRQ even IRQF_DISABLED flag is not set.
This may be useful in embedded applications, where are strong
requirements for timing.
Say N here, unless you have a specialized requirement.
config MXC_TZIC
bool
config MXC_AVIC
bool
config MXC_DEBUG_BOARD
bool "Enable MXC debug board(for 3-stack)"
help
The debug board is an integral part of the MXC 3-stack(PDK)
platforms, it can be attached or removed from the peripheral
board. On debug board, several debug devices(ethernet, UART,
buttons, LEDs and JTAG) are implemented. Between the MCU and
these devices, a CPLD is added as a bridge which performs
data/address de-multiplexing and decode, signal level shift,
interrupt control and various board functions.
config HAVE_EPIT
bool
config MXC_USE_EPIT
bool "Use EPIT instead of GPT"
depends on HAVE_EPIT
help
Use EPIT as the system timer on systems that have it. Normally you
don't have a reason to do so as the EPIT has the same features and
uses the same clocks as the GPT. Anyway, on some systems the GPT
may be in use for other purposes.
config MXC_ULPI
bool
config ARCH_HAS_RNGA
bool
config IRAM_ALLOC
bool
select GENERIC_ALLOCATOR
config HAVE_IMX_GPC
bool
......@@ -5,6 +72,12 @@ config HAVE_IMX_MMDC
bool
config HAVE_IMX_SRC
def_bool y if SMP
config IMX_HAVE_IOMUX_V1
bool
config ARCH_MXC_IOMUX_V3
bool
config ARCH_MX1
......@@ -104,7 +177,7 @@ config SOC_IMX51
select PINCTRL_IMX51
select SOC_IMX5
if ARCH_IMX_V4_V5
if ARCH_MULTI_V4T
comment "MX1 platforms:"
config MACH_MXLADS
......@@ -133,6 +206,10 @@ config MACH_APF9328
help
Say Yes here if you are using the Armadeus APF9328 development board
endif
if ARCH_MULTI_V5
comment "MX21 platforms:"
config MACH_MX21ADS
......@@ -317,6 +394,7 @@ config MACH_IMX27_VISSTRIM_M10
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MX2_CAMERA
select IMX_HAVE_PLATFORM_MX2_EMMA
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select LEDS_GPIO_REGISTER
......@@ -384,7 +462,7 @@ config MACH_IMX27_DT
endif
if ARCH_IMX_V6_V7
if ARCH_MULTI_V6
comment "MX31 platforms:"
......@@ -649,6 +727,10 @@ config MACH_VPR200
Include support for VPR200 platform. This includes specific
configurations for the board and its peripherals.
endif
if ARCH_MULTI_V7
comment "i.MX5 platforms:"
config MACH_MX50_RDP
......@@ -739,6 +821,7 @@ config SOC_IMX53
select ARCH_MX5
select ARCH_MX53
select HAVE_CAN_FLEXCAN if CAN
select IMX_HAVE_PLATFORM_IMX2_WDT
select PINCTRL
select PINCTRL_IMX53
select SOC_IMX5
......@@ -756,7 +839,6 @@ config SOC_IMX6Q
select HAVE_CAN_FLEXCAN if CAN
select HAVE_IMX_GPC
select HAVE_IMX_MMDC
select HAVE_IMX_SRC
select HAVE_SMP
select MFD_SYSCON
select PINCTRL
......@@ -766,3 +848,7 @@ config SOC_IMX6Q
This enables support for Freescale i.MX6 Quad processor.
endif
source "arch/arm/mach-imx/devices/Kconfig"
endmenu
arch/arm/mach-imx/Makefile
View file @ db2f95de
obj-y := time.o cpu.o system.o irq-common.o
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
......@@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
clk-pfd.o clk-busy.o clk.o
obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
obj-$(CONFIG_MXC_TZIC) += tzic.o
obj-$(CONFIG_MXC_AVIC) += avic.o
obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
obj-$(CONFIG_MXC_ULPI) += ulpi.o
obj-$(CONFIG_MXC_USE_EPIT) += epit.o
obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
ifdef CONFIG_SND_IMX_SOC
obj-y += ssi-fiq.o
obj-y += ssi-fiq-ksym.o
endif
# Support for CMOS sensor interface
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
......@@ -89,3 +109,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
obj-y += devices/
arch/arm/plat-mxc/avic.c → arch/arm/mach-imx/avic.c
View file @ db2f95de
......@@ -22,12 +22,11 @@
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/of.h>
#include <mach/common.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "common.h"
#include "hardware.h"
#include "irq-common.h"
#define AVIC_INTCNTL 0x00 /* int control reg */
......
arch/arm/mach-imx/clk-imx1.c
View file @ db2f95de
......@@ -22,9 +22,9 @@
#include <linux/clkdev.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include "clk.h"
#include "common.h"
#include "hardware.h"
/* CCM register addresses */
#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
......@@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref)
pr_err("imx1 clk %d: register failed with %ld\n",
i, PTR_ERR(clk[i]));
clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");
clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
clk_register_clkdev(clk[mma_gate], "mma", NULL);
clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
......@@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref)
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");
clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
clk_register_clkdev(clk[per2], "per", "imx-fb.0");
clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");
clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");
clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
clk_register_clkdev(clk[hclk], "mshc", NULL);
clk_register_clkdev(clk[per3], "ssi", NULL);
clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
clk_register_clkdev(clk[clko], "clko", NULL);
mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
......
arch/arm/mach-imx/clk-imx21.c
View file @ db2f95de
......@@ -25,9 +25,9 @@
#include <linux/module.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include "clk.h"
#include "common.h"
#include "hardware.h"
#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
......@@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");
clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");
clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");
clk_register_clkdev(clk[per3], "per", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");
clk_register_clkdev(clk[per3], "per", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0");
clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");
clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");
clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");
clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");
clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0");
clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma");
clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma");
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");
clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[brom_gate], "brom", NULL);
......
arch/arm/mach-imx/clk-imx25.c
View file @ db2f95de
......@@ -24,10 +24,10 @@
#include <linux/clkdev.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/mx25.h>
#include "clk.h"
#include "common.h"
#include "hardware.h"
#include "mx25.h"
#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
......@@ -197,7 +197,7 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
/* i.mx25 has the i.mx35 type cspi */
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
......@@ -212,15 +212,15 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
......@@ -230,9 +230,9 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");
clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");
clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");
clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
clk_register_clkdev(clk[dummy], "audmux", NULL);
clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
......
arch/arm/mach-imx/clk-imx27.c
View file @ db2f95de
......@@ -6,9 +6,9 @@
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include "clk.h"
#include "common.h"
#include "hardware.h"
#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
......@@ -51,8 +51,10 @@
static const char *vpu_sel_clks[] = { "spll", "mpll_main2", };
static const char *cpu_sel_clks[] = { "mpll_main2", "mpll", };
static const char *mpll_sel_clks[] = { "fpm", "mpll_osc_sel", };
static const char *mpll_osc_sel_clks[] = { "ckih", "ckih_div1p5", };
static const char *clko_sel_clks[] = {
"ckil", "prem", "ckih", "ckih",
"ckil", "fpm", "ckih", "ckih",
"ckih", "mpll", "spll", "cpu_div",
"ahb", "ipg", "per1_div", "per2_div",
"per3_div", "per4_div", "ssi1_div", "ssi2_div",
......@@ -79,7 +81,8 @@ enum mx27_clks {
vpu_ahb_gate, fec_ahb_gate, emma_ahb_gate, emi_ahb_gate, dma_ahb_gate,
csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate,
uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate,
uart2_ipg_gate, uart1_ipg_gate, clk_max
uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel,
mpll_sel, clk_max
};
static struct clk *clk[clk_max];
......@@ -91,7 +94,15 @@ int __init mx27_clocks_init(unsigned long fref)
clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", fref);
clk[ckil] = imx_clk_fixed("ckil", 32768);
clk[mpll] = imx_clk_pllv1("mpll", "ckih", CCM_MPCTL0);
clk[fpm] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1);
clk[ckih_div1p5] = imx_clk_fixed_factor("ckih_div1p5", "ckih", 2, 3);
clk[mpll_osc_sel] = imx_clk_mux("mpll_osc_sel", CCM_CSCR, 4, 1,
mpll_osc_sel_clks,
ARRAY_SIZE(mpll_osc_sel_clks));
clk[mpll_sel] = imx_clk_mux("mpll_sel", CCM_CSCR, 16, 1, mpll_sel_clks,
ARRAY_SIZE(mpll_sel_clks));
clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0);
clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0);
clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3);
......@@ -211,19 +222,20 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");
clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
clk_register_clkdev(clk[per4_gate], "per", "imx27-camera.0");
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
......@@ -238,27 +250,27 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0");
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");
clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");
clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma");
clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma");
clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");
clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");
clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");
clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0");
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
clk_register_clkdev(clk[cpu_div], "cpu", NULL);
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
......
arch/arm/mach-imx/clk-imx31.c
View file @ db2f95de
......@@ -22,12 +22,11 @@
#include <linux/err.h>
#include <linux/of.h>
#include <mach/hardware.h>
#include <mach/mx31.h>
#include <mach/common.h>
#include "clk.h"
#include "common.h"
#include "crmregs-imx3.h"
#include "hardware.h"
#include "mx31.h"
static const char *mcu_main_sel[] = { "spll", "mpll", };
static const char *per_sel[] = { "per_div", "ipg", };
......@@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");
clk_register_clkdev(clk[pwm_gate], "pwm", NULL);
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");
clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc");
clk_register_clkdev(clk[epit1_gate], "epit", NULL);
clk_register_clkdev(clk[epit2_gate], "epit", NULL);
clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
......@@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");
clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");
clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");
clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
clk_register_clkdev(clk[firi_gate], "firi", NULL);
......
arch/arm/mach-imx/clk-imx35.c
View file @ db2f95de
......@@ -14,11 +14,10 @@
#include <linux/of.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include "crmregs-imx3.h"
#include "clk.h"
#include "common.h"
#include "hardware.h"
struct arm_ahb_div {
unsigned char arm, ahb, sel;
......@@ -226,9 +225,9 @@ int __init mx35_clocks_init()
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
......@@ -256,7 +255,7 @@ int __init mx35_clocks_init()
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
clk_prepare_enable(clk[spba_gate]);
......
arch/arm/mach-imx/clk-imx51-imx53.c
View file @ db2f95de
......@@ -14,11 +14,10 @@
#include <linux/of.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include "crm-regs-imx5.h"
#include "clk.h"
#include "common.h"
#include "hardware.h"
/* Low-power Audio Playback Mode clock */
static const char *lp_apm_sel[] = { "osc", };
......@@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");
clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");
clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");
......@@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
......@@ -306,6 +305,10 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk_prepare_enable(clk[spba]);
clk_prepare_enable(clk[emi_fast_gate]); /* fec */
clk_prepare_enable(clk[emi_slow_gate]); /* eim */
clk_prepare_enable(clk[mipi_hsc1_gate]);
clk_prepare_enable(clk[mipi_hsc2_gate]);
clk_prepare_enable(clk[mipi_esc_gate]);
clk_prepare_enable(clk[mipi_hsp_gate]);
clk_prepare_enable(clk[tmax1]);
clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */
clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */
......@@ -345,14 +348,13 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");
clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
clk_register_clkdev(clk[ipu_gate], "bus", "imx51-ipu");
clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx51-ipu");
clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx51-ipu");
clk_register_clkdev(clk[ipu_gate], "hsp", "imx51-ipu");
clk_register_clkdev(clk[ipu_gate], "bus", "40000000.ipu");
clk_register_clkdev(clk[ipu_di0_gate], "di0", "40000000.ipu");
clk_register_clkdev(clk[ipu_di1_gate], "di1", "40000000.ipu");
clk_register_clkdev(clk[usb_phy_gate], "phy", "mxc-ehci.0");
clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx51.0");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.0");
......@@ -440,12 +442,12 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");
clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");
clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx53-ipu");
clk_register_clkdev(clk[ipu_gate], "hsp", "imx53-ipu");
clk_register_clkdev(clk[ipu_gate], "bus", "18000000.ipu");
clk_register_clkdev(clk[ipu_di0_gate], "di0", "18000000.ipu");
clk_register_clkdev(clk[ipu_di1_gate], "di1", "18000000.ipu");
clk_register_clkdev(clk[ipu_gate], "hsp", "18000000.ipu");
clk_register_clkdev(clk[usb_phy1_gate], "usb_phy1", "mxc-ehci.0");
clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0");
......@@ -467,6 +469,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can");
clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can");
clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can");
clk_register_clkdev(clk[dummy], NULL, "53fa4000.rtc");
/* set SDHC root clock to 200MHZ*/
clk_set_rate(clk[esdhc_a_podf], 200000000);
......
arch/arm/mach-imx/clk-imx6q.c
View file @ db2f95de
......@@ -19,8 +19,9 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <mach/common.h>
#include "clk.h"
#include "common.h"
#define CCGR0 0x68
#define CCGR1 0x6c
......@@ -104,7 +105,7 @@ static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m"
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", };
static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
......
arch/arm/mach-imx/clk-pllv1.c
View file @ db2f95de
......@@ -4,10 +4,10 @@
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/err.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include "clk.h"
#include "common.h"
#include "hardware.h"
/**
* pll v1
......
arch/arm/plat-mxc/include/mach/common.h → arch/arm/mach-imx/common.h
View file @ db2f95de
......@@ -79,6 +79,7 @@ extern void mxc_arch_reset_init(void __iomem *);
extern int mx53_revision(void);
extern int mx53_display_revision(void);
extern void imx_set_aips(void __iomem *);
extern int mxc_device_init(void);
enum mxc_cpu_pwr_mode {
WAIT_CLOCKED, /* wfi only */
......
arch/arm/mach-imx/cpu-imx25.c
View file @ db2f95de
......@@ -11,8 +11,9 @@
*/
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/iim.h>
#include "iim.h"
#include "hardware.h"
static int mx25_cpu_rev = -1;
......
arch/arm/mach-imx/cpu-imx27.c
View file @ db2f95de
......@@ -24,7 +24,7 @@
#include <linux/io.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include "hardware.h"
static int mx27_cpu_rev = -1;
static int mx27_cpu_partnumber;
......
arch/arm/mach-imx/cpu-imx31.c
View file @ db2f95de
......@@ -11,9 +11,10 @@
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/iim.h>
#include <mach/common.h>
#include "common.h"
#include "hardware.h"
#include "iim.h"
static int mx31_cpu_rev = -1;
......
arch/arm/mach-imx/cpu-imx35.c
View file @ db2f95de
......@@ -10,8 +10,9 @@
*/
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/iim.h>
#include "hardware.h"
#include "iim.h"
static int mx35_cpu_rev = -1;
......
arch/arm/mach-imx/cpu-imx5.c
View file @ db2f95de
......@@ -15,9 +15,10 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include <linux/io.h>
#include "hardware.h"
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
......
arch/arm/plat-mxc/cpu.c → arch/arm/mach-imx/cpu.c
View file @ db2f95de
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include "hardware.h"
unsigned int __mxc_cpu_type;
EXPORT_SYMBOL(__mxc_cpu_type);
......
arch/arm/mach-imx/cpu_op-mx51.c
View file @ db2f95de
......@@ -13,9 +13,10 @@
#include <linux/bug.h>
#include <linux/types.h>
#include <mach/hardware.h>
#include <linux/kernel.h>
#include "hardware.h"
static struct cpu_op mx51_cpu_op[] = {
{
.cpu_rate = 160000000,},
......
arch/arm/plat-mxc/cpufreq.c → arch/arm/mach-imx/cpufreq.c
View file @ db2f95de
......@@ -22,7 +22,8 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <mach/hardware.h>
#include "hardware.h"
#define CLK32_FREQ 32768
#define NANOSECOND (1000 * 1000 * 1000)
......
arch/arm/mach-imx/devices-imx1.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx1.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_imx_fb_data imx1_imx_fb_data;
#define imx1_add_imx_fb(pdata) \
......
arch/arm/mach-imx/devices-imx21.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx21.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
#define imx21_add_imx21_hcd(pdata) \
......
arch/arm/mach-imx/devices-imx25.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx25.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_fec_data imx25_fec_data;
#define imx25_add_fec(pdata) \
......
arch/arm/mach-imx/devices-imx27.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx27.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_fec_data imx27_fec_data;
#define imx27_add_fec(pdata) \
......@@ -54,8 +53,10 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[];
extern const struct imx_mx2_camera_data imx27_mx2_camera_data;
#define imx27_add_mx2_camera(pdata) \
imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
extern const struct imx_mx2_emma_data imx27_mx2_emmaprp_data;
#define imx27_add_mx2_emmaprp() \
imx_add_mx2_emmaprp(&imx27_mx2_camera_data)
imx_add_mx2_emmaprp(&imx27_mx2_emmaprp_data)
extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data;
#define imx27_add_mxc_ehci_otg(pdata) \
......
arch/arm/mach-imx/devices-imx31.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx31.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
#define imx31_add_fsl_usb2_udc(pdata) \
......
arch/arm/mach-imx/devices-imx35.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx35.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_fec_data imx35_fec_data;
#define imx35_add_fec(pdata) \
......
arch/arm/mach-imx/devices-imx50.h
View file @ db2f95de
......@@ -18,8 +18,7 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <mach/mx50.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
#define imx50_add_imx_uart(id, pdata) \
......
arch/arm/mach-imx/devices-imx51.h
View file @ db2f95de
......@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx51.h>
#include <mach/devices-common.h>
#include "devices/devices-common.h"
extern const struct imx_fec_data imx51_fec_data;
#define imx51_add_fec(pdata) \
......
arch/arm/plat-mxc/devices/Kconfig → arch/arm/mach-imx/devices/Kconfig
View file @ db2f95de
......@@ -56,6 +56,9 @@ config IMX_HAVE_PLATFORM_MX1_CAMERA
config IMX_HAVE_PLATFORM_MX2_CAMERA
bool
config IMX_HAVE_PLATFORM_MX2_EMMA
bool
config IMX_HAVE_PLATFORM_MXC_EHCI
bool
......
arch/arm/plat-mxc/devices/Makefile → arch/arm/mach-imx/devices/Makefile
View file @ db2f95de
obj-y := devices.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
......@@ -28,3 +30,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += platform-ahci-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
arch/arm/plat-mxc/include/mach/devices-common.h → arch/arm/mach-imx/devices/devices-common.h
View file @ db2f95de
......@@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
#include <linux/platform_data/video-imxfb.h>
struct imx_imx_fb_data {
const char *devid;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
......@@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb(
#include <linux/platform_data/i2c-imx.h>
struct imx_imx_i2c_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
......@@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera(
#include <linux/platform_data/camera-mx2.h>
struct imx_mx2_camera_data {
const char *devid;
resource_size_t iobasecsi;
resource_size_t iosizecsi;
resource_size_t irqcsi;
......@@ -229,8 +232,15 @@ struct imx_mx2_camera_data {
struct platform_device *__init imx_add_mx2_camera(
const struct imx_mx2_camera_data *data,
const struct mx2_camera_platform_data *pdata);
struct imx_mx2_emma_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_mx2_emmaprp(
const struct imx_mx2_camera_data *data);
const struct imx_mx2_emma_data *data);
#include <linux/platform_data/usb-ehci-mxc.h>
struct imx_mxc_ehci_data {
......@@ -244,6 +254,7 @@ struct platform_device *__init imx_add_mxc_ehci(
#include <linux/platform_data/mmc-mxcmmc.h>
struct imx_mxc_mmc_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
......@@ -256,6 +267,7 @@ struct platform_device *__init imx_add_mxc_mmc(
#include <linux/platform_data/mtd-mxc_nand.h>
struct imx_mxc_nand_data {
const char *devid;
/*
* id is traditionally 0, but -1 is more appropriate. We use -1 for new
* machines but don't change existing devices as the nand device usually
......@@ -290,6 +302,7 @@ struct platform_device *__init imx_add_mxc_pwm(
/* mxc_rtc */
struct imx_mxc_rtc_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
......@@ -326,7 +339,8 @@ struct platform_device *__init imx_add_spi_imx(
const struct imx_spi_imx_data *data,
const struct spi_imx_master *pdata);
struct platform_device *imx_add_imx_dma(void);
struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
int irq, int irq_err);
struct platform_device *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
......
arch/arm/plat-mxc/devices.c → arch/arm/mach-imx/devices/devices.c
View file @ db2f95de
......@@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <mach/common.h>
struct device mxc_aips_bus = {
.init_name = "mxc_aips",
......@@ -33,7 +32,7 @@ struct device mxc_ahb_bus = {
.parent = &platform_bus,
};
static int __init mxc_device_init(void)
int __init mxc_device_init(void)
{
int ret;
......@@ -46,4 +45,3 @@ static int __init mxc_device_init(void)
done:
return ret;
}
core_initcall(mxc_device_init);
arch/arm/plat-mxc/devices/platform-ahci-imx.c → arch/arm/mach-imx/devices/platform-ahci-imx.c
View file @ db2f95de
......@@ -24,8 +24,9 @@
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_ahci_imx_data_entry_single(soc, _devid) \
{ \
......
arch/arm/plat-mxc/devices/platform-fec.c → arch/arm/mach-imx/devices/platform-fec.c
View file @ db2f95de
......@@ -8,8 +8,9 @@
*/
#include <linux/dma-mapping.h>
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_fec_data_entry_single(soc, _devid) \
{ \
......
arch/arm/plat-mxc/devices/platform-flexcan.c → arch/arm/mach-imx/devices/platform-flexcan.c
View file @ db2f95de
......@@ -5,8 +5,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c → arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
View file @ db2f95de
......@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_fsl_usb2_udc_data_entry_single(soc) \
{ \
......
arch/arm/plat-mxc/devices/platform-gpio-mxc.c → arch/arm/mach-imx/devices/platform-gpio-mxc.c
View file @ db2f95de
......@@ -6,7 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/devices-common.h>
#include "devices-common.h"
struct platform_device *__init mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
......
arch/arm/plat-mxc/devices/platform-gpio_keys.c → arch/arm/mach-imx/devices/platform-gpio_keys.c
View file @ db2f95de
......@@ -16,8 +16,9 @@
* Boston, MA 02110-1301, USA.
*/
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
struct platform_device *__init imx_add_gpio_keys(
const struct gpio_keys_platform_data *pdata)
......
arch/arm/plat-mxc/devices/platform-imx-dma.c → arch/arm/mach-imx/devices/platform-imx-dma.c
View file @ db2f95de
......@@ -6,12 +6,29 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/devices-common.h>
#include "devices-common.h"
struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
resource_size_t iobase, int irq, int irq_err)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
}, {
.start = irq_err,
.end = irq_err,
.flags = IORESOURCE_IRQ,
},
};
return platform_device_register_resndata(&mxc_ahb_bus,
"imx-dma", -1, NULL, 0, NULL, 0);
name, -1, res, ARRAY_SIZE(res), NULL, 0);
}
struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
......
arch/arm/plat-mxc/devices/platform-imx-fb.c → arch/arm/mach-imx/devices/platform-imx-fb.c
View file @ db2f95de
......@@ -7,11 +7,13 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#define imx_imx_fb_data_entry_single(soc, _size) \
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_fb_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.iobase = soc ## _LCDC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_LCDC, \
......@@ -19,22 +21,22 @@
#ifdef CONFIG_SOC_IMX1
const struct imx_imx_fb_data imx1_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX1, SZ_4K);
imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX1 */
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX21, SZ_4K);
imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX25, SZ_16K);
imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX27, SZ_4K);
imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_imx_fb(
......
arch/arm/plat-mxc/devices/platform-imx-i2c.c → arch/arm/mach-imx/devices/platform-imx-i2c.c
View file @ db2f95de
......@@ -6,34 +6,35 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \
#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_I2C ## _hwid, \
}
#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \
[_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)
#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \
[_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX1
const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst =
imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K);
imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX1 */
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K);
imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
#define imx25_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K)
imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K)
imx25_imx_i2c_data_entry(0, 1),
imx25_imx_i2c_data_entry(1, 2),
imx25_imx_i2c_data_entry(2, 3),
......@@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
#define imx27_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K)
imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
imx27_imx_i2c_data_entry(0, 1),
imx27_imx_i2c_data_entry(1, 2),
};
......@@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
#define imx31_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K)
imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
imx31_imx_i2c_data_entry(0, 1),
imx31_imx_i2c_data_entry(1, 2),
imx31_imx_i2c_data_entry(2, 3),
......@@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
#define imx35_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K)
imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
imx35_imx_i2c_data_entry(0, 1),
imx35_imx_i2c_data_entry(1, 2),
imx35_imx_i2c_data_entry(2, 3),
......@@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
#ifdef CONFIG_SOC_IMX50
const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
#define imx50_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K)
imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
imx50_imx_i2c_data_entry(0, 1),
imx50_imx_i2c_data_entry(1, 2),
imx50_imx_i2c_data_entry(2, 3),
......@@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
#ifdef CONFIG_SOC_IMX51
const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
#define imx51_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K)
imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K)
imx51_imx_i2c_data_entry(0, 1),
imx51_imx_i2c_data_entry(1, 2),
{
.devid = "imx21-i2c",
.id = 2,
.iobase = MX51_HSI2C_DMA_BASE_ADDR,
.iosize = SZ_16K,
......@@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
#ifdef CONFIG_SOC_IMX53
const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = {
#define imx53_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K)
imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K)
imx53_imx_i2c_data_entry(0, 1),
imx53_imx_i2c_data_entry(1, 2),
imx53_imx_i2c_data_entry(2, 3),
......@@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c(
},
};
return imx_add_platform_device("imx-i2c", data->id,
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
}
arch/arm/plat-mxc/devices/platform-imx-keypad.c → arch/arm/mach-imx/devices/platform-imx-keypad.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_keypad_data_entry_single(soc, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-imx-ssi.c → arch/arm/mach-imx/devices/platform-imx-ssi.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
......
arch/arm/plat-mxc/devices/platform-imx-uart.c → arch/arm/mach-imx/devices/platform-imx-uart.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
......
arch/arm/plat-mxc/devices/platform-imx2-wdt.c → arch/arm/mach-imx/devices/platform-imx2-wdt.c
View file @ db2f95de
......@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-imx21-hcd.c → arch/arm/mach-imx/devices/platform-imx21-hcd.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx21_hcd_data_entry_single(soc) \
{ \
......
arch/arm/plat-mxc/devices/platform-imx27-coda.c → arch/arm/mach-imx/devices/platform-imx27-coda.c
View file @ db2f95de
......@@ -7,8 +7,8 @@
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#ifdef CONFIG_SOC_IMX27
const struct imx_imx27_coda_data imx27_coda_data __initconst = {
......
arch/arm/plat-mxc/devices/platform-imx_udc.c → arch/arm/mach-imx/devices/platform-imx_udc.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_udc_data_entry_single(soc, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-imxdi_rtc.c → arch/arm/mach-imx/devices/platform-imxdi_rtc.c
View file @ db2f95de
......@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imxdi_rtc_data_entry_single(soc) \
{ \
......
arch/arm/plat-mxc/devices/platform-ipu-core.c → arch/arm/mach-imx/devices/platform-ipu-core.c
View file @ db2f95de
......@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_ipu_core_entry_single(soc) \
{ \
......
arch/arm/plat-mxc/devices/platform-mx1-camera.c → arch/arm/mach-imx/devices/platform-mx1-camera.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mx1_camera_data_entry_single(soc, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-mx2-camera.c → arch/arm/mach-imx/devices/platform-mx2-camera.c
View file @ db2f95de
......@@ -6,17 +6,19 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mx2_camera_data_entry_single(soc) \
#define imx_mx2_camera_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_4K, \
.irqcsi = soc ## _INT_CSI, \
}
#define imx_mx2_camera_data_entry_single_emma(soc) \
#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \
{ \
.devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_32, \
.irqcsi = soc ## _INT_CSI, \
......@@ -27,12 +29,12 @@
#ifdef CONFIG_SOC_IMX25
const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
imx_mx2_camera_data_entry_single(MX25);
imx_mx2_camera_data_entry_single(MX25, "imx25-camera");
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
imx_mx2_camera_data_entry_single_emma(MX27);
imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_mx2_camera(
......@@ -58,25 +60,8 @@ struct platform_device *__init imx_add_mx2_camera(
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("mx2-camera", 0,
return imx_add_platform_device_dmamask(data->devid, 0,
res, data->iobaseemmaprp ? 4 : 2,
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
struct platform_device *__init imx_add_mx2_emmaprp(
const struct imx_mx2_camera_data *data)
{
struct resource res[] = {
{
.start = data->iobaseemmaprp,
.end = data->iobaseemmaprp + data->iosizeemmaprp - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irqemmaprp,
.end = data->irqemmaprp,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("m2m-emmaprp", 0,
res, 2, NULL, 0, DMA_BIT_MASK(32));
}
arch/arm/plat-mxc/devices/platform-mxc-ehci.c → arch/arm/mach-imx/devices/platform-mxc-ehci.c
View file @ db2f95de
......@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
{ \
......
arch/arm/plat-mxc/devices/platform-mxc-mmc.c → arch/arm/mach-imx/devices/platform-mxc-mmc.c
View file @ db2f95de
......@@ -7,24 +7,26 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_SDHC ## _hwid, \
.dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
}
#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \
[_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)
#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \
[_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
#define imx21_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K)
imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
imx21_mxc_mmc_data_entry(0, 1),
imx21_mxc_mmc_data_entry(1, 2),
};
......@@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
#define imx27_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K)
imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
imx27_mxc_mmc_data_entry(0, 1),
imx27_mxc_mmc_data_entry(1, 2),
};
......@@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
#define imx31_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K)
imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
imx31_mxc_mmc_data_entry(0, 1),
imx31_mxc_mmc_data_entry(1, 2),
};
......@@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc(
.flags = IORESOURCE_DMA,
},
};
return imx_add_platform_device_dmamask("mxc-mmc", data->id,
return imx_add_platform_device_dmamask(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/plat-mxc/devices/platform-mxc_nand.c → arch/arm/mach-imx/devices/platform-mxc_nand.c
View file @ db2f95de
......@@ -7,18 +7,21 @@
* Free Software Foundation.
*/
#include <asm/sizes.h>
#include <mach/hardware.h>
#include <mach/devices-common.h>
#define imx_mxc_nand_data_entry_single(soc, _size) \
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_NFC \
}
#define imx_mxc_nandv3_data_entry_single(soc, _size) \
#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.id = -1, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
......@@ -28,32 +31,32 @@
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX21, SZ_4K);
imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX25, SZ_8K);
imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX27, SZ_4K);
imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX31, SZ_4K);
imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
#endif
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX35, SZ_8K);
imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
#endif
#ifdef CONFIG_SOC_IMX51
const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst =
imx_mxc_nandv3_data_entry_single(MX51, SZ_16K);
imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K);
#endif
struct platform_device *__init imx_add_mxc_nand(
......@@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand(
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device("mxc_nand", data->id,
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res) - !data->axibase,
pdata, sizeof(*pdata));
}
arch/arm/plat-mxc/devices/platform-mxc_pwm.c → arch/arm/mach-imx/devices/platform-mxc_pwm.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-mxc_rnga.c → arch/arm/mach-imx/devices/platform-mxc_rnga.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
struct imx_mxc_rnga_data {
resource_size_t iobase;
......
arch/arm/plat-mxc/devices/platform-mxc_rtc.c → arch/arm/mach-imx/devices/platform-mxc_rtc.c
View file @ db2f95de
......@@ -6,23 +6,24 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_rtc_data_entry_single(soc) \
#define imx_mxc_rtc_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _RTC_BASE_ADDR, \
.irq = soc ## _INT_RTC, \
}
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
imx_mxc_rtc_data_entry_single(MX31);
imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
imx_mxc_rtc_data_entry_single(MX35);
imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_rtc(
......@@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc(
},
};
return imx_add_platform_device("mxc_rtc", -1,
return imx_add_platform_device(data->devid, -1,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/plat-mxc/devices/platform-mxc_w1.c → arch/arm/mach-imx/devices/platform-mxc_w1.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_w1_data_entry_single(soc) \
{ \
......
arch/arm/plat-mxc/devices/platform-pata_imx.c → arch/arm/mach-imx/devices/platform-pata_imx.c
View file @ db2f95de
......@@ -3,8 +3,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_pata_imx_data_entry_single(soc, _size) \
{ \
......
arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c → arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
View file @ db2f95de
......@@ -6,10 +6,11 @@
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include <linux/platform_data/mmc-esdhc-imx.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
{ \
.devid = _devid, \
......
arch/arm/plat-mxc/devices/platform-spi_imx.c → arch/arm/mach-imx/devices/platform-spi_imx.c
View file @ db2f95de
......@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
{ \
......
arch/arm/mach-imx/ehci-imx25.c
View file @ db2f95de
......@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX25_OTG_SIC_SHIFT 29
......
arch/arm/mach-imx/ehci-imx27.c
View file @ db2f95de
......@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX27_OTG_SIC_SHIFT 29
......
arch/arm/mach-imx/ehci-imx31.c
View file @ db2f95de
......@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX31_OTG_SIC_SHIFT 29
......
arch/arm/mach-imx/ehci-imx35.c
View file @ db2f95de
......@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX35_OTG_SIC_SHIFT 29
......
arch/arm/mach-imx/ehci-imx5.c
View file @ db2f95de
......@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "hardware.h"
#define MXC_OTG_OFFSET 0
#define MXC_H1_OFFSET 0x200
#define MXC_H2_OFFSET 0x400
......
arch/arm/plat-mxc/epit.c → arch/arm/mach-imx/epit.c
View file @ db2f95de
......@@ -51,10 +51,10 @@
#include <linux/clockchips.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include <asm/mach/time.h>
#include <mach/common.h>
#include "common.h"
#include "hardware.h"
static struct clock_event_device clockevent_epit;
static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
......
arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
View file @ db2f95de
......@@ -29,11 +29,10 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
#include <mach/iomux-mx27.h>
#include <mach/hardware.h>
#include "common.h"
#include "devices-imx27.h"
#include "hardware.h"
#include "iomux-mx27.h"
static const int eukrea_mbimx27_pins[] __initconst = {
/* UART2 */
......
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