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Commit db2ffb28 authored by Linus Torvalds's avatar Linus Torvalds
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Merge bk://kernel.bkbits.net/davem/net-2.6 

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 6ed03238 36d3ea77
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Showing with 429 additions and 368 deletions
arch/i386/kernel/pci-dma.c
View file @ db2ffb28
......@@ -72,7 +72,7 @@ void dma_free_coherent(struct device *dev, size_t size,
int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
dma_addr_t device_addr, size_t size, int flags)
{
void *mem_base;
void __iomem *mem_base;
int pages = size >> PAGE_SHIFT;
int bitmap_size = (pages + 31)/32;
......
arch/i386/mm/ioremap.c
View file @ db2ffb28
......@@ -110,9 +110,9 @@ static int remap_area_pages(unsigned long address, unsigned long phys_addr,
* have to convert them into an offset in a page-aligned mapping, but the
* caller shouldn't need to know that small detail.
*/
void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
{
void * addr;
void __iomem * addr;
struct vm_struct * area;
unsigned long offset, last_addr;
......@@ -125,7 +125,7 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag
* Don't remap the low PCI/ISA area, it's always mapped..
*/
if (phys_addr >= 0xA0000 && last_addr < 0x100000)
return phys_to_virt(phys_addr);
return (void __iomem *) phys_to_virt(phys_addr);
/*
* Don't allow anybody to remap normal RAM that we're using..
......@@ -156,12 +156,12 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag
if (!area)
return NULL;
area->phys_addr = phys_addr;
addr = area->addr;
addr = (void __iomem *) area->addr;
if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) {
vunmap(addr);
vunmap((void __force *) addr);
return NULL;
}
return (void *) (offset + (char *)addr);
return (void __iomem *) (offset + (char __iomem *)addr);
}
......@@ -187,10 +187,10 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag
* Must be freed with iounmap.
*/
void *ioremap_nocache (unsigned long phys_addr, unsigned long size)
void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
{
unsigned long last_addr;
void *p = __ioremap(phys_addr, size, _PAGE_PCD);
void __iomem *p = __ioremap(phys_addr, size, _PAGE_PCD);
if (!p)
return p;
......@@ -221,12 +221,12 @@ void *ioremap_nocache (unsigned long phys_addr, unsigned long size)
return p;
}
void iounmap(void *addr)
void iounmap(volatile void __iomem *addr)
{
struct vm_struct *p;
if (addr <= high_memory)
if ((void __force *) addr <= high_memory)
return;
p = remove_vm_area((void *) (PAGE_MASK & (unsigned long) addr));
p = remove_vm_area((void *) (PAGE_MASK & (unsigned long __force) addr));
if (!p) {
printk("__iounmap: bad address %p\n", addr);
return;
......
arch/i386/pci/mmconfig.c
View file @ db2ffb28
......@@ -9,7 +9,7 @@
/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
u32 pci_mmcfg_base_addr;
#define mmcfg_virt_addr (fix_to_virt(FIX_PCIE_MCFG))
#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
/* The base address of the last MMCONFIG device accessed */
static u32 mmcfg_last_accessed_device;
......
arch/ppc64/kernel/eeh.c
View file @ db2ffb28
......@@ -473,7 +473,7 @@ EXPORT_SYMBOL(eeh_dn_check_failure);
*
* Note this routine is safe to call in an interrupt context.
*/
unsigned long eeh_check_failure(void *token, unsigned long val)
unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
{
unsigned long addr;
struct pci_dev *dev;
......@@ -739,7 +739,7 @@ EXPORT_SYMBOL(eeh_remove_device);
* Remap the addr (trivially) to the EEH region if EEH checking enabled.
* For addresses not known to PCI the vaddr is simply returned unchanged.
*/
void *eeh_ioremap(unsigned long addr, void *vaddr)
void __iomem *eeh_ioremap(unsigned long addr, void __iomem *vaddr)
{
struct pci_dev *dev;
struct device_node *dn;
......@@ -763,7 +763,7 @@ void *eeh_ioremap(unsigned long addr, void *vaddr)
}
pci_dev_put(dev);
return (void *)IO_ADDR_TO_TOKEN(vaddr);
return (void __iomem *)IO_ADDR_TO_TOKEN(vaddr);
}
static int proc_eeh_show(struct seq_file *m, void *v)
......
arch/ppc64/kernel/iSeries_pci.c
View file @ db2ffb28
......@@ -419,46 +419,39 @@ static int iSeries_Scan_Bridge_Slot(HvBusNumber Bus,
* I/0 Memory copy MUST use mmio commands on iSeries
* To do; For performance, include the hv call directly
*/
void *iSeries_memset_io(void *dest, char c, size_t Count)
void iSeries_memset_io(volatile void __iomem *dest, char c, size_t Count)
{
u8 ByteValue = c;
long NumberOfBytes = Count;
char *IoBuffer = dest;
while (NumberOfBytes > 0) {
iSeries_Write_Byte(ByteValue, (void *)IoBuffer);
++IoBuffer;
iSeries_Write_Byte(ByteValue, dest++);
-- NumberOfBytes;
}
return dest;
}
EXPORT_SYMBOL(iSeries_memset_io);
void *iSeries_memcpy_toio(void *dest, void *source, size_t count)
void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, size_t count)
{
char *dst = dest;
char *src = source;
long NumberOfBytes = count;
while (NumberOfBytes > 0) {
iSeries_Write_Byte(*src++, (void *)dst++);
iSeries_Write_Byte(*src++, dest++);
-- NumberOfBytes;
}
return dest;
}
EXPORT_SYMBOL(iSeries_memcpy_toio);
void *iSeries_memcpy_fromio(void *dest, void *source, size_t count)
void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *src, size_t count)
{
char *dst = dest;
char *src = source;
long NumberOfBytes = count;
while (NumberOfBytes > 0) {
*dst++ = iSeries_Read_Byte((void *)src++);
*dst++ = iSeries_Read_Byte(src++);
-- NumberOfBytes;
}
return dest;
}
EXPORT_SYMBOL(iSeries_memcpy_fromio);
......@@ -612,17 +605,19 @@ static int CheckReturnCode(char *TextHdr, struct iSeries_Device_Node *DevNode,
* Note: Make sure the passed variable end up on the stack to avoid
* the exposure of being device global.
*/
static inline struct iSeries_Device_Node *xlateIoMmAddress(void *IoAddress,
static inline struct iSeries_Device_Node *xlateIoMmAddress(const volatile void __iomem *IoAddress,
u64 *dsaptr, u64 *BarOffsetPtr)
{
unsigned long OrigIoAddr;
unsigned long BaseIoAddr;
unsigned long TableIndex;
struct iSeries_Device_Node *DevNode;
if (((unsigned long)IoAddress < iSeries_Base_Io_Memory) ||
((unsigned long)IoAddress >= iSeries_Max_Io_Memory))
OrigIoAddr = (unsigned long __force)IoAddress;
if ((OrigIoAddr < iSeries_Base_Io_Memory) ||
(OrigIoAddr >= iSeries_Max_Io_Memory))
return NULL;
BaseIoAddr = (unsigned long)IoAddress - iSeries_Base_Io_Memory;
BaseIoAddr = OrigIoAddr - iSeries_Base_Io_Memory;
TableIndex = BaseIoAddr / iSeries_IoMmTable_Entry_Size;
DevNode = iSeries_IoMmTable[TableIndex];
......@@ -644,7 +639,7 @@ static inline struct iSeries_Device_Node *xlateIoMmAddress(void *IoAddress,
* iSeries_Read_Word = Read Word (16 bit)
* iSeries_Read_Long = Read Long (32 bit)
*/
u8 iSeries_Read_Byte(void *IoAddress)
u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
{
u64 BarOffset;
u64 dsa;
......@@ -673,7 +668,7 @@ u8 iSeries_Read_Byte(void *IoAddress)
}
EXPORT_SYMBOL(iSeries_Read_Byte);
u16 iSeries_Read_Word(void *IoAddress)
u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
{
u64 BarOffset;
u64 dsa;
......@@ -703,7 +698,7 @@ u16 iSeries_Read_Word(void *IoAddress)
}
EXPORT_SYMBOL(iSeries_Read_Word);
u32 iSeries_Read_Long(void *IoAddress)
u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
{
u64 BarOffset;
u64 dsa;
......@@ -740,7 +735,7 @@ EXPORT_SYMBOL(iSeries_Read_Long);
* iSeries_Write_Word = Write Word(16 bit)
* iSeries_Write_Long = Write Long(32 bit)
*/
void iSeries_Write_Byte(u8 data, void *IoAddress)
void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
{
u64 BarOffset;
u64 dsa;
......@@ -767,7 +762,7 @@ void iSeries_Write_Byte(u8 data, void *IoAddress)
}
EXPORT_SYMBOL(iSeries_Write_Byte);
void iSeries_Write_Word(u16 data, void *IoAddress)
void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
{
u64 BarOffset;
u64 dsa;
......@@ -794,7 +789,7 @@ void iSeries_Write_Word(u16 data, void *IoAddress)
}
EXPORT_SYMBOL(iSeries_Write_Word);
void iSeries_Write_Long(u32 data, void *IoAddress)
void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
{
u64 BarOffset;
u64 dsa;
......
arch/ppc64/mm/init.c
View file @ db2ffb28
......@@ -117,18 +117,18 @@ void show_mem(void)
#ifdef CONFIG_PPC_ISERIES
void *ioremap(unsigned long addr, unsigned long size)
void __iomem *ioremap(unsigned long addr, unsigned long size)
{
return (void *)addr;
return (void __iomem *)addr;
}
extern void *__ioremap(unsigned long addr, unsigned long size,
extern void __iomem *__ioremap(unsigned long addr, unsigned long size,
unsigned long flags)
{
return (void *)addr;
return (void __iomem *)addr;
}
void iounmap(void *addr)
void iounmap(volatile void __iomem *addr)
{
return;
}
......@@ -182,7 +182,7 @@ static void map_io_page(unsigned long ea, unsigned long pa, int flags)
}
static void * __ioremap_com(unsigned long addr, unsigned long pa,
static void __iomem * __ioremap_com(unsigned long addr, unsigned long pa,
unsigned long ea, unsigned long size,
unsigned long flags)
{
......@@ -197,20 +197,20 @@ static void * __ioremap_com(unsigned long addr, unsigned long pa,
map_io_page(ea+i, pa+i, flags);
}
return (void *) (ea + (addr & ~PAGE_MASK));
return (void __iomem *) (ea + (addr & ~PAGE_MASK));
}
void *
void __iomem *
ioremap(unsigned long addr, unsigned long size)
{
void *ret = __ioremap(addr, size, _PAGE_NO_CACHE);
void __iomem *ret = __ioremap(addr, size, _PAGE_NO_CACHE);
if(mem_init_done)
return eeh_ioremap(addr, ret); /* may remap the addr */
return ret;
}
void *
void __iomem *
__ioremap(unsigned long addr, unsigned long size, unsigned long flags)
{
unsigned long pa, ea;
......@@ -353,11 +353,12 @@ static void unmap_im_area_pmd(pgd_t *dir, unsigned long address,
*
* XXX what about calls before mem_init_done (ie python_countermeasures())
*/
void iounmap(void *addr)
void iounmap(volatile void __iomem *token)
{
unsigned long address, start, end, size;
struct mm_struct *mm;
pgd_t *dir;
void *addr;
if (!mem_init_done) {
return;
......@@ -365,7 +366,7 @@ void iounmap(void *addr)
/* addr could be in EEH or IO region, map it to IO region regardless.
*/
addr = (void *) (IO_TOKEN_TO_ADDR(addr) & PAGE_MASK);
addr = (void *) (IO_TOKEN_TO_ADDR(token) & PAGE_MASK);
if ((size = im_free(addr)) == 0) {
return;
......@@ -391,38 +392,39 @@ void iounmap(void *addr)
return;
}
static int iounmap_subset_regions(void *addr, unsigned long size)
static int iounmap_subset_regions(unsigned long addr, unsigned long size)
{
struct vm_struct *area;
/* Check whether subsets of this region exist */
area = im_get_area((unsigned long) addr, size, IM_REGION_SUPERSET);
area = im_get_area(addr, size, IM_REGION_SUPERSET);
if (area == NULL)
return 1;
while (area) {
iounmap(area->addr);
area = im_get_area((unsigned long) addr, size,
iounmap((void __iomem *) area->addr);
area = im_get_area(addr, size,
IM_REGION_SUPERSET);
}
return 0;
}
int iounmap_explicit(void *addr, unsigned long size)
int iounmap_explicit(volatile void __iomem *start, unsigned long size)
{
struct vm_struct *area;
unsigned long addr;
int rc;
/* addr could be in EEH or IO region, map it to IO region regardless.
*/
addr = (void *) (IO_TOKEN_TO_ADDR(addr) & PAGE_MASK);
addr = (IO_TOKEN_TO_ADDR(start) & PAGE_MASK);
/* Verify that the region either exists or is a subset of an existing
* region. In the latter case, split the parent region to create
* the exact region
*/
area = im_get_area((unsigned long) addr, size,
area = im_get_area(addr, size,
IM_REGION_EXISTS | IM_REGION_SUBSET);
if (area == NULL) {
/* Determine whether subset regions exist. If so, unmap */
......@@ -430,14 +432,17 @@ int iounmap_explicit(void *addr, unsigned long size)
if (rc) {
printk(KERN_ERR
"%s() cannot unmap nonexistent range 0x%lx\n",
__FUNCTION__, (unsigned long) addr);
__FUNCTION__, addr);
return 1;
}
} else {
iounmap(area->addr);
iounmap((void __iomem *) area->addr);
}
/*
* FIXME! This can't be right:
iounmap(area->addr);
* Maybe it should be "iounmap(area);"
*/
return 0;
}
......
arch/x86_64/kernel/early_printk.c
View file @ db2ffb28
......@@ -8,7 +8,7 @@
/* Simple VGA output */
#ifdef __i386__
#define VGABASE __pa((void *)(__PAGE_OFFSET + 0xb8000UL))
#define VGABASE (__ISA_IO_base + 0xb8000)
#else
#define VGABASE 0xffffffff800b8000UL
#endif
......
drivers/acpi/osl.c
View file @ db2ffb28
......@@ -171,11 +171,11 @@ acpi_os_get_root_pointer(u32 flags, struct acpi_pointer *addr)
}
acpi_status
acpi_os_map_memory(acpi_physical_address phys, acpi_size size, void **virt)
acpi_os_map_memory(acpi_physical_address phys, acpi_size size, void __iomem **virt)
{
if (efi_enabled) {
if (EFI_MEMORY_WB & efi_mem_attributes(phys)) {
*virt = phys_to_virt(phys);
*virt = (void __iomem *) phys_to_virt(phys);
} else {
*virt = ioremap(phys, size);
}
......@@ -197,7 +197,7 @@ acpi_os_map_memory(acpi_physical_address phys, acpi_size size, void **virt)
}
void
acpi_os_unmap_memory(void *virt, acpi_size size)
acpi_os_unmap_memory(void __iomem *virt, acpi_size size)
{
iounmap(virt);
}
......@@ -376,30 +376,31 @@ acpi_os_read_memory(
u32 width)
{
u32 dummy;
void *virt_addr;
void __iomem *virt_addr;
int iomem = 0;
if (efi_enabled) {
if (EFI_MEMORY_WB & efi_mem_attributes(phys_addr)) {
virt_addr = phys_to_virt(phys_addr);
/* HACK ALERT! We can use readb/w/l on real memory too.. */
virt_addr = (void __iomem *) phys_to_virt(phys_addr);
} else {
iomem = 1;
virt_addr = ioremap(phys_addr, width);
}
} else
virt_addr = phys_to_virt(phys_addr);
virt_addr = (void __iomem *) phys_to_virt(phys_addr);
if (!value)
value = &dummy;
switch (width) {
case 8:
*(u8*) value = *(u8*) virt_addr;
*(u8*) value = readb(virt_addr);
break;
case 16:
*(u16*) value = *(u16*) virt_addr;
*(u16*) value = readw(virt_addr);
break;
case 32:
*(u32*) value = *(u32*) virt_addr;
*(u32*) value = readl(virt_addr);
break;
default:
BUG();
......@@ -419,28 +420,29 @@ acpi_os_write_memory(
u32 value,
u32 width)
{
void *virt_addr;
void __iomem *virt_addr;
int iomem = 0;
if (efi_enabled) {
if (EFI_MEMORY_WB & efi_mem_attributes(phys_addr)) {
virt_addr = phys_to_virt(phys_addr);
/* HACK ALERT! We can use writeb/w/l on real memory too */
virt_addr = (void __iomem *) phys_to_virt(phys_addr);
} else {
iomem = 1;
virt_addr = ioremap(phys_addr, width);
}
} else
virt_addr = phys_to_virt(phys_addr);
virt_addr = (void __iomem *) phys_to_virt(phys_addr);
switch (width) {
case 8:
*(u8*) virt_addr = value;
writeb(value, virt_addr);
break;
case 16:
*(u16*) virt_addr = value;
writew(value, virt_addr);
break;
case 32:
*(u32*) virt_addr = value;
writel(value, virt_addr);
break;
default:
BUG();
......@@ -962,7 +964,7 @@ acpi_os_readable(void *ptr, acpi_size len)
{
#if defined(__i386__) || defined(__x86_64__)
char tmp;
return !__get_user(tmp, (char *)ptr) && !__get_user(tmp, (char *)ptr + len - 1);
return !__get_user(tmp, (char __user *)ptr) && !__get_user(tmp, (char __user *)ptr + len - 1);
#endif
return 1;
}
......
drivers/char/agp/agp.h
View file @ db2ffb28
......@@ -123,7 +123,7 @@ struct agp_bridge_data {
void *current_size;
void *dev_private_data;
struct pci_dev *dev;
u32 *gatt_table;
u32 __iomem *gatt_table;
u32 *gatt_table_real;
unsigned long scratch_page;
unsigned long scratch_page_real;
......
drivers/char/agp/intel-agp.c
View file @ db2ffb28
......@@ -69,7 +69,7 @@ static struct gatt_mask intel_i810_masks[] =
static struct _intel_i810_private {
struct pci_dev *i810_dev; /* device one */
volatile u8 *registers;
volatile u8 __iomem *registers;
int num_dcache_entries;
} intel_i810_private;
......@@ -111,7 +111,7 @@ static int intel_i810_configure(void)
pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
temp &= 0xfff80000;
intel_i810_private.registers = (volatile u8 *) ioremap(temp, 128 * 4096);
intel_i810_private.registers = ioremap(temp, 128 * 4096);
if (!intel_i810_private.registers) {
printk(KERN_ERR PFX "Unable to remap memory.\n");
return -ENOMEM;
......@@ -142,7 +142,7 @@ static int intel_i810_configure(void)
static void intel_i810_cleanup(void)
{
OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL, 0);
iounmap((void *) intel_i810_private.registers);
iounmap(intel_i810_private.registers);
}
static void intel_i810_tlbflush(struct agp_memory *mem)
......@@ -353,8 +353,8 @@ static struct aper_size_info_fixed intel_i830_sizes[] =
static struct _intel_i830_private {
struct pci_dev *i830_dev; /* device one */
volatile u8 *registers;
volatile u32 *gtt; /* I915G */
volatile u8 __iomem *registers;
volatile u32 __iomem *gtt; /* I915G */
int gtt_entries;
} intel_i830_private;
......@@ -461,7 +461,7 @@ static int intel_i830_create_gatt_table(void)
pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
temp &= 0xfff80000;
intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
intel_i830_private.registers = ioremap(temp,128 * 4096);
if (!intel_i830_private.registers)
return (-ENOMEM);
......@@ -544,7 +544,7 @@ static int intel_i830_configure(void)
static void intel_i830_cleanup(void)
{
iounmap((void *) intel_i830_private.registers);
iounmap(intel_i830_private.registers);
}
static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
......@@ -649,8 +649,8 @@ static int intel_i915_configure(void)
static void intel_i915_cleanup(void)
{
iounmap((void *) intel_i830_private.gtt);
iounmap((void *) intel_i830_private.registers);
iounmap(intel_i830_private.gtt);
iounmap(intel_i830_private.registers);
}
static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
......@@ -751,13 +751,13 @@ static int intel_i915_create_gatt_table(void)
pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
intel_i830_private.gtt = (volatile u32 *) ioremap(temp2, 256 * 1024);
intel_i830_private.gtt = ioremap(temp2, 256 * 1024);
if (!intel_i830_private.gtt)
return (-ENOMEM);
temp &= 0xfff80000;
intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
intel_i830_private.registers = ioremap(temp,128 * 4096);
if (!intel_i830_private.registers)
return (-ENOMEM);
......
drivers/char/drm/drm_os_linux.h
View file @ db2ffb28
......@@ -16,17 +16,17 @@
#define DRM_CURRENTPID current->pid
#define DRM_UDELAY(d) udelay(d)
/** Read a byte from a MMIO region */
#define DRM_READ8(map, offset) readb(((unsigned long)(map)->handle) + (offset))
#define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset))
/** Read a word from a MMIO region */
#define DRM_READ16(map, offset) readw(((unsigned long)(map)->handle) + (offset))
#define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset))
/** Read a dword from a MMIO region */
#define DRM_READ32(map, offset) readl(((unsigned long)(map)->handle) + (offset))
#define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset))
/** Write a byte into a MMIO region */
#define DRM_WRITE8(map, offset, val) writeb(val, ((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset))
/** Write a word into a MMIO region */
#define DRM_WRITE16(map, offset, val) writew(val, ((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset))
/** Write a dword into a MMIO region */
#define DRM_WRITE32(map, offset, val) writel(val, ((unsigned long)(map)->handle) + (offset))
#define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))
/** Read memory barrier */
#define DRM_READMEMORYBARRIER() rmb()
/** Write memory barrier */
......
drivers/ide/ide-iops.c
View file @ db2ffb28
......@@ -112,57 +112,57 @@ EXPORT_SYMBOL(default_hwif_iops);
static u8 ide_mm_inb (unsigned long port)
{
return (u8) readb(port);
return (u8) readb((void __iomem *) port);
}
static u16 ide_mm_inw (unsigned long port)
{
return (u16) readw(port);
return (u16) readw((void __iomem *) port);
}
static void ide_mm_insw (unsigned long port, void *addr, u32 count)
{
__ide_mm_insw(port, addr, count);
__ide_mm_insw((void __iomem *) port, addr, count);
}
static u32 ide_mm_inl (unsigned long port)
{
return (u32) readl(port);
return (u32) readl((void __iomem *) port);
}
static void ide_mm_insl (unsigned long port, void *addr, u32 count)
{
__ide_mm_insl(port, addr, count);
__ide_mm_insl((void __iomem *) port, addr, count);
}
static void ide_mm_outb (u8 value, unsigned long port)
{
writeb(value, port);
writeb(value, (void __iomem *) port);
}
static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
{
writeb(value, port);
writeb(value, (void __iomem *) port);
}
static void ide_mm_outw (u16 value, unsigned long port)
{
writew(value, port);
writew(value, (void __iomem *) port);
}
static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
{
__ide_mm_outsw(port, addr, count);
__ide_mm_outsw((void __iomem *) port, addr, count);
}
static void ide_mm_outl (u32 value, unsigned long port)
{
writel(value, port);
writel(value, (void __iomem *) port);
}
static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
{
__ide_mm_outsl(port, addr, count);
__ide_mm_outsl((void __iomem *) port, addr, count);
}
void default_hwif_mmiops (ide_hwif_t *hwif)
......
drivers/ide/pci/siimage.c
View file @ db2ffb28
......@@ -727,8 +727,7 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
unsigned long bar5 = pci_resource_start(dev, 5);
unsigned long barsize = pci_resource_len(dev, 5);
u8 tmpbyte = 0;
unsigned long addr;
void *ioaddr;
void __iomem *ioaddr;
/*
* Drop back to PIO if we can't map the mmio. Some
......@@ -751,22 +750,21 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
}
pci_set_master(dev);
pci_set_drvdata(dev, ioaddr);
addr = (unsigned long) ioaddr;
pci_set_drvdata(dev, (void *) ioaddr);
if (pdev_is_sata(dev)) {
writel(0, addr + 0x148);
writel(0, addr + 0x1C8);
writel(0, ioaddr + 0x148);
writel(0, ioaddr + 0x1C8);
}
writeb(0, addr + 0xB4);
writeb(0, addr + 0xF4);
tmpbyte = readb(addr + 0x4A);
writeb(0, ioaddr + 0xB4);
writeb(0, ioaddr + 0xF4);
tmpbyte = readb(ioaddr + 0x4A);
switch(tmpbyte & 0x30) {
case 0x00:
/* In 100 MHz clocking, try and switch to 133 */
writeb(tmpbyte|0x10, addr + 0x4A);
writeb(tmpbyte|0x10, ioaddr + 0x4A);
break;
case 0x10:
/* On 133Mhz clocking */
......@@ -777,29 +775,29 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
case 0x30:
/* Clocking is disabled */
/* 133 clock attempt to force it on */
writeb(tmpbyte & ~0x20, addr + 0x4A);
writeb(tmpbyte & ~0x20, ioaddr + 0x4A);
break;
}
writeb( 0x72, addr + 0xA1);
writew( 0x328A, addr + 0xA2);
writel(0x62DD62DD, addr + 0xA4);
writel(0x43924392, addr + 0xA8);
writel(0x40094009, addr + 0xAC);
writeb( 0x72, addr + 0xE1);
writew( 0x328A, addr + 0xE2);
writel(0x62DD62DD, addr + 0xE4);
writel(0x43924392, addr + 0xE8);
writel(0x40094009, addr + 0xEC);
writeb( 0x72, ioaddr + 0xA1);
writew( 0x328A, ioaddr + 0xA2);
writel(0x62DD62DD, ioaddr + 0xA4);
writel(0x43924392, ioaddr + 0xA8);
writel(0x40094009, ioaddr + 0xAC);
writeb( 0x72, ioaddr + 0xE1);
writew( 0x328A, ioaddr + 0xE2);
writel(0x62DD62DD, ioaddr + 0xE4);
writel(0x43924392, ioaddr + 0xE8);
writel(0x40094009, ioaddr + 0xEC);
if (pdev_is_sata(dev)) {
writel(0xFFFF0000, addr + 0x108);
writel(0xFFFF0000, addr + 0x188);
writel(0x00680000, addr + 0x148);
writel(0x00680000, addr + 0x1C8);
writel(0xFFFF0000, ioaddr + 0x108);
writel(0xFFFF0000, ioaddr + 0x188);
writel(0x00680000, ioaddr + 0x148);
writel(0x00680000, ioaddr + 0x1C8);
}
tmpbyte = readb(addr + 0x4A);
tmpbyte = readb(ioaddr + 0x4A);
proc_reports_siimage(dev, (tmpbyte>>4), name);
return 1;
......
drivers/ide/ppc/pmac.c
View file @ db2ffb28
......@@ -568,7 +568,7 @@ pmac_outbsync(ide_drive_t *drive, u8 value, unsigned long port)
{
u32 tmp;
writeb(value, port);
writeb(value, (void __iomem *) port);
tmp = readl((unsigned *)(IDE_DATA_REG + IDE_TIMING_CONFIG));
}
......
drivers/ieee1394/ohci1394.h
View file @ db2ffb28
......@@ -163,7 +163,7 @@ struct ti_ohci {
} init_state;
/* remapped memory spaces */
void *registers;
void __iomem *registers;
/* dma buffer for self-id packets */
quadlet_t *selfid_buf_cpu;
......
drivers/net/sungem.c
View file @ db2ffb28
......@@ -2656,7 +2656,7 @@ static void find_eth_addr_in_vpd(void *rom_base, int len, unsigned char *dev_add
static void get_gem_mac_nonobp(struct pci_dev *pdev, unsigned char *dev_addr)
{
u32 rom_reg_orig;
void *p;
void __iomem *p;
if (pdev->resource[PCI_ROM_RESOURCE].parent == NULL) {
if (pci_assign_resource(pdev, PCI_ROM_RESOURCE) < 0)
......@@ -2825,7 +2825,7 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
gp->timer_ticks = 0;
netif_carrier_off(dev);
gp->regs = (unsigned long) ioremap(gemreg_base, gemreg_len);
gp->regs = ioremap(gemreg_base, gemreg_len);
if (gp->regs == 0UL) {
printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n");
......@@ -2944,7 +2944,7 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
gem_shutdown(gp);
up(&gp->pm_sem);
iounmap((void *) gp->regs);
iounmap(gp->regs);
err_out_free_res:
pci_release_regions(pdev);
......@@ -2978,7 +2978,7 @@ static void __devexit gem_remove_one(struct pci_dev *pdev)
sizeof(struct gem_init_block),
gp->init_block,
gp->gblock_dvma);
iounmap((void *) gp->regs);
iounmap(gp->regs);
pci_release_regions(pdev);
free_netdev(dev);
......
drivers/net/sungem.h
View file @ db2ffb28
......@@ -953,7 +953,7 @@ enum link_state {
struct gem {
spinlock_t lock;
unsigned long regs;
void __iomem *regs;
int rx_new, rx_old;
int tx_new, tx_old;
......
drivers/net/tg3.c
View file @ db2ffb28
......@@ -331,7 +331,7 @@ static void _tw32_flush(struct tg3 *tp, u32 off, u32 val)
pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val);
spin_unlock_irqrestore(&tp->indirect_lock, flags);
} else {
unsigned long dest = tp->regs + off;
void __iomem *dest = tp->regs + off;
writel(val, dest);
readl(dest); /* always flush PCI write */
}
......@@ -339,7 +339,7 @@ static void _tw32_flush(struct tg3 *tp, u32 off, u32 val)
static inline void _tw32_rx_mbox(struct tg3 *tp, u32 off, u32 val)
{
unsigned long mbox = tp->regs + off;
void __iomem *mbox = tp->regs + off;
writel(val, mbox);
if (tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER)
readl(mbox);
......@@ -347,7 +347,7 @@ static inline void _tw32_rx_mbox(struct tg3 *tp, u32 off, u32 val)
static inline void _tw32_tx_mbox(struct tg3 *tp, u32 off, u32 val)
{
unsigned long mbox = tp->regs + off;
void __iomem *mbox = tp->regs + off;
writel(val, mbox);
if (tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG)
writel(val, mbox);
......@@ -2976,7 +2976,7 @@ static void tg3_set_txd(struct tg3 *tp, int entry,
txd->vlan_tag = vlan_tag << TXD_VLAN_TAG_SHIFT;
} else {
struct tx_ring_info *txr = &tp->tx_buffers[entry];
unsigned long txd;
void __iomem *txd;
txd = (tp->regs +
NIC_SRAM_WIN_BASE +
......@@ -3339,7 +3339,7 @@ static void tg3_free_rings(struct tg3 *tp)
*/
static void tg3_init_rings(struct tg3 *tp)
{
unsigned long start, end;
void __iomem *start, *end;
u32 i;
/* Free up all the SKBs. */
......@@ -7614,7 +7614,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
chiprevid == CHIPREV_ID_5701_B0 ||
chiprevid == CHIPREV_ID_5701_B2 ||
chiprevid == CHIPREV_ID_5701_B5) {
unsigned long sram_base;
void __iomem *sram_base;
/* Write some dummy words into the SRAM status block
* area, see if it reads back correctly. If the return
......@@ -8305,7 +8305,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
spin_lock_init(&tp->indirect_lock);
INIT_WORK(&tp->reset_task, tg3_reset_task, tp);
tp->regs = (unsigned long) ioremap(tg3reg_base, tg3reg_len);
tp->regs = ioremap(tg3reg_base, tg3reg_len);
if (tp->regs == 0UL) {
printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n");
......@@ -8468,7 +8468,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
return 0;
err_out_iounmap:
iounmap((void *) tp->regs);
iounmap(tp->regs);
err_out_free_dev:
free_netdev(dev);
......@@ -8490,7 +8490,7 @@ static void __devexit tg3_remove_one(struct pci_dev *pdev)
struct tg3 *tp = netdev_priv(dev);
unregister_netdev(dev);
iounmap((void *)tp->regs);
iounmap(tp->regs);
free_netdev(dev);
pci_release_regions(pdev);
pci_disable_device(pdev);
......
drivers/net/tg3.h
View file @ db2ffb28
......@@ -1989,7 +1989,7 @@ struct tg3 {
spinlock_t lock;
spinlock_t indirect_lock;
unsigned long regs;
void __iomem *regs;
struct net_device *dev;
struct pci_dev *pdev;
......
drivers/net/tokenring/olympic.c
View file @ db2ffb28
......@@ -291,7 +291,7 @@ static int __devinit olympic_probe(struct pci_dev *pdev, const struct pci_device
static int __devinit olympic_init(struct net_device *dev)
{
struct olympic_private *olympic_priv;
u8 *olympic_mmio, *init_srb,*adapter_addr;
u8 __iomem *olympic_mmio, *init_srb,*adapter_addr;
unsigned long t;
unsigned int uaa_addr;
......@@ -435,7 +435,7 @@ static int __devinit olympic_init(struct net_device *dev)
static int olympic_open(struct net_device *dev)
{
struct olympic_private *olympic_priv=(struct olympic_private *)dev->priv;
u8 *olympic_mmio=olympic_priv->olympic_mmio,*init_srb;
u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio,*init_srb;
unsigned long flags, t;
char open_error[255] ;
int i, open_finished = 1 ;
......@@ -706,10 +706,10 @@ static int olympic_open(struct net_device *dev)
#endif
if (olympic_priv->olympic_network_monitor) {
u8 *oat ;
u8 *opt ;
oat = (u8 *)(olympic_priv->olympic_lap + olympic_priv->olympic_addr_table_addr) ;
opt = (u8 *)(olympic_priv->olympic_lap + olympic_priv->olympic_parms_addr) ;
u8 __iomem *oat ;
u8 __iomem *opt ;
oat = (olympic_priv->olympic_lap + olympic_priv->olympic_addr_table_addr) ;
opt = (olympic_priv->olympic_lap + olympic_priv->olympic_parms_addr) ;
printk("%s: Node Address: %02x:%02x:%02x:%02x:%02x:%02x\n",dev->name,
readb(oat+offsetof(struct olympic_adapter_addr_table,node_addr)),
......@@ -755,7 +755,7 @@ static int olympic_open(struct net_device *dev)
static void olympic_rx(struct net_device *dev)
{
struct olympic_private *olympic_priv=(struct olympic_private *)dev->priv;
u8 *olympic_mmio=olympic_priv->olympic_mmio;
u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
struct olympic_rx_status *rx_status;
struct olympic_rx_desc *rx_desc ;
int rx_ring_last_received,length, buffer_cnt, cpy_length, frag_len;
......@@ -925,9 +925,9 @@ static irqreturn_t olympic_interrupt(int irq, void *dev_id, struct pt_regs *regs
{
struct net_device *dev= (struct net_device *)dev_id;
struct olympic_private *olympic_priv=(struct olympic_private *)dev->priv;
u8 *olympic_mmio=olympic_priv->olympic_mmio;
u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
u32 sisr;
u8 *adapter_check_area ;
u8 __iomem *adapter_check_area ;
/*
* Read sisr but don't reset it yet.
......@@ -1049,7 +1049,7 @@ static irqreturn_t olympic_interrupt(int irq, void *dev_id, struct pt_regs *regs
static int olympic_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct olympic_private *olympic_priv=(struct olympic_private *)dev->priv;
u8 *olympic_mmio=olympic_priv->olympic_mmio;
u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
unsigned long flags ;
spin_lock_irqsave(&olympic_priv->olympic_lock, flags);
......@@ -1080,7 +1080,7 @@ static int olympic_xmit(struct sk_buff *skb, struct net_device *dev)
static int olympic_close(struct net_device *dev)
{
struct olympic_private *olympic_priv=(struct olympic_private *)dev->priv;
u8 *olympic_mmio=olympic_priv->olympic_mmio,*srb;
u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio,*srb;
unsigned long t,flags;
DECLARE_WAITQUEUE(wait,current) ;
......@@ -1152,9 +1152,9 @@ static int olympic_close(struct net_device *dev)
static void olympic_set_rx_mode(struct net_device *dev)
{
struct olympic_private *olympic_priv = (struct olympic_private *) dev->priv ;
u8 *olympic_mmio = olympic_priv->olympic_mmio ;
u8 __iomem *olympic_mmio = olympic_priv->olympic_mmio ;
u8 options = 0;
u8 *srb;
u8 __iomem *srb;
struct dev_mc_list *dmi ;
unsigned char dev_mc_address[4] ;
int i ;
......@@ -1220,8 +1220,8 @@ static void olympic_set_rx_mode(struct net_device *dev)
static void olympic_srb_bh(struct net_device *dev)
{
struct olympic_private *olympic_priv = (struct olympic_private *) dev->priv ;
u8 *olympic_mmio = olympic_priv->olympic_mmio ;
u8 *srb;
u8 __iomem *olympic_mmio = olympic_priv->olympic_mmio ;
u8 __iomem *srb;
writel(olympic_priv->srb,olympic_mmio+LAPA);
srb=olympic_priv->olympic_lap + (olympic_priv->srb & (~0xf800));
......@@ -1394,22 +1394,22 @@ static int olympic_set_mac_address (struct net_device *dev, void *addr)
static void olympic_arb_cmd(struct net_device *dev)
{
struct olympic_private *olympic_priv = (struct olympic_private *) dev->priv;
u8 *olympic_mmio=olympic_priv->olympic_mmio;
u8 *arb_block, *asb_block, *srb ;
u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
u8 __iomem *arb_block, *asb_block, *srb ;
u8 header_len ;
u16 frame_len, buffer_len ;
struct sk_buff *mac_frame ;
u8 *buf_ptr ;
u8 *frame_data ;
u8 __iomem *buf_ptr ;
u8 __iomem *frame_data ;
u16 buff_off ;
u16 lan_status = 0, lan_status_diff ; /* Initialize to stop compiler warning */
u8 fdx_prot_error ;
u16 next_ptr;
int i ;
arb_block = (u8 *)(olympic_priv->olympic_lap + olympic_priv->arb) ;
asb_block = (u8 *)(olympic_priv->olympic_lap + olympic_priv->asb) ;
srb = (u8 *)(olympic_priv->olympic_lap + olympic_priv->srb) ;
arb_block = (olympic_priv->olympic_lap + olympic_priv->arb) ;
asb_block = (olympic_priv->olympic_lap + olympic_priv->asb) ;
srb = (olympic_priv->olympic_lap + olympic_priv->srb) ;
if (readb(arb_block+0) == ARB_RECEIVE_DATA) { /* Receive.data, MAC frames */
......@@ -1604,10 +1604,10 @@ static void olympic_arb_cmd(struct net_device *dev)
static void olympic_asb_bh(struct net_device *dev)
{
struct olympic_private *olympic_priv = (struct olympic_private *) dev->priv ;
u8 *arb_block, *asb_block ;
u8 __iomem *arb_block, *asb_block ;
arb_block = (u8 *)(olympic_priv->olympic_lap + olympic_priv->arb) ;
asb_block = (u8 *)(olympic_priv->olympic_lap + olympic_priv->asb) ;
arb_block = (olympic_priv->olympic_lap + olympic_priv->arb) ;
asb_block = (olympic_priv->olympic_lap + olympic_priv->asb) ;
if (olympic_priv->asb_queued == 1) { /* Dropped through the first time */
......@@ -1666,8 +1666,8 @@ static int olympic_proc_info(char *buffer, char **start, off_t offset, int lengt
{
struct net_device *dev = (struct net_device *)data ;
struct olympic_private *olympic_priv=(struct olympic_private *)dev->priv;
u8 *oat = (u8 *)(olympic_priv->olympic_lap + olympic_priv->olympic_addr_table_addr) ;
u8 *opt = (u8 *)(olympic_priv->olympic_lap + olympic_priv->olympic_parms_addr) ;
u8 __iomem *oat = (olympic_priv->olympic_lap + olympic_priv->olympic_addr_table_addr) ;
u8 __iomem *opt = (olympic_priv->olympic_lap + olympic_priv->olympic_parms_addr) ;
int size = 0 ;
int len=0;
off_t begin=0;
......
drivers/net/tokenring/olympic.h
View file @ db2ffb28
......@@ -251,8 +251,8 @@ struct olympic_private {
u16 arb; /* be16 */
u16 asb; /* be16 */
u8 *olympic_mmio;
u8 *olympic_lap;
u8 __iomem *olympic_mmio;
u8 __iomem *olympic_lap;
struct pci_dev *pdev ;
char *olympic_card_name ;
......
drivers/scsi/libata-core.c
View file @ db2ffb28
......@@ -142,17 +142,17 @@ void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
if (tf->ctl != ap->last_ctl) {
writeb(tf->ctl, ap->ioaddr.ctl_addr);
writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
ap->last_ctl = tf->ctl;
ata_wait_idle(ap);
}
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
writeb(tf->hob_feature, (void *) ioaddr->feature_addr);
writeb(tf->hob_nsect, (void *) ioaddr->nsect_addr);
writeb(tf->hob_lbal, (void *) ioaddr->lbal_addr);
writeb(tf->hob_lbam, (void *) ioaddr->lbam_addr);
writeb(tf->hob_lbah, (void *) ioaddr->lbah_addr);
writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
tf->hob_feature,
tf->hob_nsect,
......@@ -162,11 +162,11 @@ void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
}
if (is_addr) {
writeb(tf->feature, (void *) ioaddr->feature_addr);
writeb(tf->nsect, (void *) ioaddr->nsect_addr);
writeb(tf->lbal, (void *) ioaddr->lbal_addr);
writeb(tf->lbam, (void *) ioaddr->lbam_addr);
writeb(tf->lbah, (void *) ioaddr->lbah_addr);
writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
tf->feature,
tf->nsect,
......@@ -176,7 +176,7 @@ void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
}
if (tf->flags & ATA_TFLAG_DEVICE) {
writeb(tf->device, (void *) ioaddr->device_addr);
writeb(tf->device, (void __iomem *) ioaddr->device_addr);
VPRINTK("device 0x%X\n", tf->device);
}
......@@ -220,7 +220,7 @@ void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
writeb(tf->command, (void *) ap->ioaddr.command_addr);
writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
ata_pause(ap);
}
......@@ -333,19 +333,19 @@ void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
tf->nsect = readb((void *)ioaddr->nsect_addr);
tf->lbal = readb((void *)ioaddr->lbal_addr);
tf->lbam = readb((void *)ioaddr->lbam_addr);
tf->lbah = readb((void *)ioaddr->lbah_addr);
tf->device = readb((void *)ioaddr->device_addr);
tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
tf->device = readb((void __iomem *)ioaddr->device_addr);
if (tf->flags & ATA_TFLAG_LBA48) {
writeb(tf->ctl | ATA_HOB, ap->ioaddr.ctl_addr);
tf->hob_feature = readb((void *)ioaddr->error_addr);
tf->hob_nsect = readb((void *)ioaddr->nsect_addr);
tf->hob_lbal = readb((void *)ioaddr->lbal_addr);
tf->hob_lbam = readb((void *)ioaddr->lbam_addr);
tf->hob_lbah = readb((void *)ioaddr->lbah_addr);
writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
}
}
......@@ -378,7 +378,7 @@ u8 ata_check_status_pio(struct ata_port *ap)
*/
u8 ata_check_status_mmio(struct ata_port *ap)
{
return readb((void *) ap->ioaddr.status_addr);
return readb((void __iomem *) ap->ioaddr.status_addr);
}
/**
......@@ -652,17 +652,17 @@ static unsigned int ata_mmio_devchk(struct ata_port *ap,
__ata_dev_select(ap, device);
writeb(0x55, (void *) ioaddr->nsect_addr);
writeb(0xaa, (void *) ioaddr->lbal_addr);
writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
writeb(0xaa, (void *) ioaddr->nsect_addr);
writeb(0x55, (void *) ioaddr->lbal_addr);
writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
writeb(0x55, (void *) ioaddr->nsect_addr);
writeb(0xaa, (void *) ioaddr->lbal_addr);
writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
nsect = readb((void *) ioaddr->nsect_addr);
lbal = readb((void *) ioaddr->lbal_addr);
nsect = readb((void __iomem *) ioaddr->nsect_addr);
lbal = readb((void __iomem *) ioaddr->lbal_addr);
if ((nsect == 0x55) && (lbal == 0xaa))
return 1; /* we found a device */
......@@ -841,7 +841,7 @@ static void __ata_dev_select (struct ata_port *ap, unsigned int device)
tmp = ATA_DEVICE_OBS | ATA_DEV1;
if (ap->flags & ATA_FLAG_MMIO) {
writeb(tmp, (void *) ap->ioaddr.device_addr);
writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
} else {
outb(tmp, ap->ioaddr.device_addr);
}
......@@ -1454,8 +1454,8 @@ static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
__ata_dev_select(ap, 1);
if (ap->flags & ATA_FLAG_MMIO) {
nsect = readb((void *) ioaddr->nsect_addr);
lbal = readb((void *) ioaddr->lbal_addr);
nsect = readb((void __iomem *) ioaddr->nsect_addr);
lbal = readb((void __iomem *) ioaddr->lbal_addr);
} else {
nsect = inb(ioaddr->nsect_addr);
lbal = inb(ioaddr->lbal_addr);
......@@ -1519,11 +1519,11 @@ static unsigned int ata_bus_softreset(struct ata_port *ap,
/* software reset. causes dev0 to be selected */
if (ap->flags & ATA_FLAG_MMIO) {
writeb(ap->ctl, ioaddr->ctl_addr);
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
udelay(20); /* FIXME: flush */
writeb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
udelay(20); /* FIXME: flush */
writeb(ap->ctl, ioaddr->ctl_addr);
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
} else {
outb(ap->ctl, ioaddr->ctl_addr);
udelay(10);
......@@ -1599,7 +1599,7 @@ void ata_bus_reset(struct ata_port *ap)
else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
/* set up device control */
if (ap->flags & ATA_FLAG_MMIO)
writeb(ap->ctl, ioaddr->ctl_addr);
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
else
outb(ap->ctl, ioaddr->ctl_addr);
rc = ata_bus_edd(ap);
......@@ -1632,7 +1632,7 @@ void ata_bus_reset(struct ata_port *ap)
if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
/* set up device control for ATA_FLAG_SATA_RESET */
if (ap->flags & ATA_FLAG_MMIO)
writeb(ap->ctl, ioaddr->ctl_addr);
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
else
outb(ap->ctl, ioaddr->ctl_addr);
}
......@@ -2081,7 +2081,7 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
unsigned int i;
unsigned int words = buflen >> 1;
u16 *buf16 = (u16 *) buf;
void *mmio = (void *)ap->ioaddr.data_addr;
void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
if (write_data) {
for (i = 0; i < words; i++)
......@@ -2618,7 +2618,7 @@ void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
struct ata_port *ap = qc->ap;
unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
u8 dmactl;
void *mmio = (void *) ap->ioaddr.bmdma_addr;
void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
/* load PRD table addr. */
mb(); /* make sure PRD table writes are visible to controller */
......@@ -2646,7 +2646,7 @@ void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
void *mmio = (void *) ap->ioaddr.bmdma_addr;
void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
u8 dmactl;
/* start host DMA transaction */
......
drivers/serial/8250_pci.c
View file @ db2ffb28
......@@ -83,7 +83,7 @@ struct pci_serial_quirk {
struct serial_private {
unsigned int nr;
void *remapped_bar[PCI_NUM_BAR_RESOURCES];
void __iomem *remapped_bar[PCI_NUM_BAR_RESOURCES];
struct pci_serial_quirk *quirk;
int line[0];
};
......@@ -243,7 +243,8 @@ static int __devinit pci_inteli960ni_init(struct pci_dev *dev)
*/
static int __devinit pci_plx9050_init(struct pci_dev *dev)
{
u8 *p, irq_config;
u8 irq_config;
void __iomem *p;
if ((pci_resource_flags(dev, 0) & IORESOURCE_MEM) == 0) {
moan_device("no memory in bar 0", dev);
......@@ -272,12 +273,12 @@ static int __devinit pci_plx9050_init(struct pci_dev *dev)
p = ioremap(pci_resource_start(dev, 0), 0x80);
if (p == NULL)
return -ENOMEM;
writel(irq_config, (unsigned long)p + 0x4c);
writel(irq_config, p + 0x4c);
/*
* Read the register back to ensure that it took effect.
*/
readl((unsigned long)p + 0x4c);
readl(p + 0x4c);
iounmap(p);
return 0;
......@@ -397,7 +398,8 @@ static void __devexit sbs_exit(struct pci_dev *dev)
static int pci_siig10x_init(struct pci_dev *dev)
{
u16 data, *p;
u16 data;
void __iomem *p;
switch (dev->device & 0xfff8) {
case PCI_DEVICE_ID_SIIG_1S_10x: /* 1S */
......@@ -415,8 +417,8 @@ static int pci_siig10x_init(struct pci_dev *dev)
if (p == NULL)
return -ENOMEM;
writew(readw((unsigned long) p + 0x28) & data, (unsigned long) p + 0x28);
readw((unsigned long)p + 0x28);
writew(readw(p + 0x28) & data, p + 0x28);
readw(p + 0x28);
iounmap(p);
return 0;
}
......
drivers/video/aty/radeon_base.c
View file @ db2ffb28
......@@ -282,7 +282,7 @@ static void __devexit radeon_unmap_ROM(struct radeonfb_info *rinfo, struct pci_d
static int __devinit radeon_map_ROM(struct radeonfb_info *rinfo, struct pci_dev *dev)
{
void *rom;
void __iomem *rom;
struct resource *r;
u16 dptr;
u8 rom_type;
......@@ -395,13 +395,13 @@ static int __devinit radeon_find_mem_vbios(struct radeonfb_info *rinfo)
* if we end up having conflicts
*/
u32 segstart;
unsigned char *rom_base = NULL;
void __iomem *rom_base = NULL;
for(segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
rom_base = (char *)ioremap(segstart, 0x10000);
rom_base = ioremap(segstart, 0x10000);
if (rom_base == NULL)
return -ENOMEM;
if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa))
if (readb(rom_base) == 0x55 && readb(rom_base + 1) == 0xaa)
break;
iounmap(rom_base);
rom_base = NULL;
......@@ -1719,10 +1719,10 @@ static ssize_t radeonfb_read(struct file *file, char __user *buf, size_t count,
count = rinfo->mapped_vram - p;
radeonfb_sync(info);
if (count) {
char *base_addr;
void __iomem *base_addr;
base_addr = info->screen_base;
count -= copy_to_user(buf, base_addr+p, count);
count -= copy_to_user(buf, base_addr+p, count); /* Ayee!! */
if (!count)
return -EFAULT;
*ppos += count;
......@@ -1751,10 +1751,10 @@ static ssize_t radeonfb_write(struct file *file, const char __user *buf, size_t
}
radeonfb_sync(info);
if (count) {
char *base_addr;
void __iomem *base_addr;
base_addr = info->screen_base;
count -= copy_from_user(base_addr+p, buf, count);
count -= copy_from_user(base_addr+p, buf, count); /* Ayee!! */
*ppos += count;
err = -EFAULT;
}
......@@ -1795,7 +1795,7 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
| FBINFO_HWACCEL_XPAN
| FBINFO_HWACCEL_YPAN;
info->fbops = &radeonfb_ops;
info->screen_base = (char *)rinfo->fb_base;
info->screen_base = rinfo->fb_base;
/* Fill fix common fields */
strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id));
......@@ -2117,7 +2117,7 @@ static int radeonfb_pci_register (struct pci_dev *pdev,
}
/* map the regions */
rinfo->mmio_base = (unsigned long) ioremap(rinfo->mmio_base_phys, RADEON_REGSIZE);
rinfo->mmio_base = ioremap(rinfo->mmio_base_phys, RADEON_REGSIZE);
if (!rinfo->mmio_base) {
printk(KERN_ERR "radeonfb: cannot map MMIO\n");
ret = -EIO;
......@@ -2228,8 +2228,8 @@ static int radeonfb_pci_register (struct pci_dev *pdev,
rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM, rinfo->video_ram);
do {
rinfo->fb_base = (unsigned long) ioremap (rinfo->fb_base_phys,
rinfo->mapped_vram);
rinfo->fb_base = ioremap (rinfo->fb_base_phys,
rinfo->mapped_vram);
} while ( rinfo->fb_base == 0 &&
((rinfo->mapped_vram /=2) >= MIN_MAPPED_VRAM) );
......@@ -2356,7 +2356,7 @@ static int radeonfb_pci_register (struct pci_dev *pdev,
return 0;
err_unmap_fb:
iounmap ((void*)rinfo->fb_base);
iounmap(rinfo->fb_base);
err_unmap_rom:
if (rinfo->mon1_EDID)
kfree(rinfo->mon1_EDID);
......@@ -2370,7 +2370,7 @@ static int radeonfb_pci_register (struct pci_dev *pdev,
#endif
if (rinfo->bios_seg)
radeon_unmap_ROM(rinfo, pdev);
iounmap ((void*)rinfo->mmio_base);
iounmap(rinfo->mmio_base);
err_release_pci:
pci_release_regions(pdev);
err_release_fb:
......@@ -2407,8 +2407,8 @@ static void __devexit radeonfb_pci_unregister (struct pci_dev *pdev)
unregister_framebuffer(info);
iounmap ((void*)rinfo->mmio_base);
iounmap ((void*)rinfo->fb_base);
iounmap(rinfo->mmio_base);
iounmap(rinfo->fb_base);
pci_release_regions(pdev);
......
drivers/video/aty/radeonfb.h
View file @ db2ffb28
......@@ -262,14 +262,14 @@ struct radeonfb_info {
unsigned long mmio_base_phys;
unsigned long fb_base_phys;
unsigned long mmio_base;
unsigned long fb_base;
void __iomem *mmio_base;
void __iomem *fb_base;
unsigned long fb_local_base;
unsigned long fb_local_base;
struct pci_dev *pdev;
u8 *bios_seg;
void __iomem *bios_seg;
int fp_bios_start;
u32 pseudo_palette[17];
......
include/acpi/acpiosxf.h
View file @ db2ffb28
......@@ -169,11 +169,11 @@ acpi_status
acpi_os_map_memory (
acpi_physical_address physical_address,
acpi_size size,
void **logical_address);
void __iomem **logical_address);
void
acpi_os_unmap_memory (
void *logical_address,
void __iomem *logical_address,
acpi_size size);
acpi_status
......
include/asm-generic/ide_iops.h
View file @ db2ffb28
......@@ -5,7 +5,7 @@
#define __ide_outsw outsw
#define __ide_outsl outsl
static __inline__ void __ide_mm_insw(unsigned long port, void *addr, u32 count)
static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
{
while (count--) {
*(u16 *)addr = readw(port);
......@@ -13,7 +13,7 @@ static __inline__ void __ide_mm_insw(unsigned long port, void *addr, u32 count)
}
}
static __inline__ void __ide_mm_insl(unsigned long port, void *addr, u32 count)
static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
{
while (count--) {
*(u32 *)addr = readl(port);
......@@ -21,7 +21,7 @@ static __inline__ void __ide_mm_insl(unsigned long port, void *addr, u32 count)
}
}
static __inline__ void __ide_mm_outsw(unsigned long port, void *addr, u32 count)
static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
{
while (count--) {
writew(*(u16 *)addr, port);
......@@ -29,7 +29,7 @@ static __inline__ void __ide_mm_outsw(unsigned long port, void *addr, u32 count)
}
}
static __inline__ void __ide_mm_outsl(unsigned long port, void *addr, u32 count)
static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
{
while (count--) {
writel(*(u32 *)addr, port);
......
include/asm-i386/io.h
View file @ db2ffb28
......@@ -2,6 +2,8 @@
#define _ASM_IO_H
#include <linux/config.h>
#include <linux/string.h>
#include <linux/compiler.h>
/*
* This file contains the definitions for the x86 IO instructions
......@@ -86,7 +88,7 @@ static inline void * phys_to_virt(unsigned long address)
*/
#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
/**
* ioremap - map bus memory into CPU space
......@@ -100,13 +102,13 @@ extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long
* address.
*/
static inline void * ioremap (unsigned long offset, unsigned long size)
static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
{
return __ioremap(offset, size, 0);
}
extern void * ioremap_nocache (unsigned long offset, unsigned long size);
extern void iounmap(void *addr);
extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
extern void iounmap(volatile void __iomem *addr);
/*
* bt_ioremap() and bt_iounmap() are for temporary early boot-time
......@@ -139,9 +141,18 @@ extern void bt_iounmap(void *addr, unsigned long size);
* memory location directly.
*/
#define readb(addr) (*(volatile unsigned char *) (addr))
#define readw(addr) (*(volatile unsigned short *) (addr))
#define readl(addr) (*(volatile unsigned int *) (addr))
static inline unsigned char readb(const volatile void __iomem *addr)
{
return *(volatile unsigned char __force *) addr;
}
static inline unsigned short readw(const volatile void __iomem *addr)
{
return *(volatile unsigned short __force *) addr;
}
static inline unsigned int readl(const volatile void __iomem *addr)
{
return *(volatile unsigned int __force *) addr;
}
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
......@@ -149,16 +160,34 @@ extern void bt_iounmap(void *addr, unsigned long size);
#define __raw_readw readw
#define __raw_readl readl
#define writeb(b,addr) (*(volatile unsigned char *) (addr) = (b))
#define writew(b,addr) (*(volatile unsigned short *) (addr) = (b))
#define writel(b,addr) (*(volatile unsigned int *) (addr) = (b))
static inline void writeb(unsigned char b, volatile void __iomem *addr)
{
*(volatile unsigned char __force *) addr = b;
}
static inline void writew(unsigned short b, volatile void __iomem *addr)
{
*(volatile unsigned short __force *) addr = b;
}
static inline void writel(unsigned int b, volatile void __iomem *addr)
{
*(volatile unsigned int __force *) addr = b;
}
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel
#define memset_io(a,b,c) memset((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) __memcpy((a),(void *)(b),(c))
#define memcpy_toio(a,b,c) __memcpy((void *)(a),(b),(c))
static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
{
memset((void __force *) addr, val, count);
}
static inline void memcpy_fromio(void *dst, volatile void __iomem *src, int count)
{
__memcpy(dst, (void __force *) src, count);
}
static inline void memcpy_toio(volatile void __iomem *dst, void *src, int count)
{
__memcpy((void __force *) dst, src, count);
}
/*
* ISA space is 'always mapped' on a typical x86 system, no need to
......@@ -168,7 +197,7 @@ extern void bt_iounmap(void *addr, unsigned long size);
* used as the IO-area pointer (it can be iounmapped as well, so the
* analogy with PCI is quite large):
*/
#define __ISA_IO_base ((char *)(PAGE_OFFSET))
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
#define isa_readb(a) readb(__ISA_IO_base + (a))
#define isa_readw(a) readw(__ISA_IO_base + (a))
......@@ -185,8 +214,8 @@ extern void bt_iounmap(void *addr, unsigned long size);
* Again, i386 does not require mem IO specific function.
*/
#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d))
#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(__ISA_IO_base + (b)),(c),(d))
#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d))
/**
* check_signature - find BIOS signatures
......@@ -199,7 +228,7 @@ extern void bt_iounmap(void *addr, unsigned long size);
* Returns 1 on a match.
*/
static inline int check_signature(unsigned long io_addr,
static inline int check_signature(volatile void __iomem * io_addr,
const unsigned char *signature, int length)
{
int retval = 0;
......
include/asm-ppc64/eeh.h
View file @ db2ffb28
......@@ -31,7 +31,7 @@ struct device_node;
* never actually mapped. Translation between IO <-> EEH region is 1 to 1.
*/
#define IO_TOKEN_TO_ADDR(token) \
(((unsigned long)(token) & ~(0xfUL << REGION_SHIFT)) | \
(((unsigned long __force)(token) & ~(0xfUL << REGION_SHIFT)) | \
(IO_REGION_ID << REGION_SHIFT))
#define IO_ADDR_TO_TOKEN(addr) \
......@@ -43,9 +43,9 @@ struct device_node;
#define EEH_MODE_NOCHECK (1<<1)
extern void __init eeh_init(void);
unsigned long eeh_check_failure(void *token, unsigned long val);
unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val);
int eeh_dn_check_failure (struct device_node *dn, struct pci_dev *dev);
void *eeh_ioremap(unsigned long addr, void *vaddr);
void __iomem *eeh_ioremap(unsigned long addr, void __iomem *vaddr);
void __init pci_addr_cache_build(void);
/**
......@@ -108,83 +108,83 @@ int eeh_set_option(struct pci_dev *dev, int options);
/*
* MMIO read/write operations with EEH support.
*/
static inline u8 eeh_readb(void *addr) {
static inline u8 eeh_readb(const volatile void __iomem *addr) {
volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
u8 val = in_8(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u8))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_writeb(u8 val, void *addr) {
static inline void eeh_writeb(u8 val, volatile void __iomem *addr) {
volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
out_8(vaddr, val);
}
static inline u16 eeh_readw(void *addr) {
static inline u16 eeh_readw(const volatile void __iomem *addr) {
volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
u16 val = in_le16(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_writew(u16 val, void *addr) {
static inline void eeh_writew(u16 val, volatile void __iomem *addr) {
volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
out_le16(vaddr, val);
}
static inline u16 eeh_raw_readw(void *addr) {
static inline u16 eeh_raw_readw(const volatile void __iomem *addr) {
volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
u16 val = in_be16(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_raw_writew(u16 val, void *addr) {
static inline void eeh_raw_writew(u16 val, volatile void __iomem *addr) {
volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
out_be16(vaddr, val);
}
static inline u32 eeh_readl(void *addr) {
static inline u32 eeh_readl(const volatile void __iomem *addr) {
volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
u32 val = in_le32(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_writel(u32 val, void *addr) {
static inline void eeh_writel(u32 val, volatile void __iomem *addr) {
volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
out_le32(vaddr, val);
}
static inline u32 eeh_raw_readl(void *addr) {
static inline u32 eeh_raw_readl(const volatile void __iomem *addr) {
volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
u32 val = in_be32(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_raw_writel(u32 val, void *addr) {
static inline void eeh_raw_writel(u32 val, volatile void __iomem *addr) {
volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
out_be32(vaddr, val);
}
static inline u64 eeh_readq(void *addr) {
static inline u64 eeh_readq(const volatile void __iomem *addr) {
volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
u64 val = in_le64(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u64))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_writeq(u64 val, void *addr) {
static inline void eeh_writeq(u64 val, volatile void __iomem *addr) {
volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
out_le64(vaddr, val);
}
static inline u64 eeh_raw_readq(void *addr) {
static inline u64 eeh_raw_readq(const volatile void __iomem *addr) {
volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
u64 val = in_be64(vaddr);
if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u64))
return eeh_check_failure(addr, val);
return val;
}
static inline void eeh_raw_writeq(u64 val, void *addr) {
static inline void eeh_raw_writeq(u64 val, volatile void __iomem *addr) {
volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
out_be64(vaddr, val);
}
......@@ -192,7 +192,7 @@ static inline void eeh_raw_writeq(u64 val, void *addr) {
#define EEH_CHECK_ALIGN(v,a) \
((((unsigned long)(v)) & ((a) - 1)) == 0)
static inline void eeh_memset_io(void *addr, int c, unsigned long n) {
static inline void eeh_memset_io(volatile void __iomem *addr, int c, unsigned long n) {
void *vaddr = (void *)IO_TOKEN_TO_ADDR(addr);
u32 lc = c;
lc |= lc << 8;
......@@ -215,9 +215,10 @@ static inline void eeh_memset_io(void *addr, int c, unsigned long n) {
}
__asm__ __volatile__ ("sync" : : : "memory");
}
static inline void eeh_memcpy_fromio(void *dest, void *src, unsigned long n) {
static inline void eeh_memcpy_fromio(void *dest, const volatile void __iomem *src, unsigned long n) {
void *vsrc = (void *)IO_TOKEN_TO_ADDR(src);
void *vsrcsave = vsrc, *destsave = dest, *srcsave = src;
void *vsrcsave = vsrc, *destsave = dest;
const volatile void __iomem *srcsave = src;
unsigned long nsave = n;
while(n && (!EEH_CHECK_ALIGN(vsrc, 4) || !EEH_CHECK_ALIGN(dest, 4))) {
......@@ -253,7 +254,7 @@ static inline void eeh_memcpy_fromio(void *dest, void *src, unsigned long n) {
}
}
static inline void eeh_memcpy_toio(void *dest, const void *src, unsigned long n) {
static inline void eeh_memcpy_toio(volatile void __iomem *dest, const void *src, unsigned long n) {
void *vdest = (void *)IO_TOKEN_TO_ADDR(dest);
while(n && (!EEH_CHECK_ALIGN(vdest, 4) || !EEH_CHECK_ALIGN(src, 4))) {
......@@ -289,7 +290,7 @@ static inline u8 eeh_inb(unsigned long port) {
return ~0;
val = in_8((u8 *)(port+pci_io_base));
if (EEH_POSSIBLE_IO_ERROR(val, u8))
return eeh_check_failure((void*)(port), val);
return eeh_check_failure((void __iomem *)(port), val);
return val;
}
......@@ -304,7 +305,7 @@ static inline u16 eeh_inw(unsigned long port) {
return ~0;
val = in_le16((u16 *)(port+pci_io_base));
if (EEH_POSSIBLE_IO_ERROR(val, u16))
return eeh_check_failure((void*)(port), val);
return eeh_check_failure((void __iomem *)(port), val);
return val;
}
......@@ -319,7 +320,7 @@ static inline u32 eeh_inl(unsigned long port) {
return ~0;
val = in_le32((u32 *)(port+pci_io_base));
if (EEH_POSSIBLE_IO_ERROR(val, u32))
return eeh_check_failure((void*)(port), val);
return eeh_check_failure((void __iomem *)(port), val);
return val;
}
......@@ -332,19 +333,19 @@ static inline void eeh_outl(u32 val, unsigned long port) {
static inline void eeh_insb(unsigned long port, void * buf, int ns) {
_insb((u8 *)(port+pci_io_base), buf, ns);
if (EEH_POSSIBLE_IO_ERROR((*(((u8*)buf)+ns-1)), u8))
eeh_check_failure((void*)(port), *(u8*)buf);
eeh_check_failure((void __iomem *)(port), *(u8*)buf);
}
static inline void eeh_insw_ns(unsigned long port, void * buf, int ns) {
_insw_ns((u16 *)(port+pci_io_base), buf, ns);
if (EEH_POSSIBLE_IO_ERROR((*(((u16*)buf)+ns-1)), u16))
eeh_check_failure((void*)(port), *(u16*)buf);
eeh_check_failure((void __iomem *)(port), *(u16*)buf);
}
static inline void eeh_insl_ns(unsigned long port, void * buf, int nl) {
_insl_ns((u32 *)(port+pci_io_base), buf, nl);
if (EEH_POSSIBLE_IO_ERROR((*(((u32*)buf)+nl-1)), u32))
eeh_check_failure((void*)(port), *(u32*)buf);
eeh_check_failure((void __iomem *)(port), *(u32*)buf);
}
#endif /* _PPC64_EEH_H */
include/asm-ppc64/iSeries/iSeries_io.h
View file @ db2ffb28
......@@ -31,16 +31,16 @@
/* Created December 28, 2000 */
/* End Change Activity */
/************************************************************************/
extern u8 iSeries_Read_Byte(void* IoAddress);
extern u16 iSeries_Read_Word(void* IoAddress);
extern u32 iSeries_Read_Long(void* IoAddress);
extern void iSeries_Write_Byte(u8 IoData,void* IoAddress);
extern void iSeries_Write_Word(u16 IoData,void* IoAddress);
extern void iSeries_Write_Long(u32 IoData,void* IoAddress);
extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
extern void iSeries_Write_Byte(u8 IoData, volatile void __iomem * IoAddress);
extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress);
extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
extern void* iSeries_memset_io(void *dest, char x, size_t n);
extern void* iSeries_memcpy_toio(void *dest, void *source, size_t n);
extern void* iSeries_memcpy_fromio(void *dest, void *source, size_t n);
extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, size_t n);
extern void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *source, size_t n);
#endif /* CONFIG_PPC_ISERIES */
#endif /* _ISERIES_IO_H */
include/asm-ppc64/io.h
View file @ db2ffb28
......@@ -9,6 +9,7 @@
*/
#include <linux/config.h>
#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/byteorder.h>
#ifdef CONFIG_PPC_ISERIES
......@@ -41,21 +42,22 @@ extern unsigned long pci_io_base;
#define __raw_writew(v, addr) { BUG(); 0; }
#define __raw_writel(v, addr) { BUG(); 0; }
#define __raw_writeq(v, addr) { BUG(); 0; }
#define readb(addr) iSeries_Read_Byte((void*)(addr))
#define readw(addr) iSeries_Read_Word((void*)(addr))
#define readl(addr) iSeries_Read_Long((void*)(addr))
#define writeb(data, addr) iSeries_Write_Byte(data,((void*)(addr)))
#define writew(data, addr) iSeries_Write_Word(data,((void*)(addr)))
#define writel(data, addr) iSeries_Write_Long(data,((void*)(addr)))
#define memset_io(a,b,c) iSeries_memset_io((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((void *)(a), (void *)(b), (c))
#define memcpy_toio(a,b,c) iSeries_memcpy_toio((void *)(a), (void *)(b), (c))
#define inb(addr) readb(((unsigned long)(addr)))
#define inw(addr) readw(((unsigned long)(addr)))
#define inl(addr) readl(((unsigned long)(addr)))
#define outb(data,addr) writeb(data,((unsigned long)(addr)))
#define outw(data,addr) writew(data,((unsigned long)(addr)))
#define outl(data,addr) writel(data,((unsigned long)(addr)))
#define readb(addr) iSeries_Read_Byte(addr)
#define readw(addr) iSeries_Read_Word(addr)
#define readl(addr) iSeries_Read_Long(addr)
#define writeb(data, addr) iSeries_Write_Byte((data),(addr))
#define writew(data, addr) iSeries_Write_Word((data),(addr))
#define writel(data, addr) iSeries_Write_Long((data),(addr))
#define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
#define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
#define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
#define inb(addr) readb(((void __iomem *)(long)(addr)))
#define inw(addr) readw(((void __iomem *)(long)(addr)))
#define inl(addr) readl(((void __iomem *)(long)(addr)))
#define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
#define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
#define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
/*
* The *_ns versions below don't do byte-swapping.
* Neither do the standard versions now, these are just here
......@@ -64,25 +66,50 @@ extern unsigned long pci_io_base;
#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
#else
#define __raw_readb(addr) (*(volatile unsigned char *)(addr))
#define __raw_readw(addr) (*(volatile unsigned short *)(addr))
#define __raw_readl(addr) (*(volatile unsigned int *)(addr))
#define __raw_readq(addr) (*(volatile unsigned long *)(addr))
#define __raw_writeb(v, addr) (*(volatile unsigned char *)(addr) = (v))
#define __raw_writew(v, addr) (*(volatile unsigned short *)(addr) = (v))
#define __raw_writel(v, addr) (*(volatile unsigned int *)(addr) = (v))
#define __raw_writeq(v, addr) (*(volatile unsigned long *)(addr) = (v))
#define readb(addr) eeh_readb((void*)(addr))
#define readw(addr) eeh_readw((void*)(addr))
#define readl(addr) eeh_readl((void*)(addr))
#define readq(addr) eeh_readq((void*)(addr))
#define writeb(data, addr) eeh_writeb((data), ((void*)(addr)))
#define writew(data, addr) eeh_writew((data), ((void*)(addr)))
#define writel(data, addr) eeh_writel((data), ((void*)(addr)))
#define writeq(data, addr) eeh_writeq((data), ((void*)(addr)))
#define memset_io(a,b,c) eeh_memset_io((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(void *)(b),(c))
#define memcpy_toio(a,b,c) eeh_memcpy_toio((void *)(a),(b),(c))
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
return *(unsigned char __force *)addr;
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
return *(unsigned short __force *)addr;
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
return *(unsigned int __force *)addr;
}
static inline unsigned long __raw_readq(const volatile void __iomem *addr)
{
return *(unsigned long __force *)addr;
}
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
*(unsigned char __force *)addr = v;
}
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
*(unsigned short __force *)addr = v;
}
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
*(unsigned int __force *)addr = v;
}
static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
{
*(unsigned long __force *)addr = v;
}
#define readb(addr) eeh_readb(addr)
#define readw(addr) eeh_readw(addr)
#define readl(addr) eeh_readl(addr)
#define readq(addr) eeh_readq(addr)
#define writeb(data, addr) eeh_writeb((data), (addr))
#define writew(data, addr) eeh_writew((data), (addr))
#define writel(data, addr) eeh_writel((data), (addr))
#define writeq(data, addr) eeh_writeq((data), (addr))
#define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
#define inb(port) eeh_inb((unsigned long)port)
#define outb(val, port) eeh_outb(val, (unsigned long)port)
#define inw(port) eeh_inw((unsigned long)port)
......@@ -149,7 +176,7 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
#ifdef __KERNEL__
extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
unsigned long size, unsigned long flags);
extern void *__ioremap(unsigned long address, unsigned long size,
extern void __iomem *__ioremap(unsigned long address, unsigned long size,
unsigned long flags);
/**
......@@ -163,11 +190,11 @@ extern void *__ioremap(unsigned long address, unsigned long size,
* address is not guaranteed to be usable directly as a virtual
* address.
*/
extern void *ioremap(unsigned long address, unsigned long size);
extern void __iomem *ioremap(unsigned long address, unsigned long size);
#define ioremap_nocache(addr, size) ioremap((addr), (size))
extern int iounmap_explicit(void *addr, unsigned long size);
extern void iounmap(void *addr);
extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
extern void iounmap(volatile void __iomem *addr);
extern void * reserve_phb_iospace(unsigned long size);
/**
......@@ -377,7 +404,7 @@ static inline void out_be64(volatile unsigned long *addr, unsigned long val)
* address should have been obtained by ioremap.
* Returns 1 on a match.
*/
static inline int check_signature(unsigned long io_addr,
static inline int check_signature(const volatile void __iomem * io_addr,
const unsigned char *signature, int length)
{
int retval = 0;
......
include/linux/compiler.h
View file @ db2ffb28
......@@ -6,13 +6,17 @@
# define __kernel /* default address space */
# define __safe __attribute__((safe))
# define __force __attribute__((force))
# define __iomem __attribute__((noderef, address_space(2)))
extern void __chk_user_ptr(void __user *);
extern void __chk_io_ptr(void __iomem *);
#else
# define __user
# define __kernel
# define __safe
# define __force
# define __iomem
# define __chk_user_ptr(x) (void)0
# define __chk_io_ptr(x) (void)0
#endif
#ifdef __KERNEL__
......
include/linux/fb.h
View file @ db2ffb28
......@@ -602,7 +602,7 @@ struct fb_info {
struct fb_pixmap sprite; /* Cursor hardware mapper */
struct fb_cmap cmap; /* Current cmap */
struct fb_ops *fbops;
char *screen_base; /* Virtual address */
char __iomem *screen_base; /* Virtual address */
int currcon; /* Current VC. */
void *pseudo_palette; /* Fake palette of 16 colors */
#define FBINFO_STATE_RUNNING 0
......
include/linux/libata.h
View file @ db2ffb28
......@@ -196,7 +196,7 @@ struct ata_probe_ent {
unsigned long irq;
unsigned int irq_flags;
unsigned long host_flags;
void *mmio_base;
void __iomem *mmio_base;
void *private_data;
};
......@@ -204,7 +204,7 @@ struct ata_host_set {
spinlock_t lock;
struct pci_dev *pdev;
unsigned long irq;
void *mmio_base;
void __iomem *mmio_base;
unsigned int n_ports;
void *private_data;
struct ata_port_operations *ops;
......@@ -428,7 +428,7 @@ static inline unsigned int ata_dev_present(struct ata_device *dev)
static inline u8 ata_chk_err(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO) {
return readb((void *) ap->ioaddr.error_addr);
return readb((void __iomem *) ap->ioaddr.error_addr);
}
return inb(ap->ioaddr.error_addr);
}
......@@ -441,7 +441,7 @@ static inline u8 ata_chk_status(struct ata_port *ap)
static inline u8 ata_altstatus(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO)
return readb(ap->ioaddr.altstatus_addr);
return readb((void __iomem *)ap->ioaddr.altstatus_addr);
return inb(ap->ioaddr.altstatus_addr);
}
......@@ -512,7 +512,7 @@ static inline u8 ata_irq_on(struct ata_port *ap)
ap->last_ctl = ap->ctl;
if (ap->flags & ATA_FLAG_MMIO)
writeb(ap->ctl, ioaddr->ctl_addr);
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
else
outb(ap->ctl, ioaddr->ctl_addr);
tmp = ata_wait_idle(ap);
......@@ -533,7 +533,7 @@ static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
/* get controller status; clear intr, err bits */
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
host_stat = readb(mmio + ATA_DMA_STATUS);
writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
mmio + ATA_DMA_STATUS);
......@@ -571,7 +571,7 @@ static inline unsigned int sata_dev_present(struct ata_port *ap)
static inline void ata_bmdma_stop(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
/* clear start/stop bit */
writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
......@@ -589,7 +589,7 @@ static inline void ata_bmdma_stop(struct ata_port *ap)
static inline void ata_bmdma_ack_irq(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = ((void *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
writeb(readb(mmio), mmio);
} else {
unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
......@@ -601,7 +601,7 @@ static inline u8 ata_bmdma_status(struct ata_port *ap)
{
u8 host_stat;
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
host_stat = readb(mmio + ATA_DMA_STATUS);
} else
host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
......
sound/pci/intel8x0.c
View file @ db2ffb28
......@@ -406,10 +406,10 @@ struct _snd_intel8x0 {
unsigned int mmio;
unsigned long addr;
unsigned long remap_addr;
void __iomem * remap_addr;
unsigned int bm_mmio;
unsigned long bmaddr;
unsigned long remap_bmaddr;
void __iomem * remap_bmaddr;
struct pci_dev *pci;
snd_card_t *card;
......@@ -2227,9 +2227,9 @@ static int snd_intel8x0_free(intel8x0_t *chip)
snd_dma_free_pages(&chip->bdbars);
}
if (chip->remap_addr)
iounmap((void *) chip->remap_addr);
iounmap(chip->remap_addr);
if (chip->remap_bmaddr)
iounmap((void *) chip->remap_bmaddr);
iounmap(chip->remap_bmaddr);
pci_release_regions(chip->pci);
kfree(chip);
return 0;
......@@ -2502,9 +2502,8 @@ static int __devinit snd_intel8x0_create(snd_card_t * card,
if (pci_resource_flags(pci, 2) & IORESOURCE_MEM) { /* ICH4 and Nforce */
chip->mmio = 1;
chip->addr = pci_resource_start(pci, 2);
chip->remap_addr = (unsigned long) ioremap_nocache(chip->addr,
pci_resource_len(pci, 2));
if (chip->remap_addr == 0) {
chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 2));
if (!chip->remap_addr) {
snd_printk("AC'97 space ioremap problem\n");
snd_intel8x0_free(chip);
return -EIO;
......@@ -2515,9 +2514,8 @@ static int __devinit snd_intel8x0_create(snd_card_t * card,
if (pci_resource_flags(pci, 3) & IORESOURCE_MEM) { /* ICH4 */
chip->bm_mmio = 1;
chip->bmaddr = pci_resource_start(pci, 3);
chip->remap_bmaddr = (unsigned long) ioremap_nocache(chip->bmaddr,
pci_resource_len(pci, 3));
if (chip->remap_bmaddr == 0) {
chip->remap_bmaddr = ioremap_nocache(chip->bmaddr, pci_resource_len(pci, 3));
if (!chip->remap_bmaddr) {
snd_printk("Controller space ioremap problem\n");
snd_intel8x0_free(chip);
return -EIO;
......
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