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Commit db7bc1ba authored by Gregory CLEMENT's avatar Gregory CLEMENT
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arm64: dts: marvell: use new binding for the system controller on cp110 

The new binding for the system controller on cp110 moved the clock
controller into a subnode. This preliminary step will allow to add gpio
and pinctrl subnodes.
Reviewed-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 8dcd4ab0
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Showing with 45 additions and 39 deletions
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
View file @ db7bc1ba
......@@ -62,7 +62,7 @@ config-space@f2000000 {
cpm_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
status = "disabled";
dma-coherent;
......@@ -94,7 +94,7 @@ cpm_mdio: mdio@12a200 {
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0x12a200 0x10>;
clocks = <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>;
status = "disabled";
};
......@@ -107,10 +107,13 @@ cpm_xmdio: mdio@12a600 {
};
cpm_syscon0: system-controller@440000 {
compatible = "marvell,cp110-system-controller0",
"syscon";
compatible = "syscon", "simple-mfd";
reg = <0x440000 0x1000>;
#clock-cells = <2>;
cpm_clk: clock {
compatible = "marvell,cp110-clock";
#clock-cells = <2>;
};
};
cpm_rtc: rtc@284000 {
......@@ -125,7 +128,7 @@ cpm_sata0: sata@540000 {
"generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 15>;
clocks = <&cpm_clk 1 15>;
status = "disabled";
};
......@@ -135,7 +138,7 @@ cpm_usb3_0: usb3@500000 {
reg = <0x500000 0x4000>;
dma-coherent;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 22>;
clocks = <&cpm_clk 1 22>;
status = "disabled";
};
......@@ -145,7 +148,7 @@ cpm_usb3_1: usb3@510000 {
reg = <0x510000 0x4000>;
dma-coherent;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 23>;
clocks = <&cpm_clk 1 23>;
status = "disabled";
};
......@@ -155,7 +158,7 @@ cpm_xor0: xor@6a0000 {
<0x6b0000 0x1000>;
dma-coherent;
msi-parent = <&gic_v2m0>;
clocks = <&cpm_syscon0 1 8>;
clocks = <&cpm_clk 1 8>;
};
cpm_xor1: xor@6c0000 {
......@@ -164,7 +167,7 @@ cpm_xor1: xor@6c0000 {
<0x6d0000 0x1000>;
dma-coherent;
msi-parent = <&gic_v2m0>;
clocks = <&cpm_syscon0 1 7>;
clocks = <&cpm_clk 1 7>;
};
cpm_spi0: spi@700600 {
......@@ -173,7 +176,7 @@ cpm_spi0: spi@700600 {
#address-cells = <0x1>;
#size-cells = <0x0>;
cell-index = <1>;
clocks = <&cpm_syscon0 1 21>;
clocks = <&cpm_clk 1 21>;
status = "disabled";
};
......@@ -183,7 +186,7 @@ cpm_spi1: spi@700680 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <2>;
clocks = <&cpm_syscon0 1 21>;
clocks = <&cpm_clk 1 21>;
status = "disabled";
};
......@@ -193,7 +196,7 @@ cpm_i2c0: i2c@701000 {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 21>;
clocks = <&cpm_clk 1 21>;
status = "disabled";
};
......@@ -203,7 +206,7 @@ cpm_i2c1: i2c@701100 {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 21>;
clocks = <&cpm_clk 1 21>;
status = "disabled";
};
......@@ -211,7 +214,7 @@ cpm_trng: trng@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 25>;
clocks = <&cpm_clk 1 25>;
status = "okay";
};
......@@ -220,7 +223,7 @@ cpm_sdhci0: sdhci@780000 {
reg = <0x780000 0x300>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "core";
clocks = <&cpm_syscon0 1 4>;
clocks = <&cpm_clk 1 4>;
dma-coherent;
status = "disabled";
};
......@@ -237,7 +240,7 @@ cpm_crypto: crypto@800000 {
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mem", "ring0", "ring1",
"ring2", "ring3", "eip";
clocks = <&cpm_syscon0 1 26>;
clocks = <&cpm_clk 1 26>;
dma-mask = <0xff 0xffffffff>;
};
};
......@@ -264,7 +267,7 @@ cpm_pcie0: pcie@f2600000 {
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cpm_syscon0 1 13>;
clocks = <&cpm_clk 1 13>;
status = "disabled";
};
......@@ -291,7 +294,7 @@ cpm_pcie1: pcie@f2620000 {
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cpm_syscon0 1 11>;
clocks = <&cpm_clk 1 11>;
status = "disabled";
};
......@@ -318,7 +321,7 @@ cpm_pcie2: pcie@f2640000 {
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cpm_syscon0 1 12>;
clocks = <&cpm_clk 1 12>;
status = "disabled";
};
};
......
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
View file @ db7bc1ba
......@@ -69,7 +69,7 @@ cps_rtc: rtc@284000 {
cps_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
clocks = <&cps_clk 1 3>, <&cps_clk 1 9>, <&cps_clk 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
status = "disabled";
dma-coherent;
......@@ -101,7 +101,7 @@ cps_mdio: mdio@12a200 {
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0x12a200 0x10>;
clocks = <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
clocks = <&cps_clk 1 9>, <&cps_clk 1 5>;
status = "disabled";
};
......@@ -114,10 +114,13 @@ cps_xmdio: mdio@12a600 {
};
cps_syscon0: system-controller@440000 {
compatible = "marvell,cp110-system-controller0",
"syscon";
compatible = "syscon", "simple-mfd";
reg = <0x440000 0x1000>;
#clock-cells = <2>;
cps_clk: clock {
compatible = "marvell,cp110-clock";
#clock-cells = <2>;
};
};
cps_sata0: sata@540000 {
......@@ -125,7 +128,7 @@ cps_sata0: sata@540000 {
"generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 15>;
clocks = <&cps_clk 1 15>;
status = "disabled";
};
......@@ -135,7 +138,7 @@ cps_usb3_0: usb3@500000 {
reg = <0x500000 0x4000>;
dma-coherent;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 22>;
clocks = <&cps_clk 1 22>;
status = "disabled";
};
......@@ -145,7 +148,7 @@ cps_usb3_1: usb3@510000 {
reg = <0x510000 0x4000>;
dma-coherent;
interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 23>;
clocks = <&cps_clk 1 23>;
status = "disabled";
};
......@@ -155,7 +158,7 @@ cps_xor0: xor@6a0000 {
<0x6b0000 0x1000>;
dma-coherent;
msi-parent = <&gic_v2m0>;
clocks = <&cps_syscon0 1 8>;
clocks = <&cps_clk 1 8>;
};
cps_xor1: xor@6c0000 {
......@@ -164,7 +167,7 @@ cps_xor1: xor@6c0000 {
<0x6d0000 0x1000>;
dma-coherent;
msi-parent = <&gic_v2m0>;
clocks = <&cps_syscon0 1 7>;
clocks = <&cps_clk 1 7>;
};
cps_spi0: spi@700600 {
......@@ -173,7 +176,7 @@ cps_spi0: spi@700600 {
#address-cells = <0x1>;
#size-cells = <0x0>;
cell-index = <3>;
clocks = <&cps_syscon0 1 21>;
clocks = <&cps_clk 1 21>;
status = "disabled";
};
......@@ -183,7 +186,7 @@ cps_spi1: spi@700680 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <4>;
clocks = <&cps_syscon0 1 21>;
clocks = <&cps_clk 1 21>;
status = "disabled";
};
......@@ -193,7 +196,7 @@ cps_i2c0: i2c@701000 {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 21>;
clocks = <&cps_clk 1 21>;
status = "disabled";
};
......@@ -203,7 +206,7 @@ cps_i2c1: i2c@701100 {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 21>;
clocks = <&cps_clk 1 21>;
status = "disabled";
};
......@@ -211,7 +214,7 @@ cps_trng: trng@760000 {
compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
reg = <0x760000 0x7d>;
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 25>;
clocks = <&cps_clk 1 25>;
status = "okay";
};
......@@ -227,7 +230,7 @@ cps_crypto: crypto@800000 {
<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mem", "ring0", "ring1",
"ring2", "ring3", "eip";
clocks = <&cps_syscon0 1 26>;
clocks = <&cps_clk 1 26>;
dma-mask = <0xff 0xffffffff>;
/*
* The cryptographic engine found on the cp110
......@@ -262,7 +265,7 @@ cps_pcie0: pcie@f4600000 {
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cps_syscon0 1 13>;
clocks = <&cps_clk 1 13>;
status = "disabled";
};
......@@ -289,7 +292,7 @@ cps_pcie1: pcie@f4620000 {
interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cps_syscon0 1 11>;
clocks = <&cps_clk 1 11>;
status = "disabled";
};
......@@ -316,7 +319,7 @@ cps_pcie2: pcie@f4640000 {
interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cps_syscon0 1 12>;
clocks = <&cps_clk 1 12>;
status = "disabled";
};
};
......
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