Commit dbe8ecd8 authored by David S. Miller's avatar David S. Miller

Merge branch 'b44'

Hauke Mehrtens says:

====================
b44: add support for external PHY

This adds support for an external phy connected to the mac controlled
by b44. This is used on home routers of the BCM47xx line where this MAC
core was used and is contended to an external switch core through MII.
These patches are in OpenWrt for some time and are tested by different
users with different devices.

The publicly available Programmer's Reference Guide for some of these
chips help making this patch it would be nice to have such a
documentation for more Broadcom Chips like some SoCs.
https://www.broadcom.com/collateral/pg/440X-PG02-R.pdf
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parents a181ceb5 b04138b3
......@@ -28,6 +28,9 @@
#include <linux/export.h>
#include <linux/types.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_embedded.h>
#include <linux/bcma/bcma_soc.h>
......@@ -225,6 +228,12 @@ void __init plat_mem_setup(void)
bcm47xx_board_detect();
}
static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = {
.link = 1,
.speed = SPEED_100,
.duplex = DUPLEX_FULL,
};
static int __init bcm47xx_register_bus_complete(void)
{
switch (bcm47xx_bus_type) {
......@@ -239,6 +248,7 @@ static int __init bcm47xx_register_bus_complete(void)
break;
#endif
}
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
return 0;
}
device_initcall(bcm47xx_register_bus_complete);
......@@ -23,6 +23,7 @@ config B44
depends on SSB_POSSIBLE && HAS_DMA
select SSB
select MII
select PHYLIB
---help---
If you have a network (Ethernet) controller of this type, say Y
or M and read the Ethernet-HOWTO, available from
......
This diff is collapsed.
......@@ -280,9 +280,10 @@ struct ring_info {
dma_addr_t mapping;
};
#define B44_MCAST_TABLE_SIZE 32
#define B44_PHY_ADDR_NO_PHY 30
#define B44_MDC_RATIO 5000000
#define B44_MCAST_TABLE_SIZE 32
#define B44_PHY_ADDR_NO_LOCAL_PHY 30 /* no local phy regs */
#define B44_PHY_ADDR_NO_PHY 31 /* no phy present at all */
#define B44_MDC_RATIO 5000000
#define B44_STAT_REG_DECLARE \
_B44(tx_good_octets) \
......@@ -344,6 +345,9 @@ B44_STAT_REG_DECLARE
struct u64_stats_sync syncp;
};
#define B44_BOARDFLAG_ROBO 0x0010 /* Board has robo switch */
#define B44_BOARDFLAG_ADM 0x0080 /* Board has ADMtek switch */
struct ssb_device;
struct b44 {
......@@ -376,7 +380,7 @@ struct b44 {
#define B44_FLAG_ADV_10FULL 0x02000000
#define B44_FLAG_ADV_100HALF 0x04000000
#define B44_FLAG_ADV_100FULL 0x08000000
#define B44_FLAG_INTERNAL_PHY 0x10000000
#define B44_FLAG_EXTERNAL_PHY 0x10000000
#define B44_FLAG_RX_RING_HACK 0x20000000
#define B44_FLAG_TX_RING_HACK 0x40000000
#define B44_FLAG_WOL_ENABLE 0x80000000
......@@ -396,6 +400,9 @@ struct b44 {
u32 tx_pending;
u8 phy_addr;
u8 force_copybreak;
struct phy_device *phydev;
struct mii_bus *mii_bus;
int old_link;
struct mii_if_info mii_if;
};
......
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