Commit dcd215c9 authored by Joe Perches's avatar Joe Perches Committed by Ingo Molnar

include/asm-x86/io_32.h: checkpatch cleanups - formatting only

Signed-off-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 9bd73425
...@@ -65,14 +65,14 @@ ...@@ -65,14 +65,14 @@
* *
* The returned physical address is the physical (CPU) mapping for * The returned physical address is the physical (CPU) mapping for
* the memory address given. It is only valid to use this function on * the memory address given. It is only valid to use this function on
* addresses directly mapped or allocated via kmalloc. * addresses directly mapped or allocated via kmalloc.
* *
* This function does not give bus mappings for DMA transfers. In * This function does not give bus mappings for DMA transfers. In
* almost all conceivable cases a device driver should not be using * almost all conceivable cases a device driver should not be using
* this function * this function
*/ */
static inline unsigned long virt_to_phys(volatile void * address) static inline unsigned long virt_to_phys(volatile void *address)
{ {
return __pa(address); return __pa(address);
} }
...@@ -90,7 +90,7 @@ static inline unsigned long virt_to_phys(volatile void * address) ...@@ -90,7 +90,7 @@ static inline unsigned long virt_to_phys(volatile void * address)
* this function * this function
*/ */
static inline void * phys_to_virt(unsigned long address) static inline void *phys_to_virt(unsigned long address)
{ {
return __va(address); return __va(address);
} }
...@@ -169,16 +169,19 @@ extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); ...@@ -169,16 +169,19 @@ extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
static inline unsigned char readb(const volatile void __iomem *addr) static inline unsigned char readb(const volatile void __iomem *addr)
{ {
return *(volatile unsigned char __force *) addr; return *(volatile unsigned char __force *)addr;
} }
static inline unsigned short readw(const volatile void __iomem *addr) static inline unsigned short readw(const volatile void __iomem *addr)
{ {
return *(volatile unsigned short __force *) addr; return *(volatile unsigned short __force *)addr;
} }
static inline unsigned int readl(const volatile void __iomem *addr) static inline unsigned int readl(const volatile void __iomem *addr)
{ {
return *(volatile unsigned int __force *) addr; return *(volatile unsigned int __force *) addr;
} }
#define readb_relaxed(addr) readb(addr) #define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr) #define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr) #define readl_relaxed(addr) readl(addr)
...@@ -188,15 +191,17 @@ static inline unsigned int readl(const volatile void __iomem *addr) ...@@ -188,15 +191,17 @@ static inline unsigned int readl(const volatile void __iomem *addr)
static inline void writeb(unsigned char b, volatile void __iomem *addr) static inline void writeb(unsigned char b, volatile void __iomem *addr)
{ {
*(volatile unsigned char __force *) addr = b; *(volatile unsigned char __force *)addr = b;
} }
static inline void writew(unsigned short b, volatile void __iomem *addr) static inline void writew(unsigned short b, volatile void __iomem *addr)
{ {
*(volatile unsigned short __force *) addr = b; *(volatile unsigned short __force *)addr = b;
} }
static inline void writel(unsigned int b, volatile void __iomem *addr) static inline void writel(unsigned int b, volatile void __iomem *addr)
{ {
*(volatile unsigned int __force *) addr = b; *(volatile unsigned int __force *)addr = b;
} }
#define __raw_writeb writeb #define __raw_writeb writeb
#define __raw_writew writew #define __raw_writew writew
...@@ -239,12 +244,12 @@ memcpy_toio(volatile void __iomem *dst, const void *src, int count) ...@@ -239,12 +244,12 @@ memcpy_toio(volatile void __iomem *dst, const void *src, int count)
* 1. Out of order aware processors * 1. Out of order aware processors
* 2. Accidentally out of order processors (PPro errata #51) * 2. Accidentally out of order processors (PPro errata #51)
*/ */
#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE) #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
static inline void flush_write_buffers(void) static inline void flush_write_buffers(void)
{ {
__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory"); asm volatile("lock; addl $0,0(%%esp)": : :"memory");
} }
#else #else
...@@ -264,7 +269,8 @@ extern void io_delay_init(void); ...@@ -264,7 +269,8 @@ extern void io_delay_init(void);
#include <asm/paravirt.h> #include <asm/paravirt.h>
#else #else
static inline void slow_down_io(void) { static inline void slow_down_io(void)
{
native_io_delay(); native_io_delay();
#ifdef REALLY_SLOW_IO #ifdef REALLY_SLOW_IO
native_io_delay(); native_io_delay();
...@@ -275,51 +281,74 @@ static inline void slow_down_io(void) { ...@@ -275,51 +281,74 @@ static inline void slow_down_io(void) {
#endif #endif
#define __BUILDIO(bwl,bw,type) \ #define __BUILDIO(bwl, bw, type) \
static inline void out##bwl(unsigned type value, int port) { \ static inline void out##bwl(unsigned type value, int port) \
out##bwl##_local(value, port); \ { \
} \ out##bwl##_local(value, port); \
static inline unsigned type in##bwl(int port) { \ } \
return in##bwl##_local(port); \ \
static inline unsigned type in##bwl(int port) \
{ \
return in##bwl##_local(port); \
} }
#define BUILDIO(bwl,bw,type) \ #define BUILDIO(bwl, bw, type) \
static inline void out##bwl##_local(unsigned type value, int port) { \ static inline void out##bwl##_local(unsigned type value, int port) \
__asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \ { \
} \ asm volatile("out" #bwl " %" #bw "0, %w1" \
static inline unsigned type in##bwl##_local(int port) { \ : : "a"(value), "Nd"(port)); \
unsigned type value; \ } \
__asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \ \
return value; \ static inline unsigned type in##bwl##_local(int port) \
} \ { \
static inline void out##bwl##_local_p(unsigned type value, int port) { \ unsigned type value; \
out##bwl##_local(value, port); \ asm volatile("in" #bwl " %w1, %" #bw "0" \
slow_down_io(); \ : "=a"(value) : "Nd"(port)); \
} \ return value; \
static inline unsigned type in##bwl##_local_p(int port) { \ } \
unsigned type value = in##bwl##_local(port); \ \
slow_down_io(); \ static inline void out##bwl##_local_p(unsigned type value, int port) \
return value; \ { \
} \ out##bwl##_local(value, port); \
__BUILDIO(bwl,bw,type) \ slow_down_io(); \
static inline void out##bwl##_p(unsigned type value, int port) { \ } \
out##bwl(value, port); \ \
slow_down_io(); \ static inline unsigned type in##bwl##_local_p(int port) \
} \ { \
static inline unsigned type in##bwl##_p(int port) { \ unsigned type value = in##bwl##_local(port); \
unsigned type value = in##bwl(port); \ slow_down_io(); \
slow_down_io(); \ return value; \
return value; \ } \
} \ \
static inline void outs##bwl(int port, const void *addr, unsigned long count) { \ __BUILDIO(bwl, bw, type) \
__asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \ \
} \ static inline void out##bwl##_p(unsigned type value, int port) \
static inline void ins##bwl(int port, void *addr, unsigned long count) { \ { \
__asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \ out##bwl(value, port); \
slow_down_io(); \
} \
\
static inline unsigned type in##bwl##_p(int port) \
{ \
unsigned type value = in##bwl(port); \
slow_down_io(); \
return value; \
} \
\
static inline void outs##bwl(int port, const void *addr, unsigned long count) \
{ \
asm volatile("rep; outs" #bwl \
: "+S"(addr), "+c"(count) : "d"(port)); \
} \
\
static inline void ins##bwl(int port, void *addr, unsigned long count) \
{ \
asm volatile("rep; ins" #bwl \
: "+D"(addr), "+c"(count) : "d"(port)); \
} }
BUILDIO(b,b,char) BUILDIO(b, b, char)
BUILDIO(w,w,short) BUILDIO(w, w, short)
BUILDIO(l,,int) BUILDIO(l, , int)
#endif #endif
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