Commit dd0d7181 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "Quite a lot of fixes here for no single reason.

  There's a collection of the usual sort of device specific fixes and
  also a bunch of people have been working on spidev and the userspace
  test program spidev_test so they've got an unusually large collection
  of small fixes"

* tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: spidev: fix a potential use-after-free in spidev_release()
  spi: spidev: fix a race between spidev_release and spidev_remove
  spi: stm32-qspi: Fix error path in case of -EPROBE_DEFER
  spi: uapi: spidev: Use TABs for alignment
  spi: spi-fsl-dspi: Free DMA memory with matching function
  spi: tools: Add macro definitions to fix build errors
  spi: tools: Make default_tx/rx and input_tx static
  spi: dt-bindings: amlogic, meson-gx-spicc: Fix schema for meson-g12a
  spi: rspi: Use requested instead of maximum bit rate
  spi: spidev_test: Use %u to format unsigned numbers
  spi: sprd: switch the sequence of setting WDG_LOAD_LOW and _HIGH
parents 75164578 06096cc6
...@@ -34,12 +34,15 @@ properties: ...@@ -34,12 +34,15 @@ properties:
maxItems: 1 maxItems: 1
clocks: clocks:
maxItems: 1 minItems: 1
maxItems: 2
items:
- description: controller register bus clock
- description: baud rate generator and delay control clock
clock-names: clock-names:
description: input clock for the baud rate generator minItems: 1
items: maxItems: 2
- const: core
if: if:
properties: properties:
...@@ -51,17 +54,22 @@ if: ...@@ -51,17 +54,22 @@ if:
then: then:
properties: properties:
clocks: clocks:
contains: minItems: 2
items:
- description: controller register bus clock
- description: baud rate generator and delay control clock
clock-names: clock-names:
minItems: 2
items: items:
- const: core - const: core
- const: pclk - const: pclk
else:
properties:
clocks:
maxItems: 1
clock-names:
items:
- const: core
required: required:
- compatible - compatible
- reg - reg
......
...@@ -588,14 +588,14 @@ static void dspi_release_dma(struct fsl_dspi *dspi) ...@@ -588,14 +588,14 @@ static void dspi_release_dma(struct fsl_dspi *dspi)
return; return;
if (dma->chan_tx) { if (dma->chan_tx) {
dma_unmap_single(dma->chan_tx->device->dev, dma->tx_dma_phys, dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize,
dma_bufsize, DMA_TO_DEVICE); dma->tx_dma_buf, dma->tx_dma_phys);
dma_release_channel(dma->chan_tx); dma_release_channel(dma->chan_tx);
} }
if (dma->chan_rx) { if (dma->chan_rx) {
dma_unmap_single(dma->chan_rx->device->dev, dma->rx_dma_phys, dma_free_coherent(dma->chan_rx->device->dev, dma_bufsize,
dma_bufsize, DMA_FROM_DEVICE); dma->rx_dma_buf, dma->rx_dma_phys);
dma_release_channel(dma->chan_rx); dma_release_channel(dma->chan_rx);
} }
} }
......
...@@ -179,7 +179,7 @@ ...@@ -179,7 +179,7 @@
struct rspi_data { struct rspi_data {
void __iomem *addr; void __iomem *addr;
u32 max_speed_hz; u32 speed_hz;
struct spi_controller *ctlr; struct spi_controller *ctlr;
struct platform_device *pdev; struct platform_device *pdev;
wait_queue_head_t wait; wait_queue_head_t wait;
...@@ -258,8 +258,7 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size) ...@@ -258,8 +258,7 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR); rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
/* Sets transfer bit rate */ /* Sets transfer bit rate */
spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz) - 1;
2 * rspi->max_speed_hz) - 1;
rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
/* Disable dummy transmission, set 16-bit word access, 1 frame */ /* Disable dummy transmission, set 16-bit word access, 1 frame */
...@@ -299,14 +298,14 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size) ...@@ -299,14 +298,14 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)
clksrc = clk_get_rate(rspi->clk); clksrc = clk_get_rate(rspi->clk);
while (div < 3) { while (div < 3) {
if (rspi->max_speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */ if (rspi->speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */
break; break;
div++; div++;
clksrc /= 2; clksrc /= 2;
} }
/* Sets transfer bit rate */ /* Sets transfer bit rate */
spbr = DIV_ROUND_UP(clksrc, 2 * rspi->max_speed_hz) - 1; spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1;
rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
rspi->spcmd |= div << 2; rspi->spcmd |= div << 2;
...@@ -341,7 +340,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size) ...@@ -341,7 +340,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR); rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
/* Sets transfer bit rate */ /* Sets transfer bit rate */
spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->max_speed_hz); spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz);
rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
/* Disable dummy transmission, set byte access */ /* Disable dummy transmission, set byte access */
...@@ -949,9 +948,24 @@ static int rspi_prepare_message(struct spi_controller *ctlr, ...@@ -949,9 +948,24 @@ static int rspi_prepare_message(struct spi_controller *ctlr,
{ {
struct rspi_data *rspi = spi_controller_get_devdata(ctlr); struct rspi_data *rspi = spi_controller_get_devdata(ctlr);
struct spi_device *spi = msg->spi; struct spi_device *spi = msg->spi;
const struct spi_transfer *xfer;
int ret; int ret;
rspi->max_speed_hz = spi->max_speed_hz; /*
* As the Bit Rate Register must not be changed while the device is
* active, all transfers in a message must use the same bit rate.
* In theory, the sequencer could be enabled, and each Command Register
* could divide the base bit rate by a different value.
* However, most RSPI variants do not have Transfer Data Length
* Multiplier Setting Registers, so each sequence step would be limited
* to a single word, making this feature unsuitable for large
* transfers, which would gain most from it.
*/
rspi->speed_hz = spi->max_speed_hz;
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
if (xfer->speed_hz < rspi->speed_hz)
rspi->speed_hz = xfer->speed_hz;
}
rspi->spcmd = SPCMD_SSLKP; rspi->spcmd = SPCMD_SSLKP;
if (spi->mode & SPI_CPOL) if (spi->mode & SPI_CPOL)
......
...@@ -389,9 +389,9 @@ static int sprd_adi_restart_handler(struct notifier_block *this, ...@@ -389,9 +389,9 @@ static int sprd_adi_restart_handler(struct notifier_block *this,
sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_CTRL, val); sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_CTRL, val);
/* Load the watchdog timeout value, 50ms is always enough. */ /* Load the watchdog timeout value, 50ms is always enough. */
sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0);
sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_LOW, sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_LOW,
WDG_LOAD_VAL & WDG_LOAD_MASK); WDG_LOAD_VAL & WDG_LOAD_MASK);
sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0);
/* Start the watchdog to reset system */ /* Start the watchdog to reset system */
sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val); sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val);
......
...@@ -553,20 +553,6 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = { ...@@ -553,20 +553,6 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = {
.exec_op = stm32_qspi_exec_op, .exec_op = stm32_qspi_exec_op,
}; };
static void stm32_qspi_release(struct stm32_qspi *qspi)
{
pm_runtime_get_sync(qspi->dev);
/* disable qspi */
writel_relaxed(0, qspi->io_base + QSPI_CR);
stm32_qspi_dma_free(qspi);
mutex_destroy(&qspi->lock);
pm_runtime_put_noidle(qspi->dev);
pm_runtime_disable(qspi->dev);
pm_runtime_set_suspended(qspi->dev);
pm_runtime_dont_use_autosuspend(qspi->dev);
clk_disable_unprepare(qspi->clk);
}
static int stm32_qspi_probe(struct platform_device *pdev) static int stm32_qspi_probe(struct platform_device *pdev)
{ {
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
...@@ -642,7 +628,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) ...@@ -642,7 +628,7 @@ static int stm32_qspi_probe(struct platform_device *pdev)
if (IS_ERR(rstc)) { if (IS_ERR(rstc)) {
ret = PTR_ERR(rstc); ret = PTR_ERR(rstc);
if (ret == -EPROBE_DEFER) if (ret == -EPROBE_DEFER)
goto err_qspi_release; goto err_clk_disable;
} else { } else {
reset_control_assert(rstc); reset_control_assert(rstc);
udelay(2); udelay(2);
...@@ -653,7 +639,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) ...@@ -653,7 +639,7 @@ static int stm32_qspi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, qspi); platform_set_drvdata(pdev, qspi);
ret = stm32_qspi_dma_setup(qspi); ret = stm32_qspi_dma_setup(qspi);
if (ret) if (ret)
goto err_qspi_release; goto err_dma_free;
mutex_init(&qspi->lock); mutex_init(&qspi->lock);
...@@ -673,15 +659,26 @@ static int stm32_qspi_probe(struct platform_device *pdev) ...@@ -673,15 +659,26 @@ static int stm32_qspi_probe(struct platform_device *pdev)
ret = devm_spi_register_master(dev, ctrl); ret = devm_spi_register_master(dev, ctrl);
if (ret) if (ret)
goto err_qspi_release; goto err_pm_runtime_free;
pm_runtime_mark_last_busy(dev); pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev); pm_runtime_put_autosuspend(dev);
return 0; return 0;
err_qspi_release: err_pm_runtime_free:
stm32_qspi_release(qspi); pm_runtime_get_sync(qspi->dev);
/* disable qspi */
writel_relaxed(0, qspi->io_base + QSPI_CR);
mutex_destroy(&qspi->lock);
pm_runtime_put_noidle(qspi->dev);
pm_runtime_disable(qspi->dev);
pm_runtime_set_suspended(qspi->dev);
pm_runtime_dont_use_autosuspend(qspi->dev);
err_dma_free:
stm32_qspi_dma_free(qspi);
err_clk_disable:
clk_disable_unprepare(qspi->clk);
err_master_put: err_master_put:
spi_master_put(qspi->ctrl); spi_master_put(qspi->ctrl);
...@@ -692,7 +689,16 @@ static int stm32_qspi_remove(struct platform_device *pdev) ...@@ -692,7 +689,16 @@ static int stm32_qspi_remove(struct platform_device *pdev)
{ {
struct stm32_qspi *qspi = platform_get_drvdata(pdev); struct stm32_qspi *qspi = platform_get_drvdata(pdev);
stm32_qspi_release(qspi); pm_runtime_get_sync(qspi->dev);
/* disable qspi */
writel_relaxed(0, qspi->io_base + QSPI_CR);
stm32_qspi_dma_free(qspi);
mutex_destroy(&qspi->lock);
pm_runtime_put_noidle(qspi->dev);
pm_runtime_disable(qspi->dev);
pm_runtime_set_suspended(qspi->dev);
pm_runtime_dont_use_autosuspend(qspi->dev);
clk_disable_unprepare(qspi->clk);
return 0; return 0;
} }
......
...@@ -609,15 +609,20 @@ static int spidev_open(struct inode *inode, struct file *filp) ...@@ -609,15 +609,20 @@ static int spidev_open(struct inode *inode, struct file *filp)
static int spidev_release(struct inode *inode, struct file *filp) static int spidev_release(struct inode *inode, struct file *filp)
{ {
struct spidev_data *spidev; struct spidev_data *spidev;
int dofree;
mutex_lock(&device_list_lock); mutex_lock(&device_list_lock);
spidev = filp->private_data; spidev = filp->private_data;
filp->private_data = NULL; filp->private_data = NULL;
spin_lock_irq(&spidev->spi_lock);
/* ... after we unbound from the underlying device? */
dofree = (spidev->spi == NULL);
spin_unlock_irq(&spidev->spi_lock);
/* last close? */ /* last close? */
spidev->users--; spidev->users--;
if (!spidev->users) { if (!spidev->users) {
int dofree;
kfree(spidev->tx_buffer); kfree(spidev->tx_buffer);
spidev->tx_buffer = NULL; spidev->tx_buffer = NULL;
...@@ -625,19 +630,14 @@ static int spidev_release(struct inode *inode, struct file *filp) ...@@ -625,19 +630,14 @@ static int spidev_release(struct inode *inode, struct file *filp)
kfree(spidev->rx_buffer); kfree(spidev->rx_buffer);
spidev->rx_buffer = NULL; spidev->rx_buffer = NULL;
spin_lock_irq(&spidev->spi_lock);
if (spidev->spi)
spidev->speed_hz = spidev->spi->max_speed_hz;
/* ... after we unbound from the underlying device? */
dofree = (spidev->spi == NULL);
spin_unlock_irq(&spidev->spi_lock);
if (dofree) if (dofree)
kfree(spidev); kfree(spidev);
else
spidev->speed_hz = spidev->spi->max_speed_hz;
} }
#ifdef CONFIG_SPI_SLAVE #ifdef CONFIG_SPI_SLAVE
spi_slave_abort(spidev->spi); if (!dofree)
spi_slave_abort(spidev->spi);
#endif #endif
mutex_unlock(&device_list_lock); mutex_unlock(&device_list_lock);
...@@ -787,13 +787,13 @@ static int spidev_remove(struct spi_device *spi) ...@@ -787,13 +787,13 @@ static int spidev_remove(struct spi_device *spi)
{ {
struct spidev_data *spidev = spi_get_drvdata(spi); struct spidev_data *spidev = spi_get_drvdata(spi);
/* prevent new opens */
mutex_lock(&device_list_lock);
/* make sure ops on existing fds can abort cleanly */ /* make sure ops on existing fds can abort cleanly */
spin_lock_irq(&spidev->spi_lock); spin_lock_irq(&spidev->spi_lock);
spidev->spi = NULL; spidev->spi = NULL;
spin_unlock_irq(&spidev->spi_lock); spin_unlock_irq(&spidev->spi_lock);
/* prevent new opens */
mutex_lock(&device_list_lock);
list_del(&spidev->device_entry); list_del(&spidev->device_entry);
device_destroy(spidev_class, spidev->devt); device_destroy(spidev_class, spidev->devt);
clear_bit(MINOR(spidev->devt), minors); clear_bit(MINOR(spidev->devt), minors);
......
...@@ -48,6 +48,10 @@ ...@@ -48,6 +48,10 @@
#define SPI_TX_QUAD 0x200 #define SPI_TX_QUAD 0x200
#define SPI_RX_DUAL 0x400 #define SPI_RX_DUAL 0x400
#define SPI_RX_QUAD 0x800 #define SPI_RX_QUAD 0x800
#define SPI_CS_WORD 0x1000
#define SPI_TX_OCTAL 0x2000
#define SPI_RX_OCTAL 0x4000
#define SPI_3WIRE_HIZ 0x8000
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
......
...@@ -47,7 +47,7 @@ static int transfer_size; ...@@ -47,7 +47,7 @@ static int transfer_size;
static int iterations; static int iterations;
static int interval = 5; /* interval in seconds for showing transfer rate */ static int interval = 5; /* interval in seconds for showing transfer rate */
uint8_t default_tx[] = { static uint8_t default_tx[] = {
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0x40, 0x00, 0x00, 0x00, 0x00, 0x95, 0x40, 0x00, 0x00, 0x00, 0x00, 0x95,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
...@@ -56,8 +56,8 @@ uint8_t default_tx[] = { ...@@ -56,8 +56,8 @@ uint8_t default_tx[] = {
0xF0, 0x0D, 0xF0, 0x0D,
}; };
uint8_t default_rx[ARRAY_SIZE(default_tx)] = {0, }; static uint8_t default_rx[ARRAY_SIZE(default_tx)] = {0, };
char *input_tx; static char *input_tx;
static void hex_dump(const void *src, size_t length, size_t line_size, static void hex_dump(const void *src, size_t length, size_t line_size,
char *prefix) char *prefix)
...@@ -461,8 +461,8 @@ int main(int argc, char *argv[]) ...@@ -461,8 +461,8 @@ int main(int argc, char *argv[])
pabort("can't get max speed hz"); pabort("can't get max speed hz");
printf("spi mode: 0x%x\n", mode); printf("spi mode: 0x%x\n", mode);
printf("bits per word: %d\n", bits); printf("bits per word: %u\n", bits);
printf("max speed: %d Hz (%d KHz)\n", speed, speed/1000); printf("max speed: %u Hz (%u kHz)\n", speed, speed/1000);
if (input_tx) if (input_tx)
transfer_escaped_string(fd, input_tx); transfer_escaped_string(fd, input_tx);
......
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