Commit ddab5337 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'dma-mapping-5.2' of git://git.infradead.org/users/hch/dma-mapping

Pull DMA mapping updates from Christoph Hellwig:

 - remove the already broken support for NULL dev arguments to the DMA
   API calls

 - Kconfig tidyups

* tag 'dma-mapping-5.2' of git://git.infradead.org/users/hch/dma-mapping:
  dma-mapping: add a Kconfig symbol to indicate arch_dma_prep_coherent presence
  dma-mapping: remove an unnecessary NULL check
  x86/dma: Remove the x86_dma_fallback_dev hack
  dma-mapping: remove leftover NULL device support
  arm: use a dummy struct device for ISA DMA use of the DMA API
  pxa3xx-gcu: pass struct device to dma_mmap_coherent
  gbefb: switch to managed version of the DMA allocator
  da8xx-fb: pass struct device to DMA API functions
  parport_ip32: pass struct device to DMA API functions
  dma: select GENERIC_ALLOCATOR for DMA_REMAP
parents e57ccca1 13bf5ced
...@@ -365,13 +365,12 @@ __get_free_pages() (but takes size instead of a page order). If your ...@@ -365,13 +365,12 @@ __get_free_pages() (but takes size instead of a page order). If your
driver needs regions sized smaller than a page, you may prefer using driver needs regions sized smaller than a page, you may prefer using
the dma_pool interface, described below. the dma_pool interface, described below.
The consistent DMA mapping interfaces, for non-NULL dev, will by The consistent DMA mapping interfaces, will by default return a DMA address
default return a DMA address which is 32-bit addressable. Even if the which is 32-bit addressable. Even if the device indicates (via the DMA mask)
device indicates (via DMA mask) that it may address the upper 32-bits, that it may address the upper 32-bits, consistent allocation will only
consistent allocation will only return > 32-bit addresses for DMA if return > 32-bit addresses for DMA if the consistent DMA mask has been
the consistent DMA mask has been explicitly changed via explicitly changed via dma_set_coherent_mask(). This is true of the
dma_set_coherent_mask(). This is true of the dma_pool interface as dma_pool interface as well.
well.
dma_alloc_coherent() returns two values: the virtual address which you dma_alloc_coherent() returns two values: the virtual address which you
can use to access it from the CPU and dma_handle which you pass to the can use to access it from the CPU and dma_handle which you pass to the
......
...@@ -55,6 +55,12 @@ static int isa_get_dma_residue(unsigned int chan, dma_t *dma) ...@@ -55,6 +55,12 @@ static int isa_get_dma_residue(unsigned int chan, dma_t *dma)
return chan < 4 ? count : (count << 1); return chan < 4 ? count : (count << 1);
} }
static struct device isa_dma_dev = {
.init_name = "fallback device",
.coherent_dma_mask = ~(dma_addr_t)0,
.dma_mask = &isa_dma_dev.coherent_dma_mask,
};
static void isa_enable_dma(unsigned int chan, dma_t *dma) static void isa_enable_dma(unsigned int chan, dma_t *dma)
{ {
if (dma->invalid) { if (dma->invalid) {
...@@ -89,7 +95,7 @@ static void isa_enable_dma(unsigned int chan, dma_t *dma) ...@@ -89,7 +95,7 @@ static void isa_enable_dma(unsigned int chan, dma_t *dma)
dma->sg = &dma->buf; dma->sg = &dma->buf;
dma->sgcount = 1; dma->sgcount = 1;
dma->buf.length = dma->count; dma->buf.length = dma->count;
dma->buf.dma_address = dma_map_single(NULL, dma->buf.dma_address = dma_map_single(&isa_dma_dev,
dma->addr, dma->count, dma->addr, dma->count,
direction); direction);
} }
......
...@@ -151,6 +151,12 @@ static void iomd_free_dma(unsigned int chan, dma_t *dma) ...@@ -151,6 +151,12 @@ static void iomd_free_dma(unsigned int chan, dma_t *dma)
free_irq(idma->irq, idma); free_irq(idma->irq, idma);
} }
static struct device isa_dma_dev = {
.init_name = "fallback device",
.coherent_dma_mask = ~(dma_addr_t)0,
.dma_mask = &isa_dma_dev.coherent_dma_mask,
};
static void iomd_enable_dma(unsigned int chan, dma_t *dma) static void iomd_enable_dma(unsigned int chan, dma_t *dma)
{ {
struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
...@@ -168,7 +174,7 @@ static void iomd_enable_dma(unsigned int chan, dma_t *dma) ...@@ -168,7 +174,7 @@ static void iomd_enable_dma(unsigned int chan, dma_t *dma)
idma->dma.sg = &idma->dma.buf; idma->dma.sg = &idma->dma.buf;
idma->dma.sgcount = 1; idma->dma.sgcount = 1;
idma->dma.buf.length = idma->dma.count; idma->dma.buf.length = idma->dma.count;
idma->dma.buf.dma_address = dma_map_single(NULL, idma->dma.buf.dma_address = dma_map_single(&isa_dma_dev,
idma->dma.addr, idma->dma.count, idma->dma.addr, idma->dma.count,
idma->dma.dma_mode == DMA_MODE_READ ? idma->dma.dma_mode == DMA_MODE_READ ?
DMA_FROM_DEVICE : DMA_TO_DEVICE); DMA_FROM_DEVICE : DMA_TO_DEVICE);
......
...@@ -13,6 +13,7 @@ config ARM64 ...@@ -13,6 +13,7 @@ config ARM64
select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_HAS_DMA_COHERENT_TO_PFN select ARCH_HAS_DMA_COHERENT_TO_PFN
select ARCH_HAS_DMA_MMAP_PGPROT select ARCH_HAS_DMA_MMAP_PGPROT
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
select ARCH_HAS_ELF_RANDOMIZE select ARCH_HAS_ELF_RANDOMIZE
select ARCH_HAS_FAST_MULTIPLIER select ARCH_HAS_FAST_MULTIPLIER
......
config CSKY config CSKY
def_bool y def_bool y
select ARCH_32BIT_OFF_T select ARCH_32BIT_OFF_T
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_BUILTIN_BSWAP
......
...@@ -13,14 +13,7 @@ ...@@ -13,14 +13,7 @@
#include <asm/swiotlb.h> #include <asm/swiotlb.h>
#include <linux/dma-contiguous.h> #include <linux/dma-contiguous.h>
#ifdef CONFIG_ISA
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
#else
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
#endif
extern int iommu_merge; extern int iommu_merge;
extern struct device x86_dma_fallback_dev;
extern int panic_on_overflow; extern int panic_on_overflow;
extern const struct dma_map_ops *dma_ops; extern const struct dma_map_ops *dma_ops;
...@@ -30,7 +23,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) ...@@ -30,7 +23,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
return dma_ops; return dma_ops;
} }
bool arch_dma_alloc_attrs(struct device **dev);
#define arch_dma_alloc_attrs arch_dma_alloc_attrs
#endif #endif
...@@ -233,9 +233,6 @@ static dma_addr_t gart_map_page(struct device *dev, struct page *page, ...@@ -233,9 +233,6 @@ static dma_addr_t gart_map_page(struct device *dev, struct page *page,
unsigned long bus; unsigned long bus;
phys_addr_t paddr = page_to_phys(page) + offset; phys_addr_t paddr = page_to_phys(page) + offset;
if (!dev)
dev = &x86_dma_fallback_dev;
if (!need_iommu(dev, paddr, size)) if (!need_iommu(dev, paddr, size))
return paddr; return paddr;
...@@ -392,9 +389,6 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, ...@@ -392,9 +389,6 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
if (nents == 0) if (nents == 0)
return 0; return 0;
if (!dev)
dev = &x86_dma_fallback_dev;
out = 0; out = 0;
start = 0; start = 0;
start_sg = sg; start_sg = sg;
......
...@@ -51,14 +51,6 @@ int iommu_pass_through __read_mostly; ...@@ -51,14 +51,6 @@ int iommu_pass_through __read_mostly;
extern struct iommu_table_entry __iommu_table[], __iommu_table_end[]; extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
/* Dummy device used for NULL arguments (normally ISA). */
struct device x86_dma_fallback_dev = {
.init_name = "fallback device",
.coherent_dma_mask = ISA_DMA_BIT_MASK,
.dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
};
EXPORT_SYMBOL(x86_dma_fallback_dev);
void __init pci_iommu_alloc(void) void __init pci_iommu_alloc(void)
{ {
struct iommu_table_entry *p; struct iommu_table_entry *p;
...@@ -77,18 +69,6 @@ void __init pci_iommu_alloc(void) ...@@ -77,18 +69,6 @@ void __init pci_iommu_alloc(void)
} }
} }
bool arch_dma_alloc_attrs(struct device **dev)
{
if (!*dev)
*dev = &x86_dma_fallback_dev;
if (!is_device_dma_capable(*dev))
return false;
return true;
}
EXPORT_SYMBOL(arch_dma_alloc_attrs);
/* /*
* See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel * See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel
* parameter documentation. * parameter documentation.
......
...@@ -568,6 +568,7 @@ static irqreturn_t parport_ip32_merr_interrupt(int irq, void *dev_id) ...@@ -568,6 +568,7 @@ static irqreturn_t parport_ip32_merr_interrupt(int irq, void *dev_id)
/** /**
* parport_ip32_dma_start - begins a DMA transfer * parport_ip32_dma_start - begins a DMA transfer
* @p: partport to work on
* @dir: DMA direction: DMA_TO_DEVICE or DMA_FROM_DEVICE * @dir: DMA direction: DMA_TO_DEVICE or DMA_FROM_DEVICE
* @addr: pointer to data buffer * @addr: pointer to data buffer
* @count: buffer size * @count: buffer size
...@@ -575,8 +576,8 @@ static irqreturn_t parport_ip32_merr_interrupt(int irq, void *dev_id) ...@@ -575,8 +576,8 @@ static irqreturn_t parport_ip32_merr_interrupt(int irq, void *dev_id)
* Calls to parport_ip32_dma_start() and parport_ip32_dma_stop() must be * Calls to parport_ip32_dma_start() and parport_ip32_dma_stop() must be
* correctly balanced. * correctly balanced.
*/ */
static int parport_ip32_dma_start(enum dma_data_direction dir, static int parport_ip32_dma_start(struct parport *p,
void *addr, size_t count) enum dma_data_direction dir, void *addr, size_t count)
{ {
unsigned int limit; unsigned int limit;
u64 ctrl; u64 ctrl;
...@@ -601,7 +602,7 @@ static int parport_ip32_dma_start(enum dma_data_direction dir, ...@@ -601,7 +602,7 @@ static int parport_ip32_dma_start(enum dma_data_direction dir,
/* Prepare DMA pointers */ /* Prepare DMA pointers */
parport_ip32_dma.dir = dir; parport_ip32_dma.dir = dir;
parport_ip32_dma.buf = dma_map_single(NULL, addr, count, dir); parport_ip32_dma.buf = dma_map_single(&p->bus_dev, addr, count, dir);
parport_ip32_dma.len = count; parport_ip32_dma.len = count;
parport_ip32_dma.next = parport_ip32_dma.buf; parport_ip32_dma.next = parport_ip32_dma.buf;
parport_ip32_dma.left = parport_ip32_dma.len; parport_ip32_dma.left = parport_ip32_dma.len;
...@@ -625,11 +626,12 @@ static int parport_ip32_dma_start(enum dma_data_direction dir, ...@@ -625,11 +626,12 @@ static int parport_ip32_dma_start(enum dma_data_direction dir,
/** /**
* parport_ip32_dma_stop - ends a running DMA transfer * parport_ip32_dma_stop - ends a running DMA transfer
* @p: partport to work on
* *
* Calls to parport_ip32_dma_start() and parport_ip32_dma_stop() must be * Calls to parport_ip32_dma_start() and parport_ip32_dma_stop() must be
* correctly balanced. * correctly balanced.
*/ */
static void parport_ip32_dma_stop(void) static void parport_ip32_dma_stop(struct parport *p)
{ {
u64 ctx_a; u64 ctx_a;
u64 ctx_b; u64 ctx_b;
...@@ -685,8 +687,8 @@ static void parport_ip32_dma_stop(void) ...@@ -685,8 +687,8 @@ static void parport_ip32_dma_stop(void)
enable_irq(MACEISA_PAR_CTXB_IRQ); enable_irq(MACEISA_PAR_CTXB_IRQ);
parport_ip32_dma.irq_on = 1; parport_ip32_dma.irq_on = 1;
dma_unmap_single(NULL, parport_ip32_dma.buf, parport_ip32_dma.len, dma_unmap_single(&p->bus_dev, parport_ip32_dma.buf,
parport_ip32_dma.dir); parport_ip32_dma.len, parport_ip32_dma.dir);
} }
/** /**
...@@ -1445,7 +1447,7 @@ static size_t parport_ip32_fifo_write_block_dma(struct parport *p, ...@@ -1445,7 +1447,7 @@ static size_t parport_ip32_fifo_write_block_dma(struct parport *p,
priv->irq_mode = PARPORT_IP32_IRQ_HERE; priv->irq_mode = PARPORT_IP32_IRQ_HERE;
parport_ip32_dma_start(DMA_TO_DEVICE, (void *)buf, len); parport_ip32_dma_start(p, DMA_TO_DEVICE, (void *)buf, len);
reinit_completion(&priv->irq_complete); reinit_completion(&priv->irq_complete);
parport_ip32_frob_econtrol(p, ECR_DMAEN | ECR_SERVINTR, ECR_DMAEN); parport_ip32_frob_econtrol(p, ECR_DMAEN | ECR_SERVINTR, ECR_DMAEN);
...@@ -1461,7 +1463,7 @@ static size_t parport_ip32_fifo_write_block_dma(struct parport *p, ...@@ -1461,7 +1463,7 @@ static size_t parport_ip32_fifo_write_block_dma(struct parport *p,
if (ecr & ECR_SERVINTR) if (ecr & ECR_SERVINTR)
break; /* DMA transfer just finished */ break; /* DMA transfer just finished */
} }
parport_ip32_dma_stop(); parport_ip32_dma_stop(p);
written = len - parport_ip32_dma_get_residue(); written = len - parport_ip32_dma_get_residue();
priv->irq_mode = PARPORT_IP32_IRQ_FWD; priv->irq_mode = PARPORT_IP32_IRQ_FWD;
......
...@@ -1097,9 +1097,9 @@ static int fb_remove(struct platform_device *dev) ...@@ -1097,9 +1097,9 @@ static int fb_remove(struct platform_device *dev)
unregister_framebuffer(info); unregister_framebuffer(info);
fb_dealloc_cmap(&info->cmap); fb_dealloc_cmap(&info->cmap);
dma_free_coherent(NULL, PALETTE_SIZE, par->v_palette_base, dma_free_coherent(par->dev, PALETTE_SIZE, par->v_palette_base,
par->p_palette_base); par->p_palette_base);
dma_free_coherent(NULL, par->vram_size, par->vram_virt, dma_free_coherent(par->dev, par->vram_size, par->vram_virt,
par->vram_phys); par->vram_phys);
pm_runtime_put_sync(&dev->dev); pm_runtime_put_sync(&dev->dev);
pm_runtime_disable(&dev->dev); pm_runtime_disable(&dev->dev);
...@@ -1425,7 +1425,7 @@ static int fb_probe(struct platform_device *device) ...@@ -1425,7 +1425,7 @@ static int fb_probe(struct platform_device *device)
par->vram_size = roundup(par->vram_size/8, ulcm); par->vram_size = roundup(par->vram_size/8, ulcm);
par->vram_size = par->vram_size * LCD_NUM_BUFFERS; par->vram_size = par->vram_size * LCD_NUM_BUFFERS;
par->vram_virt = dma_alloc_coherent(NULL, par->vram_virt = dma_alloc_coherent(par->dev,
par->vram_size, par->vram_size,
&par->vram_phys, &par->vram_phys,
GFP_KERNEL | GFP_DMA); GFP_KERNEL | GFP_DMA);
...@@ -1446,7 +1446,7 @@ static int fb_probe(struct platform_device *device) ...@@ -1446,7 +1446,7 @@ static int fb_probe(struct platform_device *device)
da8xx_fb_fix.line_length - 1; da8xx_fb_fix.line_length - 1;
/* allocate palette buffer */ /* allocate palette buffer */
par->v_palette_base = dma_alloc_coherent(NULL, PALETTE_SIZE, par->v_palette_base = dma_alloc_coherent(par->dev, PALETTE_SIZE,
&par->p_palette_base, &par->p_palette_base,
GFP_KERNEL | GFP_DMA); GFP_KERNEL | GFP_DMA);
if (!par->v_palette_base) { if (!par->v_palette_base) {
...@@ -1532,11 +1532,12 @@ static int fb_probe(struct platform_device *device) ...@@ -1532,11 +1532,12 @@ static int fb_probe(struct platform_device *device)
fb_dealloc_cmap(&da8xx_fb_info->cmap); fb_dealloc_cmap(&da8xx_fb_info->cmap);
err_release_pl_mem: err_release_pl_mem:
dma_free_coherent(NULL, PALETTE_SIZE, par->v_palette_base, dma_free_coherent(par->dev, PALETTE_SIZE, par->v_palette_base,
par->p_palette_base); par->p_palette_base);
err_release_fb_mem: err_release_fb_mem:
dma_free_coherent(NULL, par->vram_size, par->vram_virt, par->vram_phys); dma_free_coherent(par->dev, par->vram_size, par->vram_virt,
par->vram_phys);
err_release_fb: err_release_fb:
framebuffer_release(da8xx_fb_info); framebuffer_release(da8xx_fb_info);
......
...@@ -1162,9 +1162,9 @@ static int gbefb_probe(struct platform_device *p_dev) ...@@ -1162,9 +1162,9 @@ static int gbefb_probe(struct platform_device *p_dev)
} }
gbe_revision = gbe->ctrlstat & 15; gbe_revision = gbe->ctrlstat & 15;
gbe_tiles.cpu = gbe_tiles.cpu = dmam_alloc_coherent(&p_dev->dev,
dma_alloc_coherent(NULL, GBE_TLB_SIZE * sizeof(uint16_t), GBE_TLB_SIZE * sizeof(uint16_t),
&gbe_tiles.dma, GFP_KERNEL); &gbe_tiles.dma, GFP_KERNEL);
if (!gbe_tiles.cpu) { if (!gbe_tiles.cpu) {
printk(KERN_ERR "gbefb: couldn't allocate tiles table\n"); printk(KERN_ERR "gbefb: couldn't allocate tiles table\n");
ret = -ENOMEM; ret = -ENOMEM;
...@@ -1178,19 +1178,20 @@ static int gbefb_probe(struct platform_device *p_dev) ...@@ -1178,19 +1178,20 @@ static int gbefb_probe(struct platform_device *p_dev)
if (!gbe_mem) { if (!gbe_mem) {
printk(KERN_ERR "gbefb: couldn't map framebuffer\n"); printk(KERN_ERR "gbefb: couldn't map framebuffer\n");
ret = -ENOMEM; ret = -ENOMEM;
goto out_tiles_free; goto out_release_mem_region;
} }
gbe_dma_addr = 0; gbe_dma_addr = 0;
} else { } else {
/* try to allocate memory with the classical allocator /* try to allocate memory with the classical allocator
* this has high chance to fail on low memory machines */ * this has high chance to fail on low memory machines */
gbe_mem = dma_alloc_wc(NULL, gbe_mem_size, &gbe_dma_addr, gbe_mem = dmam_alloc_attrs(&p_dev->dev, gbe_mem_size,
GFP_KERNEL); &gbe_dma_addr, GFP_KERNEL,
DMA_ATTR_WRITE_COMBINE);
if (!gbe_mem) { if (!gbe_mem) {
printk(KERN_ERR "gbefb: couldn't allocate framebuffer memory\n"); printk(KERN_ERR "gbefb: couldn't allocate framebuffer memory\n");
ret = -ENOMEM; ret = -ENOMEM;
goto out_tiles_free; goto out_release_mem_region;
} }
gbe_mem_phys = (unsigned long) gbe_dma_addr; gbe_mem_phys = (unsigned long) gbe_dma_addr;
...@@ -1237,11 +1238,6 @@ static int gbefb_probe(struct platform_device *p_dev) ...@@ -1237,11 +1238,6 @@ static int gbefb_probe(struct platform_device *p_dev)
out_gbe_unmap: out_gbe_unmap:
arch_phys_wc_del(par->wc_cookie); arch_phys_wc_del(par->wc_cookie);
if (gbe_dma_addr)
dma_free_wc(NULL, gbe_mem_size, gbe_mem, gbe_mem_phys);
out_tiles_free:
dma_free_coherent(NULL, GBE_TLB_SIZE * sizeof(uint16_t),
(void *)gbe_tiles.cpu, gbe_tiles.dma);
out_release_mem_region: out_release_mem_region:
release_mem_region(GBE_BASE, sizeof(struct sgi_gbe)); release_mem_region(GBE_BASE, sizeof(struct sgi_gbe));
out_release_framebuffer: out_release_framebuffer:
...@@ -1258,10 +1254,6 @@ static int gbefb_remove(struct platform_device* p_dev) ...@@ -1258,10 +1254,6 @@ static int gbefb_remove(struct platform_device* p_dev)
unregister_framebuffer(info); unregister_framebuffer(info);
gbe_turn_off(); gbe_turn_off();
arch_phys_wc_del(par->wc_cookie); arch_phys_wc_del(par->wc_cookie);
if (gbe_dma_addr)
dma_free_wc(NULL, gbe_mem_size, gbe_mem, gbe_mem_phys);
dma_free_coherent(NULL, GBE_TLB_SIZE * sizeof(uint16_t),
(void *)gbe_tiles.cpu, gbe_tiles.dma);
release_mem_region(GBE_BASE, sizeof(struct sgi_gbe)); release_mem_region(GBE_BASE, sizeof(struct sgi_gbe));
gbefb_remove_sysfs(&p_dev->dev); gbefb_remove_sysfs(&p_dev->dev);
framebuffer_release(info); framebuffer_release(info);
......
...@@ -96,6 +96,7 @@ struct pxa3xx_gcu_batch { ...@@ -96,6 +96,7 @@ struct pxa3xx_gcu_batch {
}; };
struct pxa3xx_gcu_priv { struct pxa3xx_gcu_priv {
struct device *dev;
void __iomem *mmio_base; void __iomem *mmio_base;
struct clk *clk; struct clk *clk;
struct pxa3xx_gcu_shared *shared; struct pxa3xx_gcu_shared *shared;
...@@ -493,7 +494,7 @@ pxa3xx_gcu_mmap(struct file *file, struct vm_area_struct *vma) ...@@ -493,7 +494,7 @@ pxa3xx_gcu_mmap(struct file *file, struct vm_area_struct *vma)
if (size != SHARED_SIZE) if (size != SHARED_SIZE)
return -EINVAL; return -EINVAL;
return dma_mmap_coherent(NULL, vma, return dma_mmap_coherent(priv->dev, vma,
priv->shared, priv->shared_phys, size); priv->shared, priv->shared_phys, size);
case SHARED_SIZE >> PAGE_SHIFT: case SHARED_SIZE >> PAGE_SHIFT:
...@@ -670,6 +671,7 @@ static int pxa3xx_gcu_probe(struct platform_device *pdev) ...@@ -670,6 +671,7 @@ static int pxa3xx_gcu_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, priv); platform_set_drvdata(pdev, priv);
priv->resource_mem = r; priv->resource_mem = r;
priv->dev = dev;
pxa3xx_gcu_reset(priv); pxa3xx_gcu_reset(priv);
pxa3xx_gcu_init_debug_timer(priv); pxa3xx_gcu_init_debug_timer(priv);
......
...@@ -267,9 +267,9 @@ size_t dma_direct_max_mapping_size(struct device *dev); ...@@ -267,9 +267,9 @@ size_t dma_direct_max_mapping_size(struct device *dev);
static inline const struct dma_map_ops *get_dma_ops(struct device *dev) static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{ {
if (dev && dev->dma_ops) if (dev->dma_ops)
return dev->dma_ops; return dev->dma_ops;
return get_arch_dma_ops(dev ? dev->bus : NULL); return get_arch_dma_ops(dev->bus);
} }
static inline void set_dma_ops(struct device *dev, static inline void set_dma_ops(struct device *dev,
...@@ -650,7 +650,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size, ...@@ -650,7 +650,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
static inline u64 dma_get_mask(struct device *dev) static inline u64 dma_get_mask(struct device *dev)
{ {
if (dev && dev->dma_mask && *dev->dma_mask) if (dev->dma_mask && *dev->dma_mask)
return *dev->dma_mask; return *dev->dma_mask;
return DMA_BIT_MASK(32); return DMA_BIT_MASK(32);
} }
......
...@@ -72,6 +72,12 @@ static inline void arch_sync_dma_for_cpu_all(struct device *dev) ...@@ -72,6 +72,12 @@ static inline void arch_sync_dma_for_cpu_all(struct device *dev)
} }
#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */ #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
#ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
void arch_dma_prep_coherent(struct page *page, size_t size); void arch_dma_prep_coherent(struct page *page, size_t size);
#else
static inline void arch_dma_prep_coherent(struct page *page, size_t size)
{
}
#endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
#endif /* _LINUX_DMA_NONCOHERENT_H */ #endif /* _LINUX_DMA_NONCOHERENT_H */
...@@ -38,6 +38,9 @@ config ARCH_HAS_SYNC_DMA_FOR_CPU ...@@ -38,6 +38,9 @@ config ARCH_HAS_SYNC_DMA_FOR_CPU
config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
bool bool
config ARCH_HAS_DMA_PREP_COHERENT
bool
config ARCH_HAS_DMA_COHERENT_TO_PFN config ARCH_HAS_DMA_COHERENT_TO_PFN
bool bool
...@@ -57,6 +60,7 @@ config SWIOTLB ...@@ -57,6 +60,7 @@ config SWIOTLB
config DMA_REMAP config DMA_REMAP
depends on MMU depends on MMU
select GENERIC_ALLOCATOR
bool bool
config DMA_DIRECT_REMAP config DMA_DIRECT_REMAP
......
...@@ -311,7 +311,7 @@ static inline bool dma_direct_possible(struct device *dev, dma_addr_t dma_addr, ...@@ -311,7 +311,7 @@ static inline bool dma_direct_possible(struct device *dev, dma_addr_t dma_addr,
size_t size) size_t size)
{ {
return swiotlb_force != SWIOTLB_FORCE && return swiotlb_force != SWIOTLB_FORCE &&
(!dev || dma_capable(dev, dma_addr, size)); dma_capable(dev, dma_addr, size);
} }
dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
......
...@@ -238,17 +238,13 @@ u64 dma_get_required_mask(struct device *dev) ...@@ -238,17 +238,13 @@ u64 dma_get_required_mask(struct device *dev)
} }
EXPORT_SYMBOL_GPL(dma_get_required_mask); EXPORT_SYMBOL_GPL(dma_get_required_mask);
#ifndef arch_dma_alloc_attrs
#define arch_dma_alloc_attrs(dev) (true)
#endif
void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
gfp_t flag, unsigned long attrs) gfp_t flag, unsigned long attrs)
{ {
const struct dma_map_ops *ops = get_dma_ops(dev); const struct dma_map_ops *ops = get_dma_ops(dev);
void *cpu_addr; void *cpu_addr;
WARN_ON_ONCE(dev && !dev->coherent_dma_mask); WARN_ON_ONCE(!dev->coherent_dma_mask);
if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
return cpu_addr; return cpu_addr;
...@@ -256,9 +252,6 @@ void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, ...@@ -256,9 +252,6 @@ void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
/* let the implementation decide on the zone to allocate from: */ /* let the implementation decide on the zone to allocate from: */
flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
if (!arch_dma_alloc_attrs(&dev))
return NULL;
if (dma_is_direct(ops)) if (dma_is_direct(ops))
cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs); cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
else if (ops->alloc) else if (ops->alloc)
......
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