Commit de21e4ae authored by Bokun Zhang's avatar Bokun Zhang Committed by Alex Deucher

drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setup

- When we are under SRIOV setup, the rev_id cannot be read
  properly. Therefore, we will return default value for it
Signed-off-by: default avatarBokun Zhang <Bokun.Zhang@amd.com>
Reviewed-by: default avatarMonk Liu <monk.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 25a35065
...@@ -53,8 +53,17 @@ static void nbio_v2_3_remap_hdp_registers(struct amdgpu_device *adev) ...@@ -53,8 +53,17 @@ static void nbio_v2_3_remap_hdp_registers(struct amdgpu_device *adev)
static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev) static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev)
{ {
u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0); u32 tmp;
/*
* guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
* therefore we force rev_id to 0 (which is the default value)
*/
if (amdgpu_sriov_vf(adev)) {
return 0;
}
tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK; tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT; tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
......
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