Commit de23f0b7 authored by Raul E Rangel's avatar Raul E Rangel Committed by Ulf Hansson

mmc: sdhci: sdhci-pci-o2micro: Check if controller supports 8-bit width

The O2 controller supports 8-bit EMMC access.

JESD84-B51 section A.6.3.a defines the bus testing procedure that
`mmc_select_bus_width()` implements. This is used to determine the actual
bus width of the eMMC.
Signed-off-by: default avatarRaul E Rangel <rrangel@chromium.org>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 99a93444
...@@ -395,11 +395,21 @@ int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) ...@@ -395,11 +395,21 @@ int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
{ {
struct sdhci_pci_chip *chip; struct sdhci_pci_chip *chip;
struct sdhci_host *host; struct sdhci_host *host;
u32 reg; u32 reg, caps;
int ret; int ret;
chip = slot->chip; chip = slot->chip;
host = slot->host; host = slot->host;
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
/*
* mmc_select_bus_width() will test the bus to determine the actual bus
* width.
*/
if (caps & SDHCI_CAN_DO_8BIT)
host->mmc->caps |= MMC_CAP_8_BIT_DATA;
switch (chip->pdev->device) { switch (chip->pdev->device) {
case PCI_DEVICE_ID_O2_SDS0: case PCI_DEVICE_ID_O2_SDS0:
case PCI_DEVICE_ID_O2_SEABIRD0: case PCI_DEVICE_ID_O2_SEABIRD0:
......
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