Commit de3a6c0a authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau: rebase per-channel pramin heap offsets to 0

Reviewed-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent b3beb167
...@@ -151,6 +151,10 @@ struct nouveau_gpuobj { ...@@ -151,6 +151,10 @@ struct nouveau_gpuobj {
uint32_t flags; uint32_t flags;
int refcount; int refcount;
u32 pinst;
u32 cinst;
u64 vinst;
uint32_t engine; uint32_t engine;
uint32_t class; uint32_t class;
......
...@@ -131,6 +131,23 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan, ...@@ -131,6 +131,23 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
} }
} }
/* calculate the various different addresses for the object */
if (chan) {
gpuobj->pinst = gpuobj->im_pramin->start +
chan->ramin->gpuobj->im_pramin->start;
if (dev_priv->card_type < NV_50) {
gpuobj->cinst = gpuobj->pinst;
} else {
gpuobj->cinst = gpuobj->im_pramin->start;
gpuobj->vinst = gpuobj->im_pramin->start +
chan->ramin->gpuobj->im_backing_start;
}
} else {
gpuobj->pinst = gpuobj->im_pramin->start;
gpuobj->cinst = 0xdeadbeef;
gpuobj->vinst = gpuobj->im_backing_start;
}
if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) { if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
int i; int i;
...@@ -260,19 +277,16 @@ nouveau_gpuobj_instance_get(struct drm_device *dev, ...@@ -260,19 +277,16 @@ nouveau_gpuobj_instance_get(struct drm_device *dev,
/* <NV50 use PRAMIN address everywhere */ /* <NV50 use PRAMIN address everywhere */
if (dev_priv->card_type < NV_50) { if (dev_priv->card_type < NV_50) {
*inst = gpuobj->im_pramin->start; *inst = gpuobj->im_pramin->start;
if (gpuobj->im_channel) {
cpramin = gpuobj->im_channel->ramin->gpuobj;
*inst += cpramin->im_pramin->start;
}
return 0; return 0;
} }
if (chan && gpuobj->im_channel != chan) {
NV_ERROR(dev, "Channel mismatch: obj %d, ref %d\n",
gpuobj->im_channel->id, chan->id);
return -EINVAL;
}
/* NV50 channel-local instance */ /* NV50 channel-local instance */
if (chan) { if (chan) {
cpramin = chan->ramin->gpuobj; *inst = gpuobj->im_pramin->start;
*inst = gpuobj->im_pramin->start - cpramin->im_pramin->start;
return 0; return 0;
} }
...@@ -288,8 +302,7 @@ nouveau_gpuobj_instance_get(struct drm_device *dev, ...@@ -288,8 +302,7 @@ nouveau_gpuobj_instance_get(struct drm_device *dev,
} else { } else {
/* ...from local heap */ /* ...from local heap */
cpramin = gpuobj->im_channel->ramin->gpuobj; cpramin = gpuobj->im_channel->ramin->gpuobj;
*inst = cpramin->im_backing_start + *inst = cpramin->im_backing_start + gpuobj->im_pramin->start;
(gpuobj->im_pramin->start - cpramin->im_pramin->start);
return 0; return 0;
} }
...@@ -458,6 +471,10 @@ nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset, ...@@ -458,6 +471,10 @@ nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset,
gpuobj->im_backing_start = b_offset; gpuobj->im_backing_start = b_offset;
} }
gpuobj->pinst = gpuobj->im_pramin->start;
gpuobj->cinst = 0xdeadbeef;
gpuobj->vinst = gpuobj->im_backing_start;
if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) { if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
for (i = 0; i < gpuobj->im_pramin->size; i += 4) for (i = 0; i < gpuobj->im_pramin->size; i += 4)
nv_wo32(gpuobj, i, 0); nv_wo32(gpuobj, i, 0);
...@@ -789,7 +806,7 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan) ...@@ -789,7 +806,7 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
} }
pramin = chan->ramin->gpuobj; pramin = chan->ramin->gpuobj;
ret = drm_mm_init(&chan->ramin_heap, pramin->im_pramin->start + base, size); ret = drm_mm_init(&chan->ramin_heap, base, size);
if (ret) { if (ret) {
NV_ERROR(dev, "Error creating PRAMIN heap: %d\n", ret); NV_ERROR(dev, "Error creating PRAMIN heap: %d\n", ret);
nouveau_gpuobj_ref_del(dev, &chan->ramin); nouveau_gpuobj_ref_del(dev, &chan->ramin);
...@@ -1124,13 +1141,11 @@ int nouveau_ioctl_gpuobj_free(struct drm_device *dev, void *data, ...@@ -1124,13 +1141,11 @@ int nouveau_ioctl_gpuobj_free(struct drm_device *dev, void *data,
u32 u32
nv_ro32(struct nouveau_gpuobj *gpuobj, u32 offset) nv_ro32(struct nouveau_gpuobj *gpuobj, u32 offset)
{ {
struct drm_device *dev = gpuobj->dev; return nv_ri32(gpuobj->dev, gpuobj->pinst + offset);
return nv_ri32(dev, gpuobj->im_pramin->start + offset);
} }
void void
nv_wo32(struct nouveau_gpuobj *gpuobj, u32 offset, u32 val) nv_wo32(struct nouveau_gpuobj *gpuobj, u32 offset, u32 val)
{ {
struct drm_device *dev = gpuobj->dev; nv_wi32(gpuobj->dev, gpuobj->pinst + offset, val);
nv_wi32(dev, gpuobj->im_pramin->start + offset, val);
} }
...@@ -113,8 +113,7 @@ nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan) ...@@ -113,8 +113,7 @@ nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan)
return ret; return ret;
} }
ret = drm_mm_init(&chan->ramin_heap, ret = drm_mm_init(&chan->ramin_heap, 0, 32768);
chan->ramin->gpuobj->im_pramin->start, 32768);
if (ret) { if (ret) {
NV_ERROR(dev, "Error initialising EVO PRAMIN heap: %d\n", ret); NV_ERROR(dev, "Error initialising EVO PRAMIN heap: %d\n", ret);
nv50_evo_channel_del(pchan); nv50_evo_channel_del(pchan);
......
...@@ -228,19 +228,19 @@ nv50_fifo_create_context(struct nouveau_channel *chan) ...@@ -228,19 +228,19 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
NV_DEBUG(dev, "ch%d\n", chan->id); NV_DEBUG(dev, "ch%d\n", chan->id);
if (dev_priv->chipset == 0x50) { if (dev_priv->chipset == 0x50) {
uint32_t ramin_poffset = chan->ramin->gpuobj->im_pramin->start; ret = nouveau_gpuobj_new_fake(dev, chan->ramin->gpuobj->pinst,
uint32_t ramin_voffset = chan->ramin->gpuobj->im_backing_start; chan->ramin->gpuobj->vinst, 0x100,
NVOBJ_FLAG_ZERO_ALLOC |
ret = nouveau_gpuobj_new_fake(dev, ramin_poffset, ramin_voffset,
0x100, NVOBJ_FLAG_ZERO_ALLOC |
NVOBJ_FLAG_ZERO_FREE, &ramfc, NVOBJ_FLAG_ZERO_FREE, &ramfc,
&chan->ramfc); &chan->ramfc);
if (ret) if (ret)
return ret; return ret;
ret = nouveau_gpuobj_new_fake(dev, ramin_poffset + 0x0400, ret = nouveau_gpuobj_new_fake(dev, chan->ramin->gpuobj->pinst +
ramin_voffset + 0x0400, 4096, 0x0400,
0, NULL, &chan->cache); chan->ramin->gpuobj->vinst +
0x0400, 4096, 0, NULL,
&chan->cache);
if (ret) if (ret)
return ret; return ret;
} else { } else {
......
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