Commit de7f3c4e authored by Tim Huang's avatar Tim Huang Committed by Alex Deucher

drm/amd/pm: wait for completion of the EnableGfxImu command

Wait for completion of sending the EnableGfxImu message
when using the PSP FW loading.
Signed-off-by: default avatarTim Huang <Tim.Huang@amd.com>
Reviewed-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9a37f65c
......@@ -82,6 +82,8 @@ MODULE_FIRMWARE("amdgpu/smu_13_0_10.bin");
#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000
#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE
#define ENABLE_IMU_ARG_GFXOFF_ENABLE 1
static const int link_width[] = {0, 1, 2, 4, 8, 12, 16};
const int pmfw_decoded_link_speed[5] = {1, 2, 3, 4, 5};
......@@ -2302,11 +2304,17 @@ int smu_v13_0_baco_exit(struct smu_context *smu)
int smu_v13_0_set_gfx_power_up_by_imu(struct smu_context *smu)
{
uint16_t index;
struct amdgpu_device *adev = smu->adev;
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnableGfxImu,
ENABLE_IMU_ARG_GFXOFF_ENABLE, NULL);
}
index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
SMU_MSG_EnableGfxImu);
/* Param 1 to tell PMFW to enable GFXOFF feature */
return smu_cmn_send_msg_without_waiting(smu, index, 1);
return smu_cmn_send_msg_without_waiting(smu, index,
ENABLE_IMU_ARG_GFXOFF_ENABLE);
}
int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
......
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