Commit e01f0fe3 authored by Philippe Schenker's avatar Philippe Schenker Committed by Shawn Guo

ARM: dts: imx6qdl-apalis: Add sleep state to can interfaces

This patch prepares the devicetree for the new Ixora V1.2 where we are
able to turn off the supply of the can transceiver. This implies to use
a sleep state on transmission pins in order to prevent backfeeding.
Signed-off-by: default avatarPhilippe Schenker <philippe.schenker@toradex.com>
Acked-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 3dddbfe6
...@@ -148,14 +148,16 @@ &audmux { ...@@ -148,14 +148,16 @@ &audmux {
}; };
&can1 { &can1 {
pinctrl-names = "default"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_flexcan1>; pinctrl-0 = <&pinctrl_flexcan1_default>;
pinctrl-1 = <&pinctrl_flexcan1_sleep>;
status = "disabled"; status = "disabled";
}; };
&can2 { &can2 {
pinctrl-names = "default"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_flexcan2>; pinctrl-0 = <&pinctrl_flexcan2_default>;
pinctrl-1 = <&pinctrl_flexcan2_sleep>;
status = "disabled"; status = "disabled";
}; };
...@@ -599,19 +601,32 @@ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1 ...@@ -599,19 +601,32 @@ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1
>; >;
}; };
pinctrl_flexcan1: flexcan1grp { pinctrl_flexcan1_default: flexcan1defgrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
>; >;
}; };
pinctrl_flexcan2: flexcan2grp { pinctrl_flexcan1_sleep: flexcan1slpgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0
>;
};
pinctrl_flexcan2_default: flexcan2defgrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
>; >;
}; };
pinctrl_flexcan2_sleep: flexcan2slpgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0
>;
};
pinctrl_gpio_bl_on: gpioblon { pinctrl_gpio_bl_on: gpioblon {
fsl,pins = < fsl,pins = <
......
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