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Commit e0ffbd37 authored by David S. Miller's avatar David S. Miller
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Merge branch 'ena-dynamic-queue-sizes' 

Sameeh Jubran says:

====================
Support for dynamic queue size changes

This patchset introduces the following:
* add new admin command for supporting different queue size for Tx/Rx
* add support for Tx/Rx queues size modification through ethtool
* allow queues allocation backoff when low on memory
* update driver version

Difference from v2:
* Dropped superfluous range checks which are already done in ethtool. [patch 5/7]
* Dropped inline keyword from function. [patch 4/7]
* Added a new patch which drops inline keyword all *.c files. [patch 6/7]

Difference from v1:
* Changed ena_update_queue_sizes() signature to use u32 instead of int
  type for the size arguments. [patch 5/7]
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f2dec9a2 dbbc6e68
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Showing with 403 additions and 143 deletions
drivers/net/ethernet/amazon/ena/ena_admin_defs.h
View file @ e0ffbd37
...@@ -64,6 +64,7 @@ enum ena_admin_aq_feature_id { ...@@ -64,6 +64,7 @@ enum ena_admin_aq_feature_id {
ENA_ADMIN_LLQ = 4, ENA_ADMIN_LLQ = 4,
ENA_ADMIN_EXTRA_PROPERTIES_STRINGS = 5, ENA_ADMIN_EXTRA_PROPERTIES_STRINGS = 5,
ENA_ADMIN_EXTRA_PROPERTIES_FLAGS = 6, ENA_ADMIN_EXTRA_PROPERTIES_FLAGS = 6,
ENA_ADMIN_MAX_QUEUES_EXT = 7,
ENA_ADMIN_RSS_HASH_FUNCTION = 10, ENA_ADMIN_RSS_HASH_FUNCTION = 10,
ENA_ADMIN_STATELESS_OFFLOAD_CONFIG = 11, ENA_ADMIN_STATELESS_OFFLOAD_CONFIG = 11,
ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG = 12, ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG = 12,
...@@ -425,7 +426,13 @@ struct ena_admin_get_set_feature_common_desc { ...@@ -425,7 +426,13 @@ struct ena_admin_get_set_feature_common_desc {
/* as appears in ena_admin_aq_feature_id */ /* as appears in ena_admin_aq_feature_id */
u8 feature_id; u8 feature_id;
u16 reserved16; /* The driver specifies the max feature version it supports and the
* device responds with the currently supported feature version. The
* field is zero based
*/
u8 feature_version;
u8 reserved8;
}; };
struct ena_admin_device_attr_feature_desc { struct ena_admin_device_attr_feature_desc {
...@@ -535,6 +542,34 @@ struct ena_admin_feature_llq_desc { ...@@ -535,6 +542,34 @@ struct ena_admin_feature_llq_desc {
u32 max_tx_burst_size; u32 max_tx_burst_size;
}; };
struct ena_admin_queue_ext_feature_fields {
u32 max_tx_sq_num;
u32 max_tx_cq_num;
u32 max_rx_sq_num;
u32 max_rx_cq_num;
u32 max_tx_sq_depth;
u32 max_tx_cq_depth;
u32 max_rx_sq_depth;
u32 max_rx_cq_depth;
u32 max_tx_header_size;
/* Maximum Descriptors number, including meta descriptor, allowed for
* a single Tx packet
*/
u16 max_per_packet_tx_descs;
/* Maximum Descriptors number allowed for a single Rx packet */
u16 max_per_packet_rx_descs;
};
struct ena_admin_queue_feature_desc { struct ena_admin_queue_feature_desc {
u32 max_sq_num; u32 max_sq_num;
...@@ -849,6 +884,19 @@ struct ena_admin_get_feat_cmd { ...@@ -849,6 +884,19 @@ struct ena_admin_get_feat_cmd {
u32 raw[11]; u32 raw[11];
}; };
struct ena_admin_queue_ext_feature_desc {
/* version */
u8 version;
u8 reserved1[3];
union {
struct ena_admin_queue_ext_feature_fields max_queue_ext;
u32 raw[10];
};
};
struct ena_admin_get_feat_resp { struct ena_admin_get_feat_resp {
struct ena_admin_acq_common_desc acq_common_desc; struct ena_admin_acq_common_desc acq_common_desc;
...@@ -861,6 +909,8 @@ struct ena_admin_get_feat_resp { ...@@ -861,6 +909,8 @@ struct ena_admin_get_feat_resp {
struct ena_admin_queue_feature_desc max_queue; struct ena_admin_queue_feature_desc max_queue;
struct ena_admin_queue_ext_feature_desc max_queue_ext;
struct ena_admin_feature_aenq_desc aenq; struct ena_admin_feature_aenq_desc aenq;
struct ena_admin_get_feature_link_desc link; struct ena_admin_get_feature_link_desc link;
...@@ -929,7 +979,9 @@ struct ena_admin_aenq_common_desc { ...@@ -929,7 +979,9 @@ struct ena_admin_aenq_common_desc {
u16 syndrom; u16 syndrom;
/* 0 : phase */ /* 0 : phase
* 7:1 : reserved - MBZ
*/
u8 flags; u8 flags;
u8 reserved1[3]; u8 reserved1[3];
......
drivers/net/ethernet/amazon/ena/ena_com.c
View file @ e0ffbd37
...@@ -91,7 +91,7 @@ struct ena_com_stats_ctx { ...@@ -91,7 +91,7 @@ struct ena_com_stats_ctx {
struct ena_admin_acq_get_stats_resp get_resp; struct ena_admin_acq_get_stats_resp get_resp;
}; };
static inline int ena_com_mem_addr_set(struct ena_com_dev *ena_dev, static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,
struct ena_common_mem_addr *ena_addr, struct ena_common_mem_addr *ena_addr,
dma_addr_t addr) dma_addr_t addr)
{ {
...@@ -190,7 +190,7 @@ static int ena_com_admin_init_aenq(struct ena_com_dev *dev, ...@@ -190,7 +190,7 @@ static int ena_com_admin_init_aenq(struct ena_com_dev *dev,
return 0; return 0;
} }
static inline void comp_ctxt_release(struct ena_com_admin_queue *queue, static void comp_ctxt_release(struct ena_com_admin_queue *queue,
struct ena_comp_ctx *comp_ctx) struct ena_comp_ctx *comp_ctx)
{ {
comp_ctx->occupied = false; comp_ctx->occupied = false;
...@@ -277,7 +277,7 @@ static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queu ...@@ -277,7 +277,7 @@ static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queu
return comp_ctx; return comp_ctx;
} }
static inline int ena_com_init_comp_ctxt(struct ena_com_admin_queue *queue) static int ena_com_init_comp_ctxt(struct ena_com_admin_queue *queue)
{ {
size_t size = queue->q_depth * sizeof(struct ena_comp_ctx); size_t size = queue->q_depth * sizeof(struct ena_comp_ctx);
struct ena_comp_ctx *comp_ctx; struct ena_comp_ctx *comp_ctx;
...@@ -978,7 +978,8 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, ...@@ -978,7 +978,8 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev,
struct ena_admin_get_feat_resp *get_resp, struct ena_admin_get_feat_resp *get_resp,
enum ena_admin_aq_feature_id feature_id, enum ena_admin_aq_feature_id feature_id,
dma_addr_t control_buf_dma_addr, dma_addr_t control_buf_dma_addr,
u32 control_buff_size) u32 control_buff_size,
u8 feature_ver)
{ {
struct ena_com_admin_queue *admin_queue; struct ena_com_admin_queue *admin_queue;
struct ena_admin_get_feat_cmd get_cmd; struct ena_admin_get_feat_cmd get_cmd;
...@@ -1009,7 +1010,7 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, ...@@ -1009,7 +1010,7 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev,
} }
get_cmd.control_buffer.length = control_buff_size; get_cmd.control_buffer.length = control_buff_size;
get_cmd.feat_common.feature_version = feature_ver;
get_cmd.feat_common.feature_id = feature_id; get_cmd.feat_common.feature_id = feature_id;
ret = ena_com_execute_admin_command(admin_queue, ret = ena_com_execute_admin_command(admin_queue,
...@@ -1029,13 +1030,15 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, ...@@ -1029,13 +1030,15 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev,
static int ena_com_get_feature(struct ena_com_dev *ena_dev, static int ena_com_get_feature(struct ena_com_dev *ena_dev,
struct ena_admin_get_feat_resp *get_resp, struct ena_admin_get_feat_resp *get_resp,
enum ena_admin_aq_feature_id feature_id) enum ena_admin_aq_feature_id feature_id,
u8 feature_ver)
{ {
return ena_com_get_feature_ex(ena_dev, return ena_com_get_feature_ex(ena_dev,
get_resp, get_resp,
feature_id, feature_id,
0, 0,
0); 0,
feature_ver);
} }
static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev) static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev)
...@@ -1095,7 +1098,7 @@ static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev, ...@@ -1095,7 +1098,7 @@ static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev,
int ret; int ret;
ret = ena_com_get_feature(ena_dev, &get_resp, ret = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG); ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG, 0);
if (unlikely(ret)) if (unlikely(ret))
return ret; return ret;
...@@ -1515,7 +1518,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) ...@@ -1515,7 +1518,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag)
struct ena_admin_get_feat_resp get_resp; struct ena_admin_get_feat_resp get_resp;
int ret; int ret;
ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG); ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG, 0);
if (ret) { if (ret) {
pr_info("Can't get aenq configuration\n"); pr_info("Can't get aenq configuration\n");
return ret; return ret;
...@@ -1890,7 +1893,7 @@ void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid) ...@@ -1890,7 +1893,7 @@ void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid)
int ena_com_get_link_params(struct ena_com_dev *ena_dev, int ena_com_get_link_params(struct ena_com_dev *ena_dev,
struct ena_admin_get_feat_resp *resp) struct ena_admin_get_feat_resp *resp)
{ {
return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG); return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0);
} }
int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev) int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev)
...@@ -1916,7 +1919,7 @@ int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev) ...@@ -1916,7 +1919,7 @@ int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev)
rc = ena_com_get_feature_ex(ena_dev, &resp, rc = ena_com_get_feature_ex(ena_dev, &resp,
ENA_ADMIN_EXTRA_PROPERTIES_STRINGS, ENA_ADMIN_EXTRA_PROPERTIES_STRINGS,
extra_properties_strings->dma_addr, extra_properties_strings->dma_addr,
extra_properties_strings->size); extra_properties_strings->size, 0);
if (rc) { if (rc) {
pr_debug("Failed to get extra properties strings\n"); pr_debug("Failed to get extra properties strings\n");
goto err; goto err;
...@@ -1946,7 +1949,7 @@ int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev, ...@@ -1946,7 +1949,7 @@ int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev,
struct ena_admin_get_feat_resp *resp) struct ena_admin_get_feat_resp *resp)
{ {
return ena_com_get_feature(ena_dev, resp, return ena_com_get_feature(ena_dev, resp,
ENA_ADMIN_EXTRA_PROPERTIES_FLAGS); ENA_ADMIN_EXTRA_PROPERTIES_FLAGS, 0);
} }
int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
...@@ -1956,7 +1959,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, ...@@ -1956,7 +1959,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
int rc; int rc;
rc = ena_com_get_feature(ena_dev, &get_resp, rc = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_DEVICE_ATTRIBUTES); ENA_ADMIN_DEVICE_ATTRIBUTES, 0);
if (rc) if (rc)
return rc; return rc;
...@@ -1964,17 +1967,34 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, ...@@ -1964,17 +1967,34 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
sizeof(get_resp.u.dev_attr)); sizeof(get_resp.u.dev_attr));
ena_dev->supported_features = get_resp.u.dev_attr.supported_features; ena_dev->supported_features = get_resp.u.dev_attr.supported_features;
rc = ena_com_get_feature(ena_dev, &get_resp, if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
ENA_ADMIN_MAX_QUEUES_NUM); rc = ena_com_get_feature(ena_dev, &get_resp,
if (rc) ENA_ADMIN_MAX_QUEUES_EXT,
return rc; ENA_FEATURE_MAX_QUEUE_EXT_VER);
if (rc)
return rc;
memcpy(&get_feat_ctx->max_queues, &get_resp.u.max_queue, if (get_resp.u.max_queue_ext.version != ENA_FEATURE_MAX_QUEUE_EXT_VER)
sizeof(get_resp.u.max_queue)); return -EINVAL;
ena_dev->tx_max_header_size = get_resp.u.max_queue.max_header_size;
memcpy(&get_feat_ctx->max_queue_ext, &get_resp.u.max_queue_ext,
sizeof(get_resp.u.max_queue_ext));
ena_dev->tx_max_header_size =
get_resp.u.max_queue_ext.max_queue_ext.max_tx_header_size;
} else {
rc = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_MAX_QUEUES_NUM, 0);
memcpy(&get_feat_ctx->max_queues, &get_resp.u.max_queue,
sizeof(get_resp.u.max_queue));
ena_dev->tx_max_header_size =
get_resp.u.max_queue.max_header_size;
if (rc)
return rc;
}
rc = ena_com_get_feature(ena_dev, &get_resp, rc = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_AENQ_CONFIG); ENA_ADMIN_AENQ_CONFIG, 0);
if (rc) if (rc)
return rc; return rc;
...@@ -1982,7 +2002,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, ...@@ -1982,7 +2002,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
sizeof(get_resp.u.aenq)); sizeof(get_resp.u.aenq));
rc = ena_com_get_feature(ena_dev, &get_resp, rc = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_STATELESS_OFFLOAD_CONFIG); ENA_ADMIN_STATELESS_OFFLOAD_CONFIG, 0);
if (rc) if (rc)
return rc; return rc;
...@@ -1992,7 +2012,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, ...@@ -1992,7 +2012,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
/* Driver hints isn't mandatory admin command. So in case the /* Driver hints isn't mandatory admin command. So in case the
* command isn't supported set driver hints to 0 * command isn't supported set driver hints to 0
*/ */
rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS); rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS, 0);
if (!rc) if (!rc)
memcpy(&get_feat_ctx->hw_hints, &get_resp.u.hw_hints, memcpy(&get_feat_ctx->hw_hints, &get_resp.u.hw_hints,
...@@ -2003,7 +2023,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, ...@@ -2003,7 +2023,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
else else
return rc; return rc;
rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ); rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ, 0);
if (!rc) if (!rc)
memcpy(&get_feat_ctx->llq, &get_resp.u.llq, memcpy(&get_feat_ctx->llq, &get_resp.u.llq,
sizeof(get_resp.u.llq)); sizeof(get_resp.u.llq));
...@@ -2240,7 +2260,7 @@ int ena_com_get_offload_settings(struct ena_com_dev *ena_dev, ...@@ -2240,7 +2260,7 @@ int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
struct ena_admin_get_feat_resp resp; struct ena_admin_get_feat_resp resp;
ret = ena_com_get_feature(ena_dev, &resp, ret = ena_com_get_feature(ena_dev, &resp,
ENA_ADMIN_STATELESS_OFFLOAD_CONFIG); ENA_ADMIN_STATELESS_OFFLOAD_CONFIG, 0);
if (unlikely(ret)) { if (unlikely(ret)) {
pr_err("Failed to get offload capabilities %d\n", ret); pr_err("Failed to get offload capabilities %d\n", ret);
return ret; return ret;
...@@ -2269,7 +2289,7 @@ int ena_com_set_hash_function(struct ena_com_dev *ena_dev) ...@@ -2269,7 +2289,7 @@ int ena_com_set_hash_function(struct ena_com_dev *ena_dev)
/* Validate hash function is supported */ /* Validate hash function is supported */
ret = ena_com_get_feature(ena_dev, &get_resp, ret = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_RSS_HASH_FUNCTION); ENA_ADMIN_RSS_HASH_FUNCTION, 0);
if (unlikely(ret)) if (unlikely(ret))
return ret; return ret;
...@@ -2329,7 +2349,7 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev, ...@@ -2329,7 +2349,7 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
rc = ena_com_get_feature_ex(ena_dev, &get_resp, rc = ena_com_get_feature_ex(ena_dev, &get_resp,
ENA_ADMIN_RSS_HASH_FUNCTION, ENA_ADMIN_RSS_HASH_FUNCTION,
rss->hash_key_dma_addr, rss->hash_key_dma_addr,
sizeof(*rss->hash_key)); sizeof(*rss->hash_key), 0);
if (unlikely(rc)) if (unlikely(rc))
return rc; return rc;
...@@ -2381,7 +2401,7 @@ int ena_com_get_hash_function(struct ena_com_dev *ena_dev, ...@@ -2381,7 +2401,7 @@ int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
rc = ena_com_get_feature_ex(ena_dev, &get_resp, rc = ena_com_get_feature_ex(ena_dev, &get_resp,
ENA_ADMIN_RSS_HASH_FUNCTION, ENA_ADMIN_RSS_HASH_FUNCTION,
rss->hash_key_dma_addr, rss->hash_key_dma_addr,
sizeof(*rss->hash_key)); sizeof(*rss->hash_key), 0);
if (unlikely(rc)) if (unlikely(rc))
return rc; return rc;
...@@ -2406,7 +2426,7 @@ int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev, ...@@ -2406,7 +2426,7 @@ int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
rc = ena_com_get_feature_ex(ena_dev, &get_resp, rc = ena_com_get_feature_ex(ena_dev, &get_resp,
ENA_ADMIN_RSS_HASH_INPUT, ENA_ADMIN_RSS_HASH_INPUT,
rss->hash_ctrl_dma_addr, rss->hash_ctrl_dma_addr,
sizeof(*rss->hash_ctrl)); sizeof(*rss->hash_ctrl), 0);
if (unlikely(rc)) if (unlikely(rc))
return rc; return rc;
...@@ -2642,7 +2662,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) ...@@ -2642,7 +2662,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl)
rc = ena_com_get_feature_ex(ena_dev, &get_resp, rc = ena_com_get_feature_ex(ena_dev, &get_resp,
ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG, ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG,
rss->rss_ind_tbl_dma_addr, rss->rss_ind_tbl_dma_addr,
tbl_size); tbl_size, 0);
if (unlikely(rc)) if (unlikely(rc))
return rc; return rc;
...@@ -2857,7 +2877,7 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev) ...@@ -2857,7 +2877,7 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)
int rc; int rc;
rc = ena_com_get_feature(ena_dev, &get_resp, rc = ena_com_get_feature(ena_dev, &get_resp,
ENA_ADMIN_INTERRUPT_MODERATION); ENA_ADMIN_INTERRUPT_MODERATION, 0);
if (rc) { if (rc) {
if (rc == -EOPNOTSUPP) { if (rc == -EOPNOTSUPP) {
......
drivers/net/ethernet/amazon/ena/ena_com.h
View file @ e0ffbd37
...@@ -101,6 +101,8 @@ ...@@ -101,6 +101,8 @@
#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
enum ena_intr_moder_level { enum ena_intr_moder_level {
ENA_INTR_MODER_LOWEST = 0, ENA_INTR_MODER_LOWEST = 0,
ENA_INTR_MODER_LOW, ENA_INTR_MODER_LOW,
...@@ -389,6 +391,7 @@ struct ena_com_dev { ...@@ -389,6 +391,7 @@ struct ena_com_dev {
struct ena_com_dev_get_features_ctx { struct ena_com_dev_get_features_ctx {
struct ena_admin_queue_feature_desc max_queues; struct ena_admin_queue_feature_desc max_queues;
struct ena_admin_queue_ext_feature_desc max_queue_ext;
struct ena_admin_device_attr_feature_desc dev_attr; struct ena_admin_device_attr_feature_desc dev_attr;
struct ena_admin_feature_aenq_desc aenq; struct ena_admin_feature_aenq_desc aenq;
struct ena_admin_feature_offload_desc offload; struct ena_admin_feature_offload_desc offload;
......
drivers/net/ethernet/amazon/ena/ena_eth_com.c
View file @ e0ffbd37
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#include "ena_eth_com.h" #include "ena_eth_com.h"
static inline struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc( static struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(
struct ena_com_io_cq *io_cq) struct ena_com_io_cq *io_cq)
{ {
struct ena_eth_io_rx_cdesc_base *cdesc; struct ena_eth_io_rx_cdesc_base *cdesc;
...@@ -59,7 +59,7 @@ static inline struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc( ...@@ -59,7 +59,7 @@ static inline struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(
return cdesc; return cdesc;
} }
static inline void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq) static void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq)
{ {
u16 tail_masked; u16 tail_masked;
u32 offset; u32 offset;
...@@ -71,7 +71,7 @@ static inline void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq) ...@@ -71,7 +71,7 @@ static inline void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq)
return (void *)((uintptr_t)io_sq->desc_addr.virt_addr + offset); return (void *)((uintptr_t)io_sq->desc_addr.virt_addr + offset);
} }
static inline int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq, static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq,
u8 *bounce_buffer) u8 *bounce_buffer)
{ {
struct ena_com_llq_info *llq_info = &io_sq->llq_info; struct ena_com_llq_info *llq_info = &io_sq->llq_info;
...@@ -111,7 +111,7 @@ static inline int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq ...@@ -111,7 +111,7 @@ static inline int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq
return 0; return 0;
} }
static inline int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq, static int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq,
u8 *header_src, u8 *header_src,
u16 header_len) u16 header_len)
{ {
...@@ -142,7 +142,7 @@ static inline int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq, ...@@ -142,7 +142,7 @@ static inline int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq,
return 0; return 0;
} }
static inline void *get_sq_desc_llq(struct ena_com_io_sq *io_sq) static void *get_sq_desc_llq(struct ena_com_io_sq *io_sq)
{ {
struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl; struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;
u8 *bounce_buffer; u8 *bounce_buffer;
...@@ -162,7 +162,7 @@ static inline void *get_sq_desc_llq(struct ena_com_io_sq *io_sq) ...@@ -162,7 +162,7 @@ static inline void *get_sq_desc_llq(struct ena_com_io_sq *io_sq)
return sq_desc; return sq_desc;
} }
static inline int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq) static int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)
{ {
struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl; struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;
struct ena_com_llq_info *llq_info = &io_sq->llq_info; struct ena_com_llq_info *llq_info = &io_sq->llq_info;
...@@ -189,7 +189,7 @@ static inline int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq) ...@@ -189,7 +189,7 @@ static inline int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)
return 0; return 0;
} }
static inline void *get_sq_desc(struct ena_com_io_sq *io_sq) static void *get_sq_desc(struct ena_com_io_sq *io_sq)
{ {
if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
return get_sq_desc_llq(io_sq); return get_sq_desc_llq(io_sq);
...@@ -197,7 +197,7 @@ static inline void *get_sq_desc(struct ena_com_io_sq *io_sq) ...@@ -197,7 +197,7 @@ static inline void *get_sq_desc(struct ena_com_io_sq *io_sq)
return get_sq_desc_regular_queue(io_sq); return get_sq_desc_regular_queue(io_sq);
} }
static inline int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq) static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)
{ {
struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl; struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;
struct ena_com_llq_info *llq_info = &io_sq->llq_info; struct ena_com_llq_info *llq_info = &io_sq->llq_info;
...@@ -225,7 +225,7 @@ static inline int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq) ...@@ -225,7 +225,7 @@ static inline int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)
return 0; return 0;
} }
static inline int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq)
{ {
if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
return ena_com_sq_update_llq_tail(io_sq); return ena_com_sq_update_llq_tail(io_sq);
...@@ -239,7 +239,7 @@ static inline int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) ...@@ -239,7 +239,7 @@ static inline int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq)
return 0; return 0;
} }
static inline struct ena_eth_io_rx_cdesc_base * static struct ena_eth_io_rx_cdesc_base *
ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx) ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)
{ {
idx &= (io_cq->q_depth - 1); idx &= (io_cq->q_depth - 1);
...@@ -248,7 +248,7 @@ static inline struct ena_eth_io_rx_cdesc_base * ...@@ -248,7 +248,7 @@ static inline struct ena_eth_io_rx_cdesc_base *
idx * io_cq->cdesc_entry_size_in_bytes); idx * io_cq->cdesc_entry_size_in_bytes);
} }
static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, static u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
u16 *first_cdesc_idx) u16 *first_cdesc_idx)
{ {
struct ena_eth_io_rx_cdesc_base *cdesc; struct ena_eth_io_rx_cdesc_base *cdesc;
...@@ -285,7 +285,7 @@ static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, ...@@ -285,7 +285,7 @@ static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
return count; return count;
} }
static inline int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq, static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
struct ena_com_tx_ctx *ena_tx_ctx) struct ena_com_tx_ctx *ena_tx_ctx)
{ {
struct ena_eth_io_tx_meta_desc *meta_desc = NULL; struct ena_eth_io_tx_meta_desc *meta_desc = NULL;
...@@ -334,7 +334,7 @@ static inline int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io ...@@ -334,7 +334,7 @@ static inline int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io
return ena_com_sq_update_tail(io_sq); return ena_com_sq_update_tail(io_sq);
} }
static inline void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx, static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
struct ena_eth_io_rx_cdesc_base *cdesc) struct ena_eth_io_rx_cdesc_base *cdesc)
{ {
ena_rx_ctx->l3_proto = cdesc->status & ena_rx_ctx->l3_proto = cdesc->status &
......
drivers/net/ethernet/amazon/ena/ena_ethtool.c
View file @ e0ffbd37
...@@ -486,13 +486,32 @@ static void ena_get_ringparam(struct net_device *netdev, ...@@ -486,13 +486,32 @@ static void ena_get_ringparam(struct net_device *netdev,
struct ethtool_ringparam *ring) struct ethtool_ringparam *ring)
{ {
struct ena_adapter *adapter = netdev_priv(netdev); struct ena_adapter *adapter = netdev_priv(netdev);
struct ena_ring *tx_ring = &adapter->tx_ring[0];
struct ena_ring *rx_ring = &adapter->rx_ring[0];
ring->rx_max_pending = rx_ring->ring_size; ring->tx_max_pending = adapter->max_tx_ring_size;
ring->tx_max_pending = tx_ring->ring_size; ring->rx_max_pending = adapter->max_rx_ring_size;
ring->rx_pending = rx_ring->ring_size; ring->tx_pending = adapter->tx_ring[0].ring_size;
ring->tx_pending = tx_ring->ring_size; ring->rx_pending = adapter->rx_ring[0].ring_size;
}
static int ena_set_ringparam(struct net_device *netdev,
struct ethtool_ringparam *ring)
{
struct ena_adapter *adapter = netdev_priv(netdev);
u32 new_tx_size, new_rx_size;
new_tx_size = ring->tx_pending < ENA_MIN_RING_SIZE ?
ENA_MIN_RING_SIZE : ring->tx_pending;
new_tx_size = rounddown_pow_of_two(new_tx_size);
new_rx_size = ring->rx_pending < ENA_MIN_RING_SIZE ?
ENA_MIN_RING_SIZE : ring->rx_pending;
new_rx_size = rounddown_pow_of_two(new_rx_size);
if (new_tx_size == adapter->requested_tx_ring_size &&
new_rx_size == adapter->requested_rx_ring_size)
return 0;
return ena_update_queue_sizes(adapter, new_tx_size, new_rx_size);
} }
static u32 ena_flow_hash_to_flow_type(u16 hash_fields) static u32 ena_flow_hash_to_flow_type(u16 hash_fields)
...@@ -860,6 +879,7 @@ static const struct ethtool_ops ena_ethtool_ops = { ...@@ -860,6 +879,7 @@ static const struct ethtool_ops ena_ethtool_ops = {
.get_coalesce = ena_get_coalesce, .get_coalesce = ena_get_coalesce,
.set_coalesce = ena_set_coalesce, .set_coalesce = ena_set_coalesce,
.get_ringparam = ena_get_ringparam, .get_ringparam = ena_get_ringparam,
.set_ringparam = ena_set_ringparam,
.get_sset_count = ena_get_sset_count, .get_sset_count = ena_get_sset_count,
.get_strings = ena_get_strings, .get_strings = ena_get_strings,
.get_ethtool_stats = ena_get_ethtool_stats, .get_ethtool_stats = ena_get_ethtool_stats,
......
drivers/net/ethernet/amazon/ena/ena_netdev.h
View file @ e0ffbd37
...@@ -44,8 +44,8 @@ ...@@ -44,8 +44,8 @@
#include "ena_eth_com.h" #include "ena_eth_com.h"
#define DRV_MODULE_VER_MAJOR 2 #define DRV_MODULE_VER_MAJOR 2
#define DRV_MODULE_VER_MINOR 0 #define DRV_MODULE_VER_MINOR 1
#define DRV_MODULE_VER_SUBMINOR 3 #define DRV_MODULE_VER_SUBMINOR 0
#define DRV_MODULE_NAME "ena" #define DRV_MODULE_NAME "ena"
#ifndef DRV_MODULE_VERSION #ifndef DRV_MODULE_VERSION
...@@ -79,6 +79,7 @@ ...@@ -79,6 +79,7 @@
#define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR)) #define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))
#define ENA_DEFAULT_RING_SIZE (1024) #define ENA_DEFAULT_RING_SIZE (1024)
#define ENA_MIN_RING_SIZE (256)
#define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2) #define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2)
#define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN) #define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN)
...@@ -154,6 +155,18 @@ struct ena_napi { ...@@ -154,6 +155,18 @@ struct ena_napi {
u32 qid; u32 qid;
}; };
struct ena_calc_queue_size_ctx {
struct ena_com_dev_get_features_ctx *get_feat_ctx;
struct ena_com_dev *ena_dev;
struct pci_dev *pdev;
u16 tx_queue_size;
u16 rx_queue_size;
u16 max_tx_queue_size;
u16 max_rx_queue_size;
u16 max_tx_sgl_size;
u16 max_rx_sgl_size;
};
struct ena_tx_buffer { struct ena_tx_buffer {
struct sk_buff *skb; struct sk_buff *skb;
/* num of ena desc for this specific skb /* num of ena desc for this specific skb
...@@ -319,8 +332,11 @@ struct ena_adapter { ...@@ -319,8 +332,11 @@ struct ena_adapter {
u32 tx_usecs, rx_usecs; /* interrupt moderation */ u32 tx_usecs, rx_usecs; /* interrupt moderation */
u32 tx_frames, rx_frames; /* interrupt moderation */ u32 tx_frames, rx_frames; /* interrupt moderation */
u32 tx_ring_size; u32 requested_tx_ring_size;
u32 rx_ring_size; u32 requested_rx_ring_size;
u32 max_tx_ring_size;
u32 max_rx_ring_size;
u32 msg_enable; u32 msg_enable;
...@@ -372,6 +388,10 @@ void ena_dump_stats_to_dmesg(struct ena_adapter *adapter); ...@@ -372,6 +388,10 @@ void ena_dump_stats_to_dmesg(struct ena_adapter *adapter);
void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf); void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);
int ena_update_queue_sizes(struct ena_adapter *adapter,
u32 new_tx_size,
u32 new_rx_size);
int ena_get_sset_count(struct net_device *netdev, int sset); int ena_get_sset_count(struct net_device *netdev, int sset);
#endif /* !(ENA_H) */ #endif /* !(ENA_H) */
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