Commit e10f4019 authored by Shinas Rasheed's avatar Shinas Rasheed Committed by David S. Miller

octeon_ep: assert hardware structure sizes

Clean up structure defines related to hardware data to be
asserted to fixed sizes, as padding is not allowed
by hardware.
Signed-off-by: default avatarShinas Rasheed <srasheed@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a792197f
...@@ -20,6 +20,7 @@ struct octep_oq_desc_hw { ...@@ -20,6 +20,7 @@ struct octep_oq_desc_hw {
dma_addr_t buffer_ptr; dma_addr_t buffer_ptr;
u64 info_ptr; u64 info_ptr;
}; };
static_assert(sizeof(struct octep_oq_desc_hw) == 16);
#define OCTEP_OQ_DESC_SIZE (sizeof(struct octep_oq_desc_hw)) #define OCTEP_OQ_DESC_SIZE (sizeof(struct octep_oq_desc_hw))
...@@ -39,6 +40,7 @@ struct octep_oq_resp_hw_ext { ...@@ -39,6 +40,7 @@ struct octep_oq_resp_hw_ext {
/* checksum verified. */ /* checksum verified. */
u64 csum_verified:2; u64 csum_verified:2;
}; };
static_assert(sizeof(struct octep_oq_resp_hw_ext) == 8);
#define OCTEP_OQ_RESP_HW_EXT_SIZE (sizeof(struct octep_oq_resp_hw_ext)) #define OCTEP_OQ_RESP_HW_EXT_SIZE (sizeof(struct octep_oq_resp_hw_ext))
...@@ -50,6 +52,7 @@ struct octep_oq_resp_hw { ...@@ -50,6 +52,7 @@ struct octep_oq_resp_hw {
/* The Length of the packet. */ /* The Length of the packet. */
__be64 length; __be64 length;
}; };
static_assert(sizeof(struct octep_oq_resp_hw) == 8);
#define OCTEP_OQ_RESP_HW_SIZE (sizeof(struct octep_oq_resp_hw)) #define OCTEP_OQ_RESP_HW_SIZE (sizeof(struct octep_oq_resp_hw))
......
...@@ -36,6 +36,7 @@ struct octep_tx_sglist_desc { ...@@ -36,6 +36,7 @@ struct octep_tx_sglist_desc {
u16 len[4]; u16 len[4];
dma_addr_t dma_ptr[4]; dma_addr_t dma_ptr[4];
}; };
static_assert(sizeof(struct octep_tx_sglist_desc) == 40);
/* Each Scatter/Gather entry sent to hardwar hold four pointers. /* Each Scatter/Gather entry sent to hardwar hold four pointers.
* So, number of entries required is (MAX_SKB_FRAGS + 1)/4, where '+1' * So, number of entries required is (MAX_SKB_FRAGS + 1)/4, where '+1'
...@@ -239,6 +240,7 @@ struct octep_instr_hdr { ...@@ -239,6 +240,7 @@ struct octep_instr_hdr {
/* Reserved3 */ /* Reserved3 */
u64 reserved3:1; u64 reserved3:1;
}; };
static_assert(sizeof(struct octep_instr_hdr) == 8);
/* Hardware Tx completion response header */ /* Hardware Tx completion response header */
struct octep_instr_resp_hdr { struct octep_instr_resp_hdr {
...@@ -263,6 +265,7 @@ struct octep_instr_resp_hdr { ...@@ -263,6 +265,7 @@ struct octep_instr_resp_hdr {
/* Opcode for the return packet */ /* Opcode for the return packet */
u64 opcode:16; u64 opcode:16;
}; };
static_assert(sizeof(struct octep_instr_hdr) == 8);
/* 64-byte Tx instruction format. /* 64-byte Tx instruction format.
* Format of instruction for a 64-byte mode input queue. * Format of instruction for a 64-byte mode input queue.
...@@ -293,6 +296,7 @@ struct octep_tx_desc_hw { ...@@ -293,6 +296,7 @@ struct octep_tx_desc_hw {
/* Additional headers available in a 64-byte instruction. */ /* Additional headers available in a 64-byte instruction. */
u64 exhdr[4]; u64 exhdr[4];
}; };
static_assert(sizeof(struct octep_tx_desc_hw) == 64);
#define OCTEP_IQ_DESC_SIZE (sizeof(struct octep_tx_desc_hw)) #define OCTEP_IQ_DESC_SIZE (sizeof(struct octep_tx_desc_hw))
#endif /* _OCTEP_TX_H_ */ #endif /* _OCTEP_TX_H_ */
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