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Kirill Smelkov
linux
Commits
e143132a
Commit
e143132a
authored
Nov 14, 2017
by
Vinod Koul
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Merge branch 'topic/doc' into for-linus
parents
76a0370a
c2cbd427
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include/linux/dmaengine.h
include/linux/dmaengine.h
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include/linux/dmaengine.h
View file @
e143132a
...
...
@@ -329,7 +329,7 @@ enum dma_slave_buswidth {
* @src_addr_width: this is the width in bytes of the source (RX)
* register where DMA data shall be read. If the source
* is memory this may be ignored depending on architecture.
* Legal values: 1, 2,
4, 8
.
* Legal values: 1, 2,
3, 4, 8, 16, 32, 64
.
* @dst_addr_width: same as src_addr_width but for destination
* target (TX) mutatis mutandis.
* @src_maxburst: the maximum number of words (note: words, as in
...
...
@@ -404,14 +404,16 @@ enum dma_residue_granularity {
DMA_RESIDUE_GRANULARITY_BURST
=
2
,
};
/* struct dma_slave_caps - expose capabilities of a slave channel only
*
* @src_addr_widths: bit mask of src addr widths the channel supports
* @dst_addr_widths: bit mask of dstn addr widths the channel supports
* @directions: bit mask of slave direction the channel supported
* since the enum dma_transfer_direction is not defined as bits for each
* type of direction, the dma controller should fill (1 << <TYPE>) and same
* should be checked by controller as well
/**
* struct dma_slave_caps - expose capabilities of a slave channel only
* @src_addr_widths: bit mask of src addr widths the channel supports.
* Width is specified in bytes, e.g. for a channel supporting
* a width of 4 the mask should have BIT(4) set.
* @dst_addr_widths: bit mask of dst addr widths the channel supports
* @directions: bit mask of slave directions the channel supports.
* Since the enum dma_transfer_direction is not defined as bit flag for
* each type, the dma controller should set BIT(<TYPE>) and same
* should be checked by controller as well
* @max_burst: max burst capability per-transfer
* @cmd_pause: true, if pause and thereby resume is supported
* @cmd_terminate: true, if terminate cmd is supported
...
...
@@ -678,11 +680,13 @@ struct dma_filter {
* @dev_id: unique device ID
* @dev: struct device reference for dma mapping api
* @src_addr_widths: bit mask of src addr widths the device supports
* Width is specified in bytes, e.g. for a device supporting
* a width of 4 the mask should have BIT(4) set.
* @dst_addr_widths: bit mask of dst addr widths the device supports
* @directions: bit mask of slave direction
the device supports since
*
the enum dma_transfer_direction is not defined as bits
for
*
each type of direction, the dma controller should fill (1 <<
*
<TYPE>) and same
should be checked by controller as well
* @directions: bit mask of slave direction
s the device supports.
*
Since the enum dma_transfer_direction is not defined as bit flag
for
*
each type, the dma controller should set BIT(<TYPE>) and same
*
should be checked by controller as well
* @max_burst: max burst capability per-transfer
* @residue_granularity: granularity of the transfer residue reported
* by tx_status
...
...
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