Commit e1b489d2 authored by Dave Airlie's avatar Dave Airlie

Merge tag 'omapdrm-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next

omapdrm changes for 4.12

Main changes include:

* Add support for render nodes.
* Refactor omapdss code to allow multiple DISPC implementations. This is pre-work for DSS6 support.
* Fix replication logic bug, which caused RGB565 fb to be shown too dark on a 24bit display.
* Improve detection of display stack readiness, which should remove the probe order issues.
* Link panel-dpi with its backlight, so that they are turned on/off in sync.
* Fix possibly incorrect setup of sync and data-enable signals.
* Get rid of DRM_OMAP_NUM_CRTCS config option.

* tag 'omapdrm-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (34 commits)
  drm/omap: Major omap_modeset_init() cleanup
  drm/omap: Remove the obsolete #define omap_plane _omap_plane hack
  drm/omap: Fix one ugly indentation style break left by coccinelle
  drm/omap: Rename enum omap_plane to enum omap_plane_id
  drm/omap: Get rid of DRM_OMAP_NUM_CRTCS config option
  drm/omap: fix crash on module unload
  drm/omap: use drm_atomic_helper_shutdown()
  drm/omap: fix display SYNC/DE flags
  drm/omap: dispc: improve debug print of display flags
  drm/omap: displays: panel-dpi: Support for handling backlight devices
  drm/omap: poll only connectors where the connect/disconnect can be checked
  drm/omap: display: Add displays in sorted order to the panel_list
  drm/omap: Use omapdss_stack_is_ready() to check that the display stack is up
  drm/omap: dss: Support for detecting display stack readiness
  drm/omap: dss: Functions to check components in the display/output list
  drm/omap: fix replication logic
  drm/omap: remove unused dispc_wb_enable & dispc_wb_is_enabled
  drm/omap: remove all EXPORT_SYMBOLs from dispc.c
  drm/omap: use dispc_ops
  drm/omap: fill dispc_ops
  ...
parents 320d8c3d e8e13b15
...@@ -9,6 +9,7 @@ Optional properties: ...@@ -9,6 +9,7 @@ Optional properties:
- enable-gpios: panel enable gpio - enable-gpios: panel enable gpio
- reset-gpios: GPIO to control the RESET pin - reset-gpios: GPIO to control the RESET pin
- vcc-supply: phandle of regulator that will be used to enable power to the display - vcc-supply: phandle of regulator that will be used to enable power to the display
- backlight: phandle of the backlight device
Required nodes: Required nodes:
- "panel-timing" containing video timings - "panel-timing" containing video timings
...@@ -22,6 +23,8 @@ lcd0: display@0 { ...@@ -22,6 +23,8 @@ lcd0: display@0 {
compatible = "samsung,lte430wq-f0c", "panel-dpi"; compatible = "samsung,lte430wq-f0c", "panel-dpi";
label = "lcd"; label = "lcd";
backlight = <&backlight>;
port { port {
lcd_in: endpoint { lcd_in: endpoint {
remote-endpoint = <&dpi_out>; remote-endpoint = <&dpi_out>;
......
...@@ -10,15 +10,6 @@ config DRM_OMAP ...@@ -10,15 +10,6 @@ config DRM_OMAP
if DRM_OMAP if DRM_OMAP
config DRM_OMAP_NUM_CRTCS
int "Number of CRTCs"
range 1 10
default 1 if ARCH_OMAP2 || ARCH_OMAP3
default 2 if ARCH_OMAP4
help
Select the number of video overlays which can be used as framebuffers.
The remaining overlays are reserved for video.
source "drivers/gpu/drm/omapdrm/dss/Kconfig" source "drivers/gpu/drm/omapdrm/dss/Kconfig"
source "drivers/gpu/drm/omapdrm/displays/Kconfig" source "drivers/gpu/drm/omapdrm/displays/Kconfig"
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_gpio.h> #include <linux/of_gpio.h>
#include <linux/regulator/consumer.h> #include <linux/regulator/consumer.h>
#include <linux/backlight.h>
#include <video/omap-panel-data.h> #include <video/omap-panel-data.h>
#include <video/of_display_timing.h> #include <video/of_display_timing.h>
...@@ -30,6 +31,8 @@ struct panel_drv_data { ...@@ -30,6 +31,8 @@ struct panel_drv_data {
struct videomode vm; struct videomode vm;
struct backlight_device *backlight;
/* used for non-DT boot, to be removed */ /* used for non-DT boot, to be removed */
int backlight_gpio; int backlight_gpio;
...@@ -97,6 +100,11 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev) ...@@ -97,6 +100,11 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
if (gpio_is_valid(ddata->backlight_gpio)) if (gpio_is_valid(ddata->backlight_gpio))
gpio_set_value_cansleep(ddata->backlight_gpio, 1); gpio_set_value_cansleep(ddata->backlight_gpio, 1);
if (ddata->backlight) {
ddata->backlight->props.power = FB_BLANK_UNBLANK;
backlight_update_status(ddata->backlight);
}
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0; return 0;
...@@ -113,6 +121,11 @@ static void panel_dpi_disable(struct omap_dss_device *dssdev) ...@@ -113,6 +121,11 @@ static void panel_dpi_disable(struct omap_dss_device *dssdev)
if (gpio_is_valid(ddata->backlight_gpio)) if (gpio_is_valid(ddata->backlight_gpio))
gpio_set_value_cansleep(ddata->backlight_gpio, 0); gpio_set_value_cansleep(ddata->backlight_gpio, 0);
if (ddata->backlight) {
ddata->backlight->props.power = FB_BLANK_POWERDOWN;
backlight_update_status(ddata->backlight);
}
gpiod_set_value_cansleep(ddata->enable_gpio, 0); gpiod_set_value_cansleep(ddata->enable_gpio, 0);
regulator_disable(ddata->vcc_supply); regulator_disable(ddata->vcc_supply);
...@@ -209,6 +222,7 @@ static int panel_dpi_probe_of(struct platform_device *pdev) ...@@ -209,6 +222,7 @@ static int panel_dpi_probe_of(struct platform_device *pdev)
{ {
struct panel_drv_data *ddata = platform_get_drvdata(pdev); struct panel_drv_data *ddata = platform_get_drvdata(pdev);
struct device_node *node = pdev->dev.of_node; struct device_node *node = pdev->dev.of_node;
struct device_node *bl_node;
struct omap_dss_device *in; struct omap_dss_device *in;
int r; int r;
struct display_timing timing; struct display_timing timing;
...@@ -236,10 +250,19 @@ static int panel_dpi_probe_of(struct platform_device *pdev) ...@@ -236,10 +250,19 @@ static int panel_dpi_probe_of(struct platform_device *pdev)
ddata->backlight_gpio = -ENOENT; ddata->backlight_gpio = -ENOENT;
bl_node = of_parse_phandle(node, "backlight", 0);
if (bl_node) {
ddata->backlight = of_find_backlight_by_node(bl_node);
of_node_put(bl_node);
if (!ddata->backlight)
return -EPROBE_DEFER;
}
r = of_get_display_timing(node, "panel-timing", &timing); r = of_get_display_timing(node, "panel-timing", &timing);
if (r) { if (r) {
dev_err(&pdev->dev, "failed to get video timing\n"); dev_err(&pdev->dev, "failed to get video timing\n");
return r; goto error_free_backlight;
} }
videomode_from_timing(&timing, &ddata->vm); videomode_from_timing(&timing, &ddata->vm);
...@@ -247,12 +270,19 @@ static int panel_dpi_probe_of(struct platform_device *pdev) ...@@ -247,12 +270,19 @@ static int panel_dpi_probe_of(struct platform_device *pdev)
in = omapdss_of_find_source_for_first_ep(node); in = omapdss_of_find_source_for_first_ep(node);
if (IS_ERR(in)) { if (IS_ERR(in)) {
dev_err(&pdev->dev, "failed to find video source\n"); dev_err(&pdev->dev, "failed to find video source\n");
return PTR_ERR(in); r = PTR_ERR(in);
goto error_free_backlight;
} }
ddata->in = in; ddata->in = in;
return 0; return 0;
error_free_backlight:
if (ddata->backlight)
put_device(&ddata->backlight->dev);
return r;
} }
static int panel_dpi_probe(struct platform_device *pdev) static int panel_dpi_probe(struct platform_device *pdev)
...@@ -321,6 +351,9 @@ static int __exit panel_dpi_remove(struct platform_device *pdev) ...@@ -321,6 +351,9 @@ static int __exit panel_dpi_remove(struct platform_device *pdev)
omap_dss_put_device(in); omap_dss_put_device(in);
if (ddata->backlight)
put_device(&ddata->backlight->dev);
return 0; return 0;
} }
......
config OMAP2_DSS_INIT config OMAP2_DSS_INIT
bool bool
config OMAP_DSS_BASE
tristate
menuconfig OMAP2_DSS menuconfig OMAP2_DSS
tristate "OMAP2+ Display Subsystem support" tristate "OMAP2+ Display Subsystem support"
select OMAP_DSS_BASE
select VIDEOMODE_HELPERS select VIDEOMODE_HELPERS
select OMAP2_DSS_INIT select OMAP2_DSS_INIT
select HDMI select HDMI
......
obj-$(CONFIG_OMAP2_DSS_INIT) += omapdss-boot-init.o obj-$(CONFIG_OMAP2_DSS_INIT) += omapdss-boot-init.o
obj-$(CONFIG_OMAP_DSS_BASE) += omapdss-base.o
omapdss-base-y := base.o display.o dss-of.o output.o
obj-$(CONFIG_OMAP2_DSS) += omapdss.o obj-$(CONFIG_OMAP2_DSS) += omapdss.o
# Core DSS files # Core DSS files
omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \ omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o \
output.o dss-of.o pll.o video-pll.o pll.o video-pll.o
omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o
omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o
omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
......
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_graph.h>
#include <linux/list.h>
#include "omapdss.h"
static bool dss_initialized;
static const struct dispc_ops *ops;
static struct list_head omapdss_comp_list;
struct omapdss_comp_node {
struct list_head list;
struct device_node *node;
bool dss_core_component;
};
void omapdss_set_is_initialized(bool set)
{
dss_initialized = set;
}
EXPORT_SYMBOL(omapdss_set_is_initialized);
bool omapdss_is_initialized(void)
{
return dss_initialized;
}
EXPORT_SYMBOL(omapdss_is_initialized);
void dispc_set_ops(const struct dispc_ops *o)
{
ops = o;
}
EXPORT_SYMBOL(dispc_set_ops);
const struct dispc_ops *dispc_get_ops(void)
{
return ops;
}
EXPORT_SYMBOL(dispc_get_ops);
static bool omapdss_list_contains(const struct device_node *node)
{
struct omapdss_comp_node *comp;
list_for_each_entry(comp, &omapdss_comp_list, list) {
if (comp->node == node)
return true;
}
return false;
}
static void omapdss_walk_device(struct device *dev, struct device_node *node,
bool dss_core)
{
struct device_node *n;
struct omapdss_comp_node *comp = devm_kzalloc(dev, sizeof(*comp),
GFP_KERNEL);
if (comp) {
comp->node = node;
comp->dss_core_component = dss_core;
list_add(&comp->list, &omapdss_comp_list);
}
/*
* of_graph_get_remote_port_parent() prints an error if there is no
* port/ports node. To avoid that, check first that there's the node.
*/
n = of_get_child_by_name(node, "ports");
if (!n)
n = of_get_child_by_name(node, "port");
if (!n)
return;
of_node_put(n);
n = NULL;
while ((n = of_graph_get_next_endpoint(node, n)) != NULL) {
struct device_node *pn = of_graph_get_remote_port_parent(n);
if (!pn)
continue;
if (!of_device_is_available(pn) || omapdss_list_contains(pn)) {
of_node_put(pn);
continue;
}
omapdss_walk_device(dev, pn, false);
}
}
void omapdss_gather_components(struct device *dev)
{
struct device_node *child;
INIT_LIST_HEAD(&omapdss_comp_list);
omapdss_walk_device(dev, dev->of_node, true);
for_each_available_child_of_node(dev->of_node, child) {
if (!of_find_property(child, "compatible", NULL))
continue;
omapdss_walk_device(dev, child, true);
}
}
EXPORT_SYMBOL(omapdss_gather_components);
static bool omapdss_component_is_loaded(struct omapdss_comp_node *comp)
{
if (comp->dss_core_component)
return true;
if (omapdss_component_is_display(comp->node))
return true;
if (omapdss_component_is_output(comp->node))
return true;
return false;
}
bool omapdss_stack_is_ready(void)
{
struct omapdss_comp_node *comp;
list_for_each_entry(comp, &omapdss_comp_list, list) {
if (!omapdss_component_is_loaded(comp))
return false;
}
return true;
}
EXPORT_SYMBOL(omapdss_stack_is_ready);
MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
MODULE_DESCRIPTION("OMAP Display Subsystem Base");
MODULE_LICENSE("GPL v2");
This diff is collapsed.
...@@ -353,7 +353,7 @@ static inline u16 DISPC_CPR_COEF_B(enum omap_channel channel) ...@@ -353,7 +353,7 @@ static inline u16 DISPC_CPR_COEF_B(enum omap_channel channel)
} }
/* DISPC overlay register base addresses */ /* DISPC overlay register base addresses */
static inline u16 DISPC_OVL_BASE(enum omap_plane plane) static inline u16 DISPC_OVL_BASE(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -373,7 +373,7 @@ static inline u16 DISPC_OVL_BASE(enum omap_plane plane) ...@@ -373,7 +373,7 @@ static inline u16 DISPC_OVL_BASE(enum omap_plane plane)
} }
/* DISPC overlay register offsets */ /* DISPC overlay register offsets */
static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) static inline u16 DISPC_BA0_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -389,7 +389,7 @@ static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) ...@@ -389,7 +389,7 @@ static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) static inline u16 DISPC_BA1_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -405,7 +405,7 @@ static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) ...@@ -405,7 +405,7 @@ static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -425,7 +425,7 @@ static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) ...@@ -425,7 +425,7 @@ static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -445,7 +445,7 @@ static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) ...@@ -445,7 +445,7 @@ static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_POS_OFFSET(enum omap_plane plane) static inline u16 DISPC_POS_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -460,7 +460,7 @@ static inline u16 DISPC_POS_OFFSET(enum omap_plane plane) ...@@ -460,7 +460,7 @@ static inline u16 DISPC_POS_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane) static inline u16 DISPC_SIZE_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -476,7 +476,7 @@ static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane) ...@@ -476,7 +476,7 @@ static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane) static inline u16 DISPC_ATTR_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -493,7 +493,7 @@ static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane) ...@@ -493,7 +493,7 @@ static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane) static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -513,7 +513,7 @@ static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane) ...@@ -513,7 +513,7 @@ static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane) static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -530,7 +530,7 @@ static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane) ...@@ -530,7 +530,7 @@ static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane) static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -547,7 +547,7 @@ static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane) ...@@ -547,7 +547,7 @@ static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane) static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -564,7 +564,7 @@ static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane) ...@@ -564,7 +564,7 @@ static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane) static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -581,7 +581,7 @@ static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane) ...@@ -581,7 +581,7 @@ static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane) static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -597,7 +597,7 @@ static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane) ...@@ -597,7 +597,7 @@ static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane) static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -613,7 +613,7 @@ static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane) ...@@ -613,7 +613,7 @@ static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane) static inline u16 DISPC_FIR_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -631,7 +631,7 @@ static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane) ...@@ -631,7 +631,7 @@ static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane) static inline u16 DISPC_FIR2_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -651,7 +651,7 @@ static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane) ...@@ -651,7 +651,7 @@ static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -670,7 +670,7 @@ static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) ...@@ -670,7 +670,7 @@ static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane)
} }
static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane) static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -688,7 +688,7 @@ static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane) ...@@ -688,7 +688,7 @@ static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -708,7 +708,7 @@ static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) ...@@ -708,7 +708,7 @@ static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane) static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -726,7 +726,7 @@ static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane) ...@@ -726,7 +726,7 @@ static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -747,7 +747,7 @@ static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) ...@@ -747,7 +747,7 @@ static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane)
} }
/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ /* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */
static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -766,7 +766,7 @@ static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) ...@@ -766,7 +766,7 @@ static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i)
} }
/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ /* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */
static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -787,7 +787,7 @@ static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) ...@@ -787,7 +787,7 @@ static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i)
} }
/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ /* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */
static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -806,7 +806,7 @@ static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) ...@@ -806,7 +806,7 @@ static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i)
} }
/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ /* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */
static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -827,7 +827,7 @@ static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) ...@@ -827,7 +827,7 @@ static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i)
} }
/* coef index i = {0, 1, 2, 3, 4,} */ /* coef index i = {0, 1, 2, 3, 4,} */
static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -845,7 +845,7 @@ static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i) ...@@ -845,7 +845,7 @@ static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i)
} }
/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ /* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */
static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -865,7 +865,7 @@ static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) ...@@ -865,7 +865,7 @@ static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i)
} }
/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ /* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */
static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane_id plane, u16 i)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -885,7 +885,7 @@ static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) ...@@ -885,7 +885,7 @@ static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i)
} }
} }
static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
...@@ -902,7 +902,7 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) ...@@ -902,7 +902,7 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane)
} }
} }
static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane) static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane_id plane)
{ {
switch (plane) { switch (plane) {
case OMAP_DSS_GFX: case OMAP_DSS_GFX:
......
...@@ -29,8 +29,6 @@ ...@@ -29,8 +29,6 @@
#include <linux/of.h> #include <linux/of.h>
#include "omapdss.h" #include "omapdss.h"
#include "dss.h"
#include "dss_features.h"
void omapdss_default_get_resolution(struct omap_dss_device *dssdev, void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres) u16 *xres, u16 *yres)
...@@ -55,10 +53,10 @@ int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev) ...@@ -55,10 +53,10 @@ int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev)
else else
return 16; return 16;
case OMAP_DISPLAY_TYPE_DSI: case OMAP_DISPLAY_TYPE_DSI:
if (dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt) > 16) if (dssdev->panel.dsi_pix_fmt == OMAP_DSS_DSI_FMT_RGB565)
return 24;
else
return 16; return 16;
else
return 24;
case OMAP_DISPLAY_TYPE_VENC: case OMAP_DISPLAY_TYPE_VENC:
case OMAP_DISPLAY_TYPE_SDI: case OMAP_DISPLAY_TYPE_SDI:
case OMAP_DISPLAY_TYPE_HDMI: case OMAP_DISPLAY_TYPE_HDMI:
...@@ -85,6 +83,7 @@ static int disp_num_counter; ...@@ -85,6 +83,7 @@ static int disp_num_counter;
int omapdss_register_display(struct omap_dss_device *dssdev) int omapdss_register_display(struct omap_dss_device *dssdev)
{ {
struct omap_dss_driver *drv = dssdev->driver; struct omap_dss_driver *drv = dssdev->driver;
struct list_head *cur;
int id; int id;
/* /*
...@@ -120,7 +119,14 @@ int omapdss_register_display(struct omap_dss_device *dssdev) ...@@ -120,7 +119,14 @@ int omapdss_register_display(struct omap_dss_device *dssdev)
drv->get_timings = omapdss_default_get_timings; drv->get_timings = omapdss_default_get_timings;
mutex_lock(&panel_list_mutex); mutex_lock(&panel_list_mutex);
list_add_tail(&dssdev->panel_list, &panel_list); list_for_each(cur, &panel_list) {
struct omap_dss_device *ldev = list_entry(cur,
struct omap_dss_device,
panel_list);
if (strcmp(ldev->alias, dssdev->alias) > 0)
break;
}
list_add_tail(&dssdev->panel_list, cur);
mutex_unlock(&panel_list_mutex); mutex_unlock(&panel_list_mutex);
return 0; return 0;
} }
...@@ -134,6 +140,24 @@ void omapdss_unregister_display(struct omap_dss_device *dssdev) ...@@ -134,6 +140,24 @@ void omapdss_unregister_display(struct omap_dss_device *dssdev)
} }
EXPORT_SYMBOL(omapdss_unregister_display); EXPORT_SYMBOL(omapdss_unregister_display);
bool omapdss_component_is_display(struct device_node *node)
{
struct omap_dss_device *dssdev;
bool found = false;
mutex_lock(&panel_list_mutex);
list_for_each_entry(dssdev, &panel_list, panel_list) {
if (dssdev->dev->of_node == node) {
found = true;
goto out;
}
}
out:
mutex_unlock(&panel_list_mutex);
return found;
}
EXPORT_SYMBOL(omapdss_component_is_display);
struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev) struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev)
{ {
if (!try_module_get(dssdev->owner)) if (!try_module_get(dssdev->owner))
......
...@@ -67,6 +67,45 @@ static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev) ...@@ -67,6 +67,45 @@ static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
return dev_get_drvdata(&pdev->dev); return dev_get_drvdata(&pdev->dev);
} }
static enum dss_clk_source dpi_get_clk_src_dra7xx(enum omap_channel channel)
{
/*
* Possible clock sources:
* LCD1: FCK/PLL1_1/HDMI_PLL
* LCD2: FCK/PLL1_3/HDMI_PLL (DRA74x: PLL2_3)
* LCD3: FCK/PLL1_3/HDMI_PLL (DRA74x: PLL2_1)
*/
switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
{
if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_1))
return DSS_CLK_SRC_PLL1_1;
break;
}
case OMAP_DSS_CHANNEL_LCD2:
{
if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_3))
return DSS_CLK_SRC_PLL1_3;
if (dss_pll_find_by_src(DSS_CLK_SRC_PLL2_3))
return DSS_CLK_SRC_PLL2_3;
break;
}
case OMAP_DSS_CHANNEL_LCD3:
{
if (dss_pll_find_by_src(DSS_CLK_SRC_PLL2_1))
return DSS_CLK_SRC_PLL2_1;
if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_3))
return DSS_CLK_SRC_PLL1_3;
break;
}
default:
break;
}
return DSS_CLK_SRC_FCK;
}
static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel) static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel)
{ {
/* /*
...@@ -107,16 +146,7 @@ static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel) ...@@ -107,16 +146,7 @@ static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel)
} }
case OMAPDSS_VER_DRA7xx: case OMAPDSS_VER_DRA7xx:
switch (channel) { return dpi_get_clk_src_dra7xx(channel);
case OMAP_DSS_CHANNEL_LCD:
return DSS_CLK_SRC_PLL1_1;
case OMAP_DSS_CHANNEL_LCD2:
return DSS_CLK_SRC_PLL1_3;
case OMAP_DSS_CHANNEL_LCD3:
return DSS_CLK_SRC_PLL2_1;
default:
return DSS_CLK_SRC_FCK;
}
default: default:
return DSS_CLK_SRC_FCK; return DSS_CLK_SRC_FCK;
...@@ -170,14 +200,6 @@ static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc, ...@@ -170,14 +200,6 @@ static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc,
{ {
struct dpi_clk_calc_ctx *ctx = data; struct dpi_clk_calc_ctx *ctx = data;
/*
* Odd dividers give us uneven duty cycle, causing problem when level
* shifted. So skip all odd dividers when the pixel clock is on the
* higher side.
*/
if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 100000000)
return false;
ctx->pll_cinfo.mX[ctx->clkout_idx] = m_dispc; ctx->pll_cinfo.mX[ctx->clkout_idx] = m_dispc;
ctx->pll_cinfo.clkout[ctx->clkout_idx] = dispc; ctx->pll_cinfo.clkout[ctx->clkout_idx] = dispc;
......
...@@ -527,7 +527,7 @@ static inline int wait_for_bit_change(struct platform_device *dsidev, ...@@ -527,7 +527,7 @@ static inline int wait_for_bit_change(struct platform_device *dsidev,
return !value; return !value;
} }
u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) static u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
{ {
switch (fmt) { switch (fmt) {
case OMAP_DSS_DSI_FMT_RGB888: case OMAP_DSS_DSI_FMT_RGB888:
......
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include "omapdss.h" #include "omapdss.h"
#include "dss.h"
struct device_node * struct device_node *
omapdss_of_get_next_port(const struct device_node *parent, omapdss_of_get_next_port(const struct device_node *parent,
...@@ -110,6 +109,7 @@ struct device_node *dss_of_port_get_parent_device(struct device_node *port) ...@@ -110,6 +109,7 @@ struct device_node *dss_of_port_get_parent_device(struct device_node *port)
return NULL; return NULL;
} }
EXPORT_SYMBOL_GPL(dss_of_port_get_parent_device);
u32 dss_of_port_get_port_number(struct device_node *port) u32 dss_of_port_get_port_number(struct device_node *port)
{ {
...@@ -122,6 +122,7 @@ u32 dss_of_port_get_port_number(struct device_node *port) ...@@ -122,6 +122,7 @@ u32 dss_of_port_get_port_number(struct device_node *port)
return reg; return reg;
} }
EXPORT_SYMBOL_GPL(dss_of_port_get_port_number);
static struct device_node *omapdss_of_get_remote_port(const struct device_node *node) static struct device_node *omapdss_of_get_remote_port(const struct device_node *node)
{ {
......
...@@ -117,14 +117,6 @@ static const char * const dss_generic_clk_source_names[] = { ...@@ -117,14 +117,6 @@ static const char * const dss_generic_clk_source_names[] = {
[DSS_CLK_SRC_HDMI_PLL] = "HDMI PLL", [DSS_CLK_SRC_HDMI_PLL] = "HDMI PLL",
}; };
static bool dss_initialized;
bool omapdss_is_initialized(void)
{
return dss_initialized;
}
EXPORT_SYMBOL(omapdss_is_initialized);
static inline void dss_write_reg(const struct dss_reg idx, u32 val) static inline void dss_write_reg(const struct dss_reg idx, u32 val)
{ {
__raw_writel(val, dss.base + idx.idx); __raw_writel(val, dss.base + idx.idx);
...@@ -1266,7 +1258,8 @@ static int dss_bind(struct device *dev) ...@@ -1266,7 +1258,8 @@ static int dss_bind(struct device *dev)
pm_set_vt_switch(0); pm_set_vt_switch(0);
dss_initialized = true; omapdss_gather_components(dev);
omapdss_set_is_initialized(true);
return 0; return 0;
...@@ -1290,7 +1283,7 @@ static void dss_unbind(struct device *dev) ...@@ -1290,7 +1283,7 @@ static void dss_unbind(struct device *dev)
{ {
struct platform_device *pdev = to_platform_device(dev); struct platform_device *pdev = to_platform_device(dev);
dss_initialized = false; omapdss_set_is_initialized(false);
component_unbind_all(&pdev->dev, NULL); component_unbind_all(&pdev->dev, NULL);
......
...@@ -253,10 +253,6 @@ struct dss_pll *dss_video_pll_init(struct platform_device *pdev, int id, ...@@ -253,10 +253,6 @@ struct dss_pll *dss_video_pll_init(struct platform_device *pdev, int id,
struct regulator *regulator); struct regulator *regulator);
void dss_video_pll_uninit(struct dss_pll *pll); void dss_video_pll_uninit(struct dss_pll *pll);
/* dss-of */
struct device_node *dss_of_port_get_parent_device(struct device_node *port);
u32 dss_of_port_get_port_number(struct device_node *port);
#if defined(CONFIG_OMAP2_DSS_DEBUGFS) #if defined(CONFIG_OMAP2_DSS_DEBUGFS)
void dss_debug_dump_clocks(struct seq_file *s); void dss_debug_dump_clocks(struct seq_file *s);
#endif #endif
...@@ -315,15 +311,7 @@ void dsi_uninit_platform_driver(void); ...@@ -315,15 +311,7 @@ void dsi_uninit_platform_driver(void);
void dsi_dump_clocks(struct seq_file *s); void dsi_dump_clocks(struct seq_file *s);
void dsi_irq_handler(void); void dsi_irq_handler(void);
u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
#else
static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
{
WARN(1, "%s: DSI not compiled in, returning pixel_size as 0\n",
__func__);
return 0;
}
#endif #endif
/* DPI */ /* DPI */
...@@ -349,6 +337,9 @@ int dispc_init_platform_driver(void) __init; ...@@ -349,6 +337,9 @@ int dispc_init_platform_driver(void) __init;
void dispc_uninit_platform_driver(void); void dispc_uninit_platform_driver(void);
void dispc_dump_clocks(struct seq_file *s); void dispc_dump_clocks(struct seq_file *s);
int dispc_runtime_get(void);
void dispc_runtime_put(void);
void dispc_enable_sidle(void); void dispc_enable_sidle(void);
void dispc_disable_sidle(void); void dispc_disable_sidle(void);
...@@ -368,8 +359,9 @@ int dispc_calc_clock_rates(unsigned long dispc_fclk_rate, ...@@ -368,8 +359,9 @@ int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
struct dispc_clock_info *cinfo); struct dispc_clock_info *cinfo);
void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high); void dispc_ovl_set_fifo_threshold(enum omap_plane_id plane, u32 low,
void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, u32 high);
void dispc_ovl_compute_fifo_thresholds(enum omap_plane_id plane,
u32 *fifo_low, u32 *fifo_high, bool use_fifomerge, u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
bool manual_update); bool manual_update);
...@@ -382,8 +374,6 @@ void dispc_set_tv_pclk(unsigned long pclk); ...@@ -382,8 +374,6 @@ void dispc_set_tv_pclk(unsigned long pclk);
u32 dispc_wb_get_framedone_irq(void); u32 dispc_wb_get_framedone_irq(void);
bool dispc_wb_go_busy(void); bool dispc_wb_go_busy(void);
void dispc_wb_go(void); void dispc_wb_go(void);
void dispc_wb_enable(bool enable);
bool dispc_wb_is_enabled(void);
void dispc_wb_set_channel_in(enum dss_writeback_channel channel); void dispc_wb_set_channel_in(enum dss_writeback_channel channel);
int dispc_wb_setup(const struct omap_dss_writeback_info *wi, int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
bool mem_to_mem, const struct videomode *vm); bool mem_to_mem, const struct videomode *vm);
......
...@@ -774,13 +774,11 @@ int dss_feat_get_num_mgrs(void) ...@@ -774,13 +774,11 @@ int dss_feat_get_num_mgrs(void)
{ {
return omap_current_dss_features->num_mgrs; return omap_current_dss_features->num_mgrs;
} }
EXPORT_SYMBOL(dss_feat_get_num_mgrs);
int dss_feat_get_num_ovls(void) int dss_feat_get_num_ovls(void)
{ {
return omap_current_dss_features->num_ovls; return omap_current_dss_features->num_ovls;
} }
EXPORT_SYMBOL(dss_feat_get_num_ovls);
unsigned long dss_feat_get_param_min(enum dss_range_param param) unsigned long dss_feat_get_param_min(enum dss_range_param param)
{ {
...@@ -802,18 +800,17 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel ...@@ -802,18 +800,17 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel
return omap_current_dss_features->supported_outputs[channel]; return omap_current_dss_features->supported_outputs[channel];
} }
enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane)
{ {
return omap_current_dss_features->supported_color_modes[plane]; return omap_current_dss_features->supported_color_modes[plane];
} }
EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane)
{ {
return omap_current_dss_features->overlay_caps[plane]; return omap_current_dss_features->overlay_caps[plane];
} }
bool dss_feat_color_mode_supported(enum omap_plane plane, bool dss_feat_color_mode_supported(enum omap_plane_id plane,
enum omap_color_mode color_mode) enum omap_color_mode color_mode)
{ {
return omap_current_dss_features->supported_color_modes[plane] & return omap_current_dss_features->supported_color_modes[plane] &
......
...@@ -88,8 +88,8 @@ enum dss_range_param { ...@@ -88,8 +88,8 @@ enum dss_range_param {
/* DSS Feature Functions */ /* DSS Feature Functions */
unsigned long dss_feat_get_param_min(enum dss_range_param param); unsigned long dss_feat_get_param_min(enum dss_range_param param);
unsigned long dss_feat_get_param_max(enum dss_range_param param); unsigned long dss_feat_get_param_max(enum dss_range_param param);
enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane);
bool dss_feat_color_mode_supported(enum omap_plane plane, bool dss_feat_color_mode_supported(enum omap_plane_id plane,
enum omap_color_mode color_mode); enum omap_color_mode color_mode);
u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ u32 dss_feat_get_buffer_size_unit(void); /* in bytes */
...@@ -104,4 +104,8 @@ void dss_features_init(enum omapdss_version version); ...@@ -104,4 +104,8 @@ void dss_features_init(enum omapdss_version version);
enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel); enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
int dss_feat_get_num_mgrs(void);
int dss_feat_get_num_ovls(void);
enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane);
#endif #endif
...@@ -147,15 +147,17 @@ void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp, ...@@ -147,15 +147,17 @@ void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp,
struct videomode *vm) struct videomode *vm)
{ {
u32 r; u32 r;
bool vsync_pol, hsync_pol; bool vsync_inv, hsync_inv;
DSSDBG("Enter hdmi_wp_video_config_interface\n"); DSSDBG("Enter hdmi_wp_video_config_interface\n");
vsync_pol = !!(vm->flags & DISPLAY_FLAGS_VSYNC_HIGH); vsync_inv = !!(vm->flags & DISPLAY_FLAGS_VSYNC_LOW);
hsync_pol = !!(vm->flags & DISPLAY_FLAGS_HSYNC_HIGH); hsync_inv = !!(vm->flags & DISPLAY_FLAGS_HSYNC_LOW);
r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG);
r = FLD_MOD(r, vsync_pol, 7, 7); r = FLD_MOD(r, 1, 7, 7); /* VSYNC_POL to dispc active high */
r = FLD_MOD(r, hsync_pol, 6, 6); r = FLD_MOD(r, 1, 6, 6); /* HSYNC_POL to dispc active high */
r = FLD_MOD(r, vsync_inv, 5, 5); /* CORE_VSYNC_INV */
r = FLD_MOD(r, hsync_inv, 4, 4); /* CORE_HSYNC_INV */
r = FLD_MOD(r, !!(vm->flags & DISPLAY_FLAGS_INTERLACED), 3, 3); r = FLD_MOD(r, !!(vm->flags & DISPLAY_FLAGS_INTERLACED), 3, 3);
r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */
hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r); hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r);
......
...@@ -76,7 +76,7 @@ enum omap_display_type { ...@@ -76,7 +76,7 @@ enum omap_display_type {
OMAP_DISPLAY_TYPE_DVI = 1 << 6, OMAP_DISPLAY_TYPE_DVI = 1 << 6,
}; };
enum omap_plane { enum omap_plane_id {
OMAP_DSS_GFX = 0, OMAP_DSS_GFX = 0,
OMAP_DSS_VIDEO1 = 1, OMAP_DSS_VIDEO1 = 1,
OMAP_DSS_VIDEO2 = 2, OMAP_DSS_VIDEO2 = 2,
...@@ -338,7 +338,7 @@ struct omap_overlay { ...@@ -338,7 +338,7 @@ struct omap_overlay {
/* static fields */ /* static fields */
const char *name; const char *name;
enum omap_plane id; enum omap_plane_id id;
enum omap_color_mode supported_modes; enum omap_color_mode supported_modes;
enum omap_overlay_caps caps; enum omap_overlay_caps caps;
...@@ -785,7 +785,7 @@ const char *omapdss_get_default_display_name(void); ...@@ -785,7 +785,7 @@ const char *omapdss_get_default_display_name(void);
int dss_feat_get_num_mgrs(void); int dss_feat_get_num_mgrs(void);
int dss_feat_get_num_ovls(void); int dss_feat_get_num_ovls(void);
enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane);
...@@ -844,42 +844,10 @@ omapdss_of_get_first_endpoint(const struct device_node *parent); ...@@ -844,42 +844,10 @@ omapdss_of_get_first_endpoint(const struct device_node *parent);
struct omap_dss_device * struct omap_dss_device *
omapdss_of_find_source_for_first_ep(struct device_node *node); omapdss_of_find_source_for_first_ep(struct device_node *node);
u32 dispc_read_irqstatus(void); void omapdss_set_is_initialized(bool set);
void dispc_clear_irqstatus(u32 mask);
u32 dispc_read_irqenable(void);
void dispc_write_irqenable(u32 mask);
int dispc_request_irq(irq_handler_t handler, void *dev_id); struct device_node *dss_of_port_get_parent_device(struct device_node *port);
void dispc_free_irq(void *dev_id); u32 dss_of_port_get_port_number(struct device_node *port);
int dispc_runtime_get(void);
void dispc_runtime_put(void);
void dispc_mgr_enable(enum omap_channel channel, bool enable);
u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
bool dispc_mgr_go_busy(enum omap_channel channel);
void dispc_mgr_go(enum omap_channel channel);
void dispc_mgr_set_lcd_config(enum omap_channel channel,
const struct dss_lcd_mgr_config *config);
void dispc_mgr_set_timings(enum omap_channel channel,
const struct videomode *vm);
void dispc_mgr_setup(enum omap_channel channel,
const struct omap_overlay_manager_info *info);
u32 dispc_mgr_gamma_size(enum omap_channel channel);
void dispc_mgr_set_gamma(enum omap_channel channel,
const struct drm_color_lut *lut,
unsigned int length);
int dispc_ovl_enable(enum omap_plane plane, bool enable);
bool dispc_ovl_enabled(enum omap_plane plane);
void dispc_ovl_set_channel_out(enum omap_plane plane,
enum omap_channel channel);
int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
bool replication, const struct videomode *vm, bool mem_to_mem);
enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel);
struct dss_mgr_ops { struct dss_mgr_ops {
int (*connect)(enum omap_channel channel, int (*connect)(enum omap_channel channel,
...@@ -919,4 +887,60 @@ int dss_mgr_register_framedone_handler(enum omap_channel channel, ...@@ -919,4 +887,60 @@ int dss_mgr_register_framedone_handler(enum omap_channel channel,
void dss_mgr_unregister_framedone_handler(enum omap_channel channel, void dss_mgr_unregister_framedone_handler(enum omap_channel channel,
void (*handler)(void *), void *data); void (*handler)(void *), void *data);
/* dispc ops */
struct dispc_ops {
u32 (*read_irqstatus)(void);
void (*clear_irqstatus)(u32 mask);
u32 (*read_irqenable)(void);
void (*write_irqenable)(u32 mask);
int (*request_irq)(irq_handler_t handler, void *dev_id);
void (*free_irq)(void *dev_id);
int (*runtime_get)(void);
void (*runtime_put)(void);
int (*get_num_ovls)(void);
int (*get_num_mgrs)(void);
void (*mgr_enable)(enum omap_channel channel, bool enable);
bool (*mgr_is_enabled)(enum omap_channel channel);
u32 (*mgr_get_vsync_irq)(enum omap_channel channel);
u32 (*mgr_get_framedone_irq)(enum omap_channel channel);
u32 (*mgr_get_sync_lost_irq)(enum omap_channel channel);
bool (*mgr_go_busy)(enum omap_channel channel);
void (*mgr_go)(enum omap_channel channel);
void (*mgr_set_lcd_config)(enum omap_channel channel,
const struct dss_lcd_mgr_config *config);
void (*mgr_set_timings)(enum omap_channel channel,
const struct videomode *vm);
void (*mgr_setup)(enum omap_channel channel,
const struct omap_overlay_manager_info *info);
enum omap_dss_output_id (*mgr_get_supported_outputs)(enum omap_channel channel);
u32 (*mgr_gamma_size)(enum omap_channel channel);
void (*mgr_set_gamma)(enum omap_channel channel,
const struct drm_color_lut *lut,
unsigned int length);
int (*ovl_enable)(enum omap_plane_id plane, bool enable);
bool (*ovl_enabled)(enum omap_plane_id plane);
void (*ovl_set_channel_out)(enum omap_plane_id plane,
enum omap_channel channel);
int (*ovl_setup)(enum omap_plane_id plane,
const struct omap_overlay_info *oi,
const struct videomode *vm, bool mem_to_mem);
enum omap_color_mode (*ovl_get_color_modes)(enum omap_plane_id plane);
};
void dispc_set_ops(const struct dispc_ops *o);
const struct dispc_ops *dispc_get_ops(void);
bool omapdss_component_is_display(struct device_node *node);
bool omapdss_component_is_output(struct device_node *node);
bool omapdss_stack_is_ready(void);
void omapdss_gather_components(struct device *dev);
#endif /* __OMAP_DRM_DSS_H */ #endif /* __OMAP_DRM_DSS_H */
...@@ -22,7 +22,6 @@ ...@@ -22,7 +22,6 @@
#include <linux/of.h> #include <linux/of.h>
#include "omapdss.h" #include "omapdss.h"
#include "dss.h"
static LIST_HEAD(output_list); static LIST_HEAD(output_list);
static DEFINE_MUTEX(output_lock); static DEFINE_MUTEX(output_lock);
...@@ -35,14 +34,15 @@ int omapdss_output_set_device(struct omap_dss_device *out, ...@@ -35,14 +34,15 @@ int omapdss_output_set_device(struct omap_dss_device *out,
mutex_lock(&output_lock); mutex_lock(&output_lock);
if (out->dst) { if (out->dst) {
DSSERR("output already has device %s connected to it\n", dev_err(out->dev,
"output already has device %s connected to it\n",
out->dst->name); out->dst->name);
r = -EINVAL; r = -EINVAL;
goto err; goto err;
} }
if (out->output_type != dssdev->type) { if (out->output_type != dssdev->type) {
DSSERR("output type and display type don't match\n"); dev_err(out->dev, "output type and display type don't match\n");
r = -EINVAL; r = -EINVAL;
goto err; goto err;
} }
...@@ -67,14 +67,16 @@ int omapdss_output_unset_device(struct omap_dss_device *out) ...@@ -67,14 +67,16 @@ int omapdss_output_unset_device(struct omap_dss_device *out)
mutex_lock(&output_lock); mutex_lock(&output_lock);
if (!out->dst) { if (!out->dst) {
DSSERR("output doesn't have a device connected to it\n"); dev_err(out->dev,
"output doesn't have a device connected to it\n");
r = -EINVAL; r = -EINVAL;
goto err; goto err;
} }
if (out->dst->state != OMAP_DSS_DISPLAY_DISABLED) { if (out->dst->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("device %s is not disabled, cannot unset device\n", dev_err(out->dev,
out->dst->name); "device %s is not disabled, cannot unset device\n",
out->dst->name);
r = -EINVAL; r = -EINVAL;
goto err; goto err;
} }
...@@ -105,6 +107,19 @@ void omapdss_unregister_output(struct omap_dss_device *out) ...@@ -105,6 +107,19 @@ void omapdss_unregister_output(struct omap_dss_device *out)
} }
EXPORT_SYMBOL(omapdss_unregister_output); EXPORT_SYMBOL(omapdss_unregister_output);
bool omapdss_component_is_output(struct device_node *node)
{
struct omap_dss_device *out;
list_for_each_entry(out, &output_list, list) {
if (out->dev->of_node == node)
return true;
}
return false;
}
EXPORT_SYMBOL(omapdss_component_is_output);
struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id) struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id)
{ {
struct omap_dss_device *out; struct omap_dss_device *out;
......
...@@ -215,8 +215,8 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, ...@@ -215,8 +215,8 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
dss_pll_calc_func func, void *data) dss_pll_calc_func func, void *data)
{ {
const struct dss_pll_hw *hw = pll->hw; const struct dss_pll_hw *hw = pll->hw;
int n, n_start, n_stop; int n, n_min, n_max;
int m, m_start, m_stop; int m, m_min, m_max;
unsigned long fint, clkdco; unsigned long fint, clkdco;
unsigned long pll_hw_max; unsigned long pll_hw_max;
unsigned long fint_hw_min, fint_hw_max; unsigned long fint_hw_min, fint_hw_max;
...@@ -226,21 +226,22 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, ...@@ -226,21 +226,22 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
fint_hw_min = hw->fint_min; fint_hw_min = hw->fint_min;
fint_hw_max = hw->fint_max; fint_hw_max = hw->fint_max;
n_start = max(DIV_ROUND_UP(clkin, fint_hw_max), 1ul); n_min = max(DIV_ROUND_UP(clkin, fint_hw_max), 1ul);
n_stop = min((unsigned)(clkin / fint_hw_min), hw->n_max); n_max = min((unsigned)(clkin / fint_hw_min), hw->n_max);
pll_max = pll_max ? pll_max : ULONG_MAX; pll_max = pll_max ? pll_max : ULONG_MAX;
for (n = n_start; n <= n_stop; ++n) { /* Try to find high N & M to avoid jitter (DRA7 errata i886) */
for (n = n_max; n >= n_min; --n) {
fint = clkin / n; fint = clkin / n;
m_start = max(DIV_ROUND_UP(DIV_ROUND_UP(pll_min, fint), 2), m_min = max(DIV_ROUND_UP(DIV_ROUND_UP(pll_min, fint), 2),
1ul); 1ul);
m_stop = min3((unsigned)(pll_max / fint / 2), m_max = min3((unsigned)(pll_max / fint / 2),
(unsigned)(pll_hw_max / fint / 2), (unsigned)(pll_hw_max / fint / 2),
hw->m_max); hw->m_max);
for (m = m_start; m <= m_stop; ++m) { for (m = m_max; m >= m_min; --m) {
clkdco = 2 * m * fint; clkdco = 2 * m * fint;
if (func(n, m, fint, clkdco, data)) if (func(n, m, fint, clkdco, data))
......
...@@ -146,8 +146,6 @@ static int omap_connector_mode_valid(struct drm_connector *connector, ...@@ -146,8 +146,6 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
int r, ret = MODE_BAD; int r, ret = MODE_BAD;
drm_display_mode_to_videomode(mode, &vm); drm_display_mode_to_videomode(mode, &vm);
vm.flags |= DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE |
DISPLAY_FLAGS_SYNC_NEGEDGE;
mode->vrefresh = drm_mode_vrefresh(mode); mode->vrefresh = drm_mode_vrefresh(mode);
/* /*
...@@ -162,6 +160,12 @@ static int omap_connector_mode_valid(struct drm_connector *connector, ...@@ -162,6 +160,12 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
dssdrv->get_timings(dssdev, &t); dssdrv->get_timings(dssdev, &t);
/*
* Ignore the flags, as we don't get them from
* drm_display_mode_to_videomode.
*/
t.flags = 0;
if (memcmp(&vm, &t, sizeof(vm))) if (memcmp(&vm, &t, sizeof(vm)))
r = -EINVAL; r = -EINVAL;
else else
...@@ -229,13 +233,11 @@ struct drm_connector *omap_connector_init(struct drm_device *dev, ...@@ -229,13 +233,11 @@ struct drm_connector *omap_connector_init(struct drm_device *dev,
connector_type); connector_type);
drm_connector_helper_add(connector, &omap_connector_helper_funcs); drm_connector_helper_add(connector, &omap_connector_helper_funcs);
#if 0 /* enable when dss2 supports hotplug */ if (dssdev->driver->detect)
if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_HPD)
connector->polled = 0;
else
#endif
connector->polled = DRM_CONNECTOR_POLL_CONNECT | connector->polled = DRM_CONNECTOR_POLL_CONNECT |
DRM_CONNECTOR_POLL_DISCONNECT; DRM_CONNECTOR_POLL_DISCONNECT;
else
connector->polled = 0;
connector->interlace_allowed = 1; connector->interlace_allowed = 1;
connector->doublescan_allowed = 0; connector->doublescan_allowed = 0;
......
...@@ -107,10 +107,12 @@ static struct omap_dss_device *omap_crtc_output[8]; ...@@ -107,10 +107,12 @@ static struct omap_dss_device *omap_crtc_output[8];
static int omap_crtc_dss_connect(enum omap_channel channel, static int omap_crtc_dss_connect(enum omap_channel channel,
struct omap_dss_device *dst) struct omap_dss_device *dst)
{ {
const struct dispc_ops *dispc_ops = dispc_get_ops();
if (omap_crtc_output[channel]) if (omap_crtc_output[channel])
return -EINVAL; return -EINVAL;
if ((dispc_mgr_get_supported_outputs(channel) & dst->id) == 0) if ((dispc_ops->mgr_get_supported_outputs(channel) & dst->id) == 0)
return -EINVAL; return -EINVAL;
omap_crtc_output[channel] = dst; omap_crtc_output[channel] = dst;
...@@ -134,6 +136,7 @@ static void omap_crtc_dss_start_update(enum omap_channel channel) ...@@ -134,6 +136,7 @@ static void omap_crtc_dss_start_update(enum omap_channel channel)
static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
{ {
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct omap_drm_private *priv = dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc); struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
enum omap_channel channel = omap_crtc->channel; enum omap_channel channel = omap_crtc->channel;
struct omap_irq_wait *wait; struct omap_irq_wait *wait;
...@@ -144,7 +147,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) ...@@ -144,7 +147,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
return; return;
if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) {
dispc_mgr_enable(channel, enable); priv->dispc_ops->mgr_enable(channel, enable);
omap_crtc->enabled = enable; omap_crtc->enabled = enable;
return; return;
} }
...@@ -157,8 +160,8 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) ...@@ -157,8 +160,8 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
omap_crtc->ignore_digit_sync_lost = true; omap_crtc->ignore_digit_sync_lost = true;
} }
framedone_irq = dispc_mgr_get_framedone_irq(channel); framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(channel);
vsync_irq = dispc_mgr_get_vsync_irq(channel); vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(channel);
if (enable) { if (enable) {
wait = omap_irq_wait_init(dev, vsync_irq, 1); wait = omap_irq_wait_init(dev, vsync_irq, 1);
...@@ -178,7 +181,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) ...@@ -178,7 +181,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
wait = omap_irq_wait_init(dev, vsync_irq, 2); wait = omap_irq_wait_init(dev, vsync_irq, 2);
} }
dispc_mgr_enable(channel, enable); priv->dispc_ops->mgr_enable(channel, enable);
omap_crtc->enabled = enable; omap_crtc->enabled = enable;
ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
...@@ -198,17 +201,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) ...@@ -198,17 +201,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
static int omap_crtc_dss_enable(enum omap_channel channel) static int omap_crtc_dss_enable(enum omap_channel channel)
{ {
struct omap_crtc *omap_crtc = omap_crtcs[channel]; struct omap_crtc *omap_crtc = omap_crtcs[channel];
struct omap_overlay_manager_info info; struct omap_drm_private *priv = omap_crtc->base.dev->dev_private;
memset(&info, 0, sizeof(info)); priv->dispc_ops->mgr_set_timings(omap_crtc->channel, &omap_crtc->vm);
info.default_color = 0x00000000;
info.trans_key = 0x00000000;
info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
info.trans_enabled = false;
dispc_mgr_setup(omap_crtc->channel, &info);
dispc_mgr_set_timings(omap_crtc->channel,
&omap_crtc->vm);
omap_crtc_set_enabled(&omap_crtc->base, true); omap_crtc_set_enabled(&omap_crtc->base, true);
return 0; return 0;
...@@ -233,8 +228,10 @@ static void omap_crtc_dss_set_lcd_config(enum omap_channel channel, ...@@ -233,8 +228,10 @@ static void omap_crtc_dss_set_lcd_config(enum omap_channel channel,
const struct dss_lcd_mgr_config *config) const struct dss_lcd_mgr_config *config)
{ {
struct omap_crtc *omap_crtc = omap_crtcs[channel]; struct omap_crtc *omap_crtc = omap_crtcs[channel];
struct omap_drm_private *priv = omap_crtc->base.dev->dev_private;
DBG("%s", omap_crtc->name); DBG("%s", omap_crtc->name);
dispc_mgr_set_lcd_config(omap_crtc->channel, config); priv->dispc_ops->mgr_set_lcd_config(omap_crtc->channel, config);
} }
static int omap_crtc_dss_register_framedone( static int omap_crtc_dss_register_framedone(
...@@ -282,6 +279,8 @@ void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus) ...@@ -282,6 +279,8 @@ void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus)
void omap_crtc_vblank_irq(struct drm_crtc *crtc) void omap_crtc_vblank_irq(struct drm_crtc *crtc)
{ {
struct omap_crtc *omap_crtc = to_omap_crtc(crtc); struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct drm_device *dev = omap_crtc->base.dev;
struct omap_drm_private *priv = dev->dev_private;
bool pending; bool pending;
spin_lock(&crtc->dev->event_lock); spin_lock(&crtc->dev->event_lock);
...@@ -289,7 +288,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) ...@@ -289,7 +288,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
* If the dispc is busy we're racing the flush operation. Try again on * If the dispc is busy we're racing the flush operation. Try again on
* the next vblank interrupt. * the next vblank interrupt.
*/ */
if (dispc_mgr_go_busy(omap_crtc->channel)) { if (priv->dispc_ops->mgr_go_busy(omap_crtc->channel)) {
spin_unlock(&crtc->dev->event_lock); spin_unlock(&crtc->dev->event_lock);
return; return;
} }
...@@ -313,6 +312,22 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) ...@@ -313,6 +312,22 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
DBG("%s: apply done", omap_crtc->name); DBG("%s: apply done", omap_crtc->name);
} }
static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc)
{
struct omap_drm_private *priv = crtc->dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct omap_overlay_manager_info info;
memset(&info, 0, sizeof(info));
info.default_color = 0x000000;
info.trans_enabled = false;
info.partial_alpha_enabled = false;
info.cpr_enable = false;
priv->dispc_ops->mgr_setup(omap_crtc->channel, &info);
}
/* ----------------------------------------------------------------------------- /* -----------------------------------------------------------------------------
* CRTC Functions * CRTC Functions
*/ */
...@@ -358,6 +373,11 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc) ...@@ -358,6 +373,11 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
{ {
struct omap_crtc *omap_crtc = to_omap_crtc(crtc); struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct drm_display_mode *mode = &crtc->state->adjusted_mode; struct drm_display_mode *mode = &crtc->state->adjusted_mode;
struct omap_drm_private *priv = crtc->dev->dev_private;
const u32 flags_mask = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_DE_LOW |
DISPLAY_FLAGS_PIXDATA_POSEDGE | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
DISPLAY_FLAGS_SYNC_POSEDGE | DISPLAY_FLAGS_SYNC_NEGEDGE;
unsigned int i;
DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
omap_crtc->name, mode->base.id, mode->name, omap_crtc->name, mode->base.id, mode->name,
...@@ -367,9 +387,38 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc) ...@@ -367,9 +387,38 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
mode->type, mode->flags); mode->type, mode->flags);
drm_display_mode_to_videomode(mode, &omap_crtc->vm); drm_display_mode_to_videomode(mode, &omap_crtc->vm);
omap_crtc->vm.flags |= DISPLAY_FLAGS_DE_HIGH |
DISPLAY_FLAGS_PIXDATA_POSEDGE | /*
DISPLAY_FLAGS_SYNC_NEGEDGE; * HACK: This fixes the vm flags.
* struct drm_display_mode does not contain the VSYNC/HSYNC/DE flags
* and they get lost when converting back and forth between
* struct drm_display_mode and struct videomode. The hack below
* goes and fetches the missing flags from the panel drivers.
*
* Correct solution would be to use DRM's bus-flags, but that's not
* easily possible before the omapdrm's panel/encoder driver model
* has been changed to the DRM model.
*/
for (i = 0; i < priv->num_encoders; ++i) {
struct drm_encoder *encoder = priv->encoders[i];
if (encoder->crtc == crtc) {
struct omap_dss_device *dssdev;
dssdev = omap_encoder_get_dssdev(encoder);
if (dssdev) {
struct videomode vm = {0};
dssdev->driver->get_timings(dssdev, &vm);
omap_crtc->vm.flags |= vm.flags & flags_mask;
}
break;
}
}
} }
static int omap_crtc_atomic_check(struct drm_crtc *crtc, static int omap_crtc_atomic_check(struct drm_crtc *crtc,
...@@ -394,6 +443,7 @@ static void omap_crtc_atomic_begin(struct drm_crtc *crtc, ...@@ -394,6 +443,7 @@ static void omap_crtc_atomic_begin(struct drm_crtc *crtc,
static void omap_crtc_atomic_flush(struct drm_crtc *crtc, static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state) struct drm_crtc_state *old_crtc_state)
{ {
struct omap_drm_private *priv = crtc->dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc); struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
int ret; int ret;
...@@ -407,9 +457,11 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, ...@@ -407,9 +457,11 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
length = crtc->state->gamma_lut->length / length = crtc->state->gamma_lut->length /
sizeof(*lut); sizeof(*lut);
} }
dispc_mgr_set_gamma(omap_crtc->channel, lut, length); priv->dispc_ops->mgr_set_gamma(omap_crtc->channel, lut, length);
} }
omap_crtc_write_crtc_properties(crtc);
/* Only flush the CRTC if it is currently enabled. */ /* Only flush the CRTC if it is currently enabled. */
if (!omap_crtc->enabled) if (!omap_crtc->enabled)
return; return;
...@@ -420,7 +472,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, ...@@ -420,7 +472,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
WARN_ON(ret != 0); WARN_ON(ret != 0);
spin_lock_irq(&crtc->dev->event_lock); spin_lock_irq(&crtc->dev->event_lock);
dispc_mgr_go(omap_crtc->channel); priv->dispc_ops->mgr_go(omap_crtc->channel);
WARN_ON(omap_crtc->pending); WARN_ON(omap_crtc->pending);
omap_crtc->pending = true; omap_crtc->pending = true;
...@@ -521,6 +573,8 @@ static const char *channel_names[] = { ...@@ -521,6 +573,8 @@ static const char *channel_names[] = {
void omap_crtc_pre_init(void) void omap_crtc_pre_init(void)
{ {
memset(omap_crtcs, 0, sizeof(omap_crtcs));
dss_install_mgr_ops(&mgr_ops); dss_install_mgr_ops(&mgr_ops);
} }
...@@ -531,17 +585,28 @@ void omap_crtc_pre_uninit(void) ...@@ -531,17 +585,28 @@ void omap_crtc_pre_uninit(void)
/* initialize crtc */ /* initialize crtc */
struct drm_crtc *omap_crtc_init(struct drm_device *dev, struct drm_crtc *omap_crtc_init(struct drm_device *dev,
struct drm_plane *plane, enum omap_channel channel, int id) struct drm_plane *plane, struct omap_dss_device *dssdev)
{ {
struct omap_drm_private *priv = dev->dev_private;
struct drm_crtc *crtc = NULL; struct drm_crtc *crtc = NULL;
struct omap_crtc *omap_crtc; struct omap_crtc *omap_crtc;
enum omap_channel channel;
struct omap_dss_device *out;
int ret; int ret;
out = omapdss_find_output_from_display(dssdev);
channel = out->dispc_channel;
omap_dss_put_device(out);
DBG("%s", channel_names[channel]); DBG("%s", channel_names[channel]);
/* Multiple displays on same channel is not allowed */
if (WARN_ON(omap_crtcs[channel] != NULL))
return ERR_PTR(-EINVAL);
omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL); omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
if (!omap_crtc) if (!omap_crtc)
return NULL; return ERR_PTR(-ENOMEM);
crtc = &omap_crtc->base; crtc = &omap_crtc->base;
...@@ -553,8 +618,10 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, ...@@ -553,8 +618,10 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
&omap_crtc_funcs, NULL); &omap_crtc_funcs, NULL);
if (ret < 0) { if (ret < 0) {
dev_err(dev->dev, "%s(): could not init crtc for: %s\n",
__func__, dssdev->name);
kfree(omap_crtc); kfree(omap_crtc);
return NULL; return ERR_PTR(ret);
} }
drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs); drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
...@@ -566,7 +633,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, ...@@ -566,7 +633,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
* extracted with dispc_mgr_gamma_size(). If it returns 0 * extracted with dispc_mgr_gamma_size(). If it returns 0
* gamma table is not supprted. * gamma table is not supprted.
*/ */
if (dispc_mgr_gamma_size(channel)) { if (priv->dispc_ops->mgr_gamma_size(channel)) {
uint gamma_lut_size = 256; uint gamma_lut_size = 256;
drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size);
......
This diff is collapsed.
...@@ -59,6 +59,8 @@ int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait, ...@@ -59,6 +59,8 @@ int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
struct omap_drm_private { struct omap_drm_private {
uint32_t omaprev; uint32_t omaprev;
const struct dispc_ops *dispc_ops;
unsigned int num_crtcs; unsigned int num_crtcs;
struct drm_crtc *crtcs[8]; struct drm_crtc *crtcs[8];
...@@ -135,13 +137,13 @@ enum omap_channel omap_crtc_channel(struct drm_crtc *crtc); ...@@ -135,13 +137,13 @@ enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
void omap_crtc_pre_init(void); void omap_crtc_pre_init(void);
void omap_crtc_pre_uninit(void); void omap_crtc_pre_uninit(void);
struct drm_crtc *omap_crtc_init(struct drm_device *dev, struct drm_crtc *omap_crtc_init(struct drm_device *dev,
struct drm_plane *plane, enum omap_channel channel, int id); struct drm_plane *plane, struct omap_dss_device *dssdev);
int omap_crtc_wait_pending(struct drm_crtc *crtc); int omap_crtc_wait_pending(struct drm_crtc *crtc);
void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus); void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus);
void omap_crtc_vblank_irq(struct drm_crtc *crtc); void omap_crtc_vblank_irq(struct drm_crtc *crtc);
struct drm_plane *omap_plane_init(struct drm_device *dev, struct drm_plane *omap_plane_init(struct drm_device *dev,
int id, enum drm_plane_type type, int idx, enum drm_plane_type type,
u32 possible_crtcs); u32 possible_crtcs);
void omap_plane_install_properties(struct drm_plane *plane, void omap_plane_install_properties(struct drm_plane *plane,
struct drm_mode_object *obj); struct drm_mode_object *obj);
......
...@@ -40,8 +40,8 @@ static void omap_irq_update(struct drm_device *dev) ...@@ -40,8 +40,8 @@ static void omap_irq_update(struct drm_device *dev)
DBG("irqmask=%08x", irqmask); DBG("irqmask=%08x", irqmask);
dispc_write_irqenable(irqmask); priv->dispc_ops->write_irqenable(irqmask);
dispc_read_irqenable(); /* flush posted write */ priv->dispc_ops->read_irqenable(); /* flush posted write */
} }
static void omap_irq_wait_handler(struct omap_irq_wait *wait) static void omap_irq_wait_handler(struct omap_irq_wait *wait)
...@@ -111,7 +111,7 @@ int omap_irq_enable_vblank(struct drm_crtc *crtc) ...@@ -111,7 +111,7 @@ int omap_irq_enable_vblank(struct drm_crtc *crtc)
DBG("dev=%p, crtc=%u", dev, channel); DBG("dev=%p, crtc=%u", dev, channel);
spin_lock_irqsave(&priv->wait_lock, flags); spin_lock_irqsave(&priv->wait_lock, flags);
priv->irq_mask |= dispc_mgr_get_vsync_irq(channel); priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(channel);
omap_irq_update(dev); omap_irq_update(dev);
spin_unlock_irqrestore(&priv->wait_lock, flags); spin_unlock_irqrestore(&priv->wait_lock, flags);
...@@ -137,7 +137,7 @@ void omap_irq_disable_vblank(struct drm_crtc *crtc) ...@@ -137,7 +137,7 @@ void omap_irq_disable_vblank(struct drm_crtc *crtc)
DBG("dev=%p, crtc=%u", dev, channel); DBG("dev=%p, crtc=%u", dev, channel);
spin_lock_irqsave(&priv->wait_lock, flags); spin_lock_irqsave(&priv->wait_lock, flags);
priv->irq_mask &= ~dispc_mgr_get_vsync_irq(channel); priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(channel);
omap_irq_update(dev); omap_irq_update(dev);
spin_unlock_irqrestore(&priv->wait_lock, flags); spin_unlock_irqrestore(&priv->wait_lock, flags);
} }
...@@ -200,9 +200,9 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) ...@@ -200,9 +200,9 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
unsigned int id; unsigned int id;
u32 irqstatus; u32 irqstatus;
irqstatus = dispc_read_irqstatus(); irqstatus = priv->dispc_ops->read_irqstatus();
dispc_clear_irqstatus(irqstatus); priv->dispc_ops->clear_irqstatus(irqstatus);
dispc_read_irqstatus(); /* flush posted write */ priv->dispc_ops->read_irqstatus(); /* flush posted write */
VERB("irqs: %08x", irqstatus); VERB("irqs: %08x", irqstatus);
...@@ -210,12 +210,12 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) ...@@ -210,12 +210,12 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
struct drm_crtc *crtc = priv->crtcs[id]; struct drm_crtc *crtc = priv->crtcs[id];
enum omap_channel channel = omap_crtc_channel(crtc); enum omap_channel channel = omap_crtc_channel(crtc);
if (irqstatus & dispc_mgr_get_vsync_irq(channel)) { if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(channel)) {
drm_handle_vblank(dev, id); drm_handle_vblank(dev, id);
omap_crtc_vblank_irq(crtc); omap_crtc_vblank_irq(crtc);
} }
if (irqstatus & dispc_mgr_get_sync_lost_irq(channel)) if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(channel))
omap_crtc_error_irq(crtc, irqstatus); omap_crtc_error_irq(crtc, irqstatus);
} }
...@@ -249,7 +249,7 @@ static const u32 omap_underflow_irqs[] = { ...@@ -249,7 +249,7 @@ static const u32 omap_underflow_irqs[] = {
int omap_drm_irq_install(struct drm_device *dev) int omap_drm_irq_install(struct drm_device *dev)
{ {
struct omap_drm_private *priv = dev->dev_private; struct omap_drm_private *priv = dev->dev_private;
unsigned int num_mgrs = dss_feat_get_num_mgrs(); unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs();
unsigned int max_planes; unsigned int max_planes;
unsigned int i; unsigned int i;
int ret; int ret;
...@@ -267,13 +267,13 @@ int omap_drm_irq_install(struct drm_device *dev) ...@@ -267,13 +267,13 @@ int omap_drm_irq_install(struct drm_device *dev)
} }
for (i = 0; i < num_mgrs; ++i) for (i = 0; i < num_mgrs; ++i)
priv->irq_mask |= dispc_mgr_get_sync_lost_irq(i); priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(i);
dispc_runtime_get(); priv->dispc_ops->runtime_get();
dispc_clear_irqstatus(0xffffffff); priv->dispc_ops->clear_irqstatus(0xffffffff);
dispc_runtime_put(); priv->dispc_ops->runtime_put();
ret = dispc_request_irq(omap_irq_handler, dev); ret = priv->dispc_ops->request_irq(omap_irq_handler, dev);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -284,25 +284,12 @@ int omap_drm_irq_install(struct drm_device *dev) ...@@ -284,25 +284,12 @@ int omap_drm_irq_install(struct drm_device *dev)
void omap_drm_irq_uninstall(struct drm_device *dev) void omap_drm_irq_uninstall(struct drm_device *dev)
{ {
unsigned long irqflags; struct omap_drm_private *priv = dev->dev_private;
int i;
if (!dev->irq_enabled) if (!dev->irq_enabled)
return; return;
dev->irq_enabled = false; dev->irq_enabled = false;
/* Wake up any waiters so they don't hang. */ priv->dispc_ops->free_irq(dev);
if (dev->num_crtcs) {
spin_lock_irqsave(&dev->vbl_lock, irqflags);
for (i = 0; i < dev->num_crtcs; i++) {
wake_up(&dev->vblank[i].queue);
dev->vblank[i].enabled = false;
dev->vblank[i].last =
dev->driver->get_vblank_counter(dev, i);
}
spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
}
dispc_free_irq(dev);
} }
...@@ -24,12 +24,6 @@ ...@@ -24,12 +24,6 @@
#include "omap_dmm_tiler.h" #include "omap_dmm_tiler.h"
#include "omap_drv.h" #include "omap_drv.h"
/* some hackery because omapdss has an 'enum omap_plane' (which would be
* better named omap_plane_id).. and compiler seems unhappy about having
* both a 'struct omap_plane' and 'enum omap_plane'
*/
#define omap_plane _omap_plane
/* /*
* plane funcs * plane funcs
*/ */
...@@ -38,7 +32,7 @@ ...@@ -38,7 +32,7 @@
struct omap_plane { struct omap_plane {
struct drm_plane base; struct drm_plane base;
int id; /* TODO rename omap_plane -> omap_plane_id in omapdss so I can use the enum */ enum omap_plane_id id;
const char *name; const char *name;
uint32_t nformats; uint32_t nformats;
...@@ -76,6 +70,7 @@ static void omap_plane_cleanup_fb(struct drm_plane *plane, ...@@ -76,6 +70,7 @@ static void omap_plane_cleanup_fb(struct drm_plane *plane,
static void omap_plane_atomic_update(struct drm_plane *plane, static void omap_plane_atomic_update(struct drm_plane *plane,
struct drm_plane_state *old_state) struct drm_plane_state *old_state)
{ {
struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane *omap_plane = to_omap_plane(plane); struct omap_plane *omap_plane = to_omap_plane(plane);
struct drm_plane_state *state = plane->state; struct drm_plane_state *state = plane->state;
struct omap_plane_state *omap_state = to_omap_plane_state(state); struct omap_plane_state *omap_state = to_omap_plane_state(state);
...@@ -123,25 +118,26 @@ static void omap_plane_atomic_update(struct drm_plane *plane, ...@@ -123,25 +118,26 @@ static void omap_plane_atomic_update(struct drm_plane *plane,
DBG("%d,%d %pad %pad", info.pos_x, info.pos_y, DBG("%d,%d %pad %pad", info.pos_x, info.pos_y,
&info.paddr, &info.p_uv_addr); &info.paddr, &info.p_uv_addr);
dispc_ovl_set_channel_out(omap_plane->id, priv->dispc_ops->ovl_set_channel_out(omap_plane->id,
omap_crtc_channel(state->crtc)); omap_crtc_channel(state->crtc));
/* and finally, update omapdss: */ /* and finally, update omapdss: */
ret = dispc_ovl_setup(omap_plane->id, &info, false, ret = priv->dispc_ops->ovl_setup(omap_plane->id, &info,
omap_crtc_timings(state->crtc), false); omap_crtc_timings(state->crtc), false);
if (ret) { if (ret) {
dev_err(plane->dev->dev, "Failed to setup plane %s\n", dev_err(plane->dev->dev, "Failed to setup plane %s\n",
omap_plane->name); omap_plane->name);
dispc_ovl_enable(omap_plane->id, false); priv->dispc_ops->ovl_enable(omap_plane->id, false);
return; return;
} }
dispc_ovl_enable(omap_plane->id, true); priv->dispc_ops->ovl_enable(omap_plane->id, true);
} }
static void omap_plane_atomic_disable(struct drm_plane *plane, static void omap_plane_atomic_disable(struct drm_plane *plane,
struct drm_plane_state *old_state) struct drm_plane_state *old_state)
{ {
struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane_state *omap_state = to_omap_plane_state(plane->state); struct omap_plane_state *omap_state = to_omap_plane_state(plane->state);
struct omap_plane *omap_plane = to_omap_plane(plane); struct omap_plane *omap_plane = to_omap_plane(plane);
...@@ -149,7 +145,7 @@ static void omap_plane_atomic_disable(struct drm_plane *plane, ...@@ -149,7 +145,7 @@ static void omap_plane_atomic_disable(struct drm_plane *plane,
omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY
? 0 : omap_plane->id; ? 0 : omap_plane->id;
dispc_ovl_enable(omap_plane->id, false); priv->dispc_ops->ovl_enable(omap_plane->id, false);
} }
static int omap_plane_atomic_check(struct drm_plane *plane, static int omap_plane_atomic_check(struct drm_plane *plane,
...@@ -328,23 +324,37 @@ static const struct drm_plane_funcs omap_plane_funcs = { ...@@ -328,23 +324,37 @@ static const struct drm_plane_funcs omap_plane_funcs = {
.atomic_get_property = omap_plane_atomic_get_property, .atomic_get_property = omap_plane_atomic_get_property,
}; };
static const char *plane_names[] = { static const char *plane_id_to_name[] = {
[OMAP_DSS_GFX] = "gfx", [OMAP_DSS_GFX] = "gfx",
[OMAP_DSS_VIDEO1] = "vid1", [OMAP_DSS_VIDEO1] = "vid1",
[OMAP_DSS_VIDEO2] = "vid2", [OMAP_DSS_VIDEO2] = "vid2",
[OMAP_DSS_VIDEO3] = "vid3", [OMAP_DSS_VIDEO3] = "vid3",
}; };
static const enum omap_plane_id plane_idx_to_id[] = {
OMAP_DSS_GFX,
OMAP_DSS_VIDEO1,
OMAP_DSS_VIDEO2,
OMAP_DSS_VIDEO3,
};
/* initialize plane */ /* initialize plane */
struct drm_plane *omap_plane_init(struct drm_device *dev, struct drm_plane *omap_plane_init(struct drm_device *dev,
int id, enum drm_plane_type type, int idx, enum drm_plane_type type,
u32 possible_crtcs) u32 possible_crtcs)
{ {
struct omap_drm_private *priv = dev->dev_private;
struct drm_plane *plane; struct drm_plane *plane;
struct omap_plane *omap_plane; struct omap_plane *omap_plane;
enum omap_plane_id id;
int ret; int ret;
DBG("%s: type=%d", plane_names[id], type); if (WARN_ON(idx >= ARRAY_SIZE(plane_idx_to_id)))
return ERR_PTR(-EINVAL);
id = plane_idx_to_id[idx];
DBG("%s: type=%d", plane_id_to_name[id], type);
omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL); omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL);
if (!omap_plane) if (!omap_plane)
...@@ -352,9 +362,9 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, ...@@ -352,9 +362,9 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
omap_plane->nformats = omap_framebuffer_get_formats( omap_plane->nformats = omap_framebuffer_get_formats(
omap_plane->formats, ARRAY_SIZE(omap_plane->formats), omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
dss_feat_get_supported_color_modes(id)); priv->dispc_ops->ovl_get_color_modes(id));
omap_plane->id = id; omap_plane->id = id;
omap_plane->name = plane_names[id]; omap_plane->name = plane_id_to_name[id];
plane = &omap_plane->base; plane = &omap_plane->base;
...@@ -371,6 +381,9 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, ...@@ -371,6 +381,9 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
return plane; return plane;
error: error:
dev_err(dev->dev, "%s(): could not create plane: %s\n",
__func__, plane_id_to_name[id]);
kfree(omap_plane); kfree(omap_plane);
return NULL; return NULL;
} }
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment