Commit e1cd7b80 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Olof Johansson

arm64: dts: bitmain: Add clock controller support for BM1880 SoC

Add clock controller support for Bitmain BM1880 SoC.

Link: https://lore.kernel.org/r/20200114040311.6599-2-manivannan.sadhasivam@linaro.orgSigned-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent a0be4737
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/ */
#include <dt-bindings/clock/bm1880-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/bitmain,bm1880-reset.h> #include <dt-bindings/reset/bitmain,bm1880-reset.h>
...@@ -66,6 +67,12 @@ timer { ...@@ -66,6 +67,12 @@ timer {
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
}; };
osc: osc {
compatible = "fixed-clock";
clock-frequency = <25000000>;
#clock-cells = <0>;
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;
...@@ -94,6 +101,15 @@ pinctrl: pinctrl@400 { ...@@ -94,6 +101,15 @@ pinctrl: pinctrl@400 {
reg = <0x400 0x120>; reg = <0x400 0x120>;
}; };
clk: clock-controller@e8 {
compatible = "bitmain,bm1880-clk";
reg = <0xe8 0x0c>, <0x800 0xb0>;
reg-names = "pll", "sys";
clocks = <&osc>;
clock-names = "osc";
#clock-cells = <1>;
};
rst: reset-controller@c00 { rst: reset-controller@c00 {
compatible = "bitmain,bm1880-reset"; compatible = "bitmain,bm1880-reset";
reg = <0xc00 0x8>; reg = <0xc00 0x8>;
......
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