Commit e337853e authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Mark Brown

ASoC: rsnd: add rsnd_adg_set_ssi_clk() and cleanup adg

This patch adds rsnd_adg_set_ssi_clk() to access to
AUDIO_CLK_SEL0/1/2, and removes last user of
rsnd_write/read/bset which is very low level function.
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent a0732782
...@@ -30,41 +30,41 @@ struct rsnd_adg { ...@@ -30,41 +30,41 @@ struct rsnd_adg {
i++, (pos) = adg->clk[i]) i++, (pos) = adg->clk[i])
#define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg) #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
static enum rsnd_reg rsnd_adg_ssi_reg_get(int id) static void rsnd_adg_set_ssi_clk(struct rsnd_mod *mod, u32 val)
{ {
enum rsnd_reg reg; int id = rsnd_mod_id(mod);
int shift = (id % 4) * 8;
u32 mask = 0xFF << shift;
val = val << shift;
/* /*
* SSI 8 is not connected to ADG. * SSI 8 is not connected to ADG.
* it works with SSI 7 * it works with SSI 7
*/ */
if (id == 8) if (id == 8)
return RSND_REG_MAX; return;
if (0 <= id && id <= 3) switch (id / 4) {
reg = RSND_REG_AUDIO_CLK_SEL0; case 0:
else if (4 <= id && id <= 7) rsnd_mod_bset(mod, AUDIO_CLK_SEL0, mask, val);
reg = RSND_REG_AUDIO_CLK_SEL1; break;
else case 1:
reg = RSND_REG_AUDIO_CLK_SEL2; rsnd_mod_bset(mod, AUDIO_CLK_SEL1, mask, val);
break;
return reg; case 2:
rsnd_mod_bset(mod, AUDIO_CLK_SEL2, mask, val);
break;
}
} }
int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod) int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod)
{ {
struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
enum rsnd_reg reg;
int id;
/* /*
* "mod" = "ssi" here. * "mod" = "ssi" here.
* we can get "ssi id" from mod * we can get "ssi id" from mod
*/ */
id = rsnd_mod_id(mod); rsnd_adg_set_ssi_clk(mod, 0);
reg = rsnd_adg_ssi_reg_get(id);
rsnd_write(priv, mod, reg, 0);
return 0; return 0;
} }
...@@ -75,8 +75,7 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate) ...@@ -75,8 +75,7 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate)
struct rsnd_adg *adg = rsnd_priv_to_adg(priv); struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
struct device *dev = rsnd_priv_to_dev(priv); struct device *dev = rsnd_priv_to_dev(priv);
struct clk *clk; struct clk *clk;
enum rsnd_reg reg; int i;
int id, shift, i;
u32 data; u32 data;
int sel_table[] = { int sel_table[] = {
[CLKA] = 0x1, [CLKA] = 0x1,
...@@ -125,19 +124,10 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate) ...@@ -125,19 +124,10 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate)
* This "mod" = "ssi" here. * This "mod" = "ssi" here.
* we can get "ssi id" from mod * we can get "ssi id" from mod
*/ */
id = rsnd_mod_id(mod); rsnd_adg_set_ssi_clk(mod, data);
reg = rsnd_adg_ssi_reg_get(id);
dev_dbg(dev, "ADG: ssi%d selects clk%d = %d", id, i, rate);
/*
* Enable SSIx clock
*/
shift = (id % 4) * 8;
rsnd_bset(priv, mod, reg, dev_dbg(dev, "ADG: ssi%d selects clk%d = %d",
0xFF << shift, rsnd_mod_id(mod), i, rate);
data << shift);
return 0; return 0;
} }
......
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