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Commit e3e668fc authored by Marco Chiappero's avatar Marco Chiappero Committed by Herbert Xu
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crypto: qat - replace disable_vf2pf_interrupts() 

As a consequence of the refactored VF2PF interrupt handling logic, a
function that disables specific VF2PF interrupts is no longer needed.
Instead, a simpler function that disables all the interrupts, also
hiding the device specific amount of VFs to be disabled from the
pfvf_ops users, would be sufficient.

This patch replaces disable_vf2pf_interrupts() with the new
disable_all_vf2pf_interrupts(), which doesn't need any argument and
disables all the VF2PF interrupts.
Signed-off-by: default avatarMarco Chiappero <marco.chiappero@intel.com>
Reviewed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 8314ae8f
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Showing with 23 additions and 34 deletions
drivers/crypto/qat/qat_common/adf_accel_devices.h
View file @ e3e668fc
...@@ -153,7 +153,7 @@ struct adf_pfvf_ops { ...@@ -153,7 +153,7 @@ struct adf_pfvf_ops {
u32 (*get_pf2vf_offset)(u32 i); u32 (*get_pf2vf_offset)(u32 i);
u32 (*get_vf2pf_offset)(u32 i); u32 (*get_vf2pf_offset)(u32 i);
void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask); void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
void (*disable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask); void (*disable_all_vf2pf_interrupts)(void __iomem *pmisc_addr);
u32 (*disable_pending_vf2pf_interrupts)(void __iomem *pmisc_addr); u32 (*disable_pending_vf2pf_interrupts)(void __iomem *pmisc_addr);
int (*send_msg)(struct adf_accel_dev *accel_dev, struct pfvf_message msg, int (*send_msg)(struct adf_accel_dev *accel_dev, struct pfvf_message msg,
u32 pfvf_offset, struct mutex *csr_lock); u32 pfvf_offset, struct mutex *csr_lock);
......
drivers/crypto/qat/qat_common/adf_common_drv.h
View file @ e3e668fc
...@@ -195,10 +195,9 @@ bool adf_misc_wq_queue_work(struct work_struct *work); ...@@ -195,10 +195,9 @@ bool adf_misc_wq_queue_work(struct work_struct *work);
#if defined(CONFIG_PCI_IOV) #if defined(CONFIG_PCI_IOV)
int adf_sriov_configure(struct pci_dev *pdev, int numvfs); int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
void adf_disable_sriov(struct adf_accel_dev *accel_dev); void adf_disable_sriov(struct adf_accel_dev *accel_dev);
void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
u32 vf_mask);
void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
u32 vf_mask); u32 vf_mask);
void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev);
bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev);
bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr); bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr);
int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev);
......
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
View file @ e3e668fc
...@@ -62,15 +62,12 @@ static void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, ...@@ -62,15 +62,12 @@ static void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr,
} }
} }
static void adf_gen2_disable_vf2pf_interrupts(void __iomem *pmisc_addr, static void adf_gen2_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr)
u32 vf_mask)
{ {
/* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */ /* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */
if (vf_mask & ADF_GEN2_VF_MSK) { u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3)
u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) | ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK);
| ADF_GEN2_ERR_MSK_VF2PF(vf_mask); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);
ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);
}
} }
static u32 adf_gen2_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) static u32 adf_gen2_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr)
...@@ -385,7 +382,7 @@ void adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) ...@@ -385,7 +382,7 @@ void adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
pfvf_ops->get_pf2vf_offset = adf_gen2_pf_get_pfvf_offset; pfvf_ops->get_pf2vf_offset = adf_gen2_pf_get_pfvf_offset;
pfvf_ops->get_vf2pf_offset = adf_gen2_pf_get_pfvf_offset; pfvf_ops->get_vf2pf_offset = adf_gen2_pf_get_pfvf_offset;
pfvf_ops->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts; pfvf_ops->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
pfvf_ops->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts; pfvf_ops->disable_all_vf2pf_interrupts = adf_gen2_disable_all_vf2pf_interrupts;
pfvf_ops->disable_pending_vf2pf_interrupts = adf_gen2_disable_pending_vf2pf_interrupts; pfvf_ops->disable_pending_vf2pf_interrupts = adf_gen2_disable_pending_vf2pf_interrupts;
pfvf_ops->send_msg = adf_gen2_pf2vf_send; pfvf_ops->send_msg = adf_gen2_pf2vf_send;
pfvf_ops->recv_msg = adf_gen2_vf2pf_recv; pfvf_ops->recv_msg = adf_gen2_vf2pf_recv;
......
drivers/crypto/qat/qat_common/adf_gen4_pfvf.c
View file @ e3e668fc
...@@ -46,13 +46,9 @@ static void adf_gen4_enable_vf2pf_interrupts(void __iomem *pmisc_addr, ...@@ -46,13 +46,9 @@ static void adf_gen4_enable_vf2pf_interrupts(void __iomem *pmisc_addr,
ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val); ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val);
} }
static void adf_gen4_disable_vf2pf_interrupts(void __iomem *pmisc_addr, static void adf_gen4_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr)
u32 vf_mask)
{ {
unsigned int val; ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK);
val = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK) | vf_mask;
ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val);
} }
static u32 adf_gen4_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) static u32 adf_gen4_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr)
...@@ -144,7 +140,7 @@ void adf_gen4_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) ...@@ -144,7 +140,7 @@ void adf_gen4_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
pfvf_ops->get_pf2vf_offset = adf_gen4_pf_get_pf2vf_offset; pfvf_ops->get_pf2vf_offset = adf_gen4_pf_get_pf2vf_offset;
pfvf_ops->get_vf2pf_offset = adf_gen4_pf_get_vf2pf_offset; pfvf_ops->get_vf2pf_offset = adf_gen4_pf_get_vf2pf_offset;
pfvf_ops->enable_vf2pf_interrupts = adf_gen4_enable_vf2pf_interrupts; pfvf_ops->enable_vf2pf_interrupts = adf_gen4_enable_vf2pf_interrupts;
pfvf_ops->disable_vf2pf_interrupts = adf_gen4_disable_vf2pf_interrupts; pfvf_ops->disable_all_vf2pf_interrupts = adf_gen4_disable_all_vf2pf_interrupts;
pfvf_ops->disable_pending_vf2pf_interrupts = adf_gen4_disable_pending_vf2pf_interrupts; pfvf_ops->disable_pending_vf2pf_interrupts = adf_gen4_disable_pending_vf2pf_interrupts;
pfvf_ops->send_msg = adf_gen4_pfvf_send; pfvf_ops->send_msg = adf_gen4_pfvf_send;
pfvf_ops->recv_msg = adf_gen4_pfvf_recv; pfvf_ops->recv_msg = adf_gen4_pfvf_recv;
......
drivers/crypto/qat/qat_common/adf_isr.c
View file @ e3e668fc
...@@ -66,13 +66,13 @@ void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask) ...@@ -66,13 +66,13 @@ void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask)
spin_unlock_irqrestore(&accel_dev->pf.vf2pf_ints_lock, flags); spin_unlock_irqrestore(&accel_dev->pf.vf2pf_ints_lock, flags);
} }
void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask) void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev)
{ {
void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&accel_dev->pf.vf2pf_ints_lock, flags); spin_lock_irqsave(&accel_dev->pf.vf2pf_ints_lock, flags);
GET_PFVF_OPS(accel_dev)->disable_vf2pf_interrupts(pmisc_addr, vf_mask); GET_PFVF_OPS(accel_dev)->disable_all_vf2pf_interrupts(pmisc_addr);
spin_unlock_irqrestore(&accel_dev->pf.vf2pf_ints_lock, flags); spin_unlock_irqrestore(&accel_dev->pf.vf2pf_ints_lock, flags);
} }
......
drivers/crypto/qat/qat_common/adf_sriov.c
View file @ e3e668fc
...@@ -106,7 +106,7 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev) ...@@ -106,7 +106,7 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev)
pci_disable_sriov(accel_to_pci_dev(accel_dev)); pci_disable_sriov(accel_to_pci_dev(accel_dev));
/* Disable VF to PF interrupts */ /* Disable VF to PF interrupts */
adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0)); adf_disable_all_vf2pf_interrupts(accel_dev);
/* Clear Valid bits in AE Thread to PCIe Function Mapping */ /* Clear Valid bits in AE Thread to PCIe Function Mapping */
if (hw_data->configure_iov_threads) if (hw_data->configure_iov_threads)
......
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
View file @ e3e668fc
...@@ -126,22 +126,19 @@ static void enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) ...@@ -126,22 +126,19 @@ static void enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask)
} }
} }
static void disable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) static void disable_all_vf2pf_interrupts(void __iomem *pmisc_addr)
{ {
u32 val;
/* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */ /* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */
if (vf_mask & 0xFFFF) { val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3)
u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) | ADF_DH895XCC_ERR_MSK_VF2PF_L(ADF_DH895XCC_VF_MSK);
| ADF_DH895XCC_ERR_MSK_VF2PF_L(vf_mask); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);
ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);
}
/* Disable VF2PF interrupts for VFs 16 through 31 per vf_mask[31:16] */ /* Disable VF2PF interrupts for VFs 16 through 31 per vf_mask[31:16] */
if (vf_mask >> 16) { val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5)
u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) | ADF_DH895XCC_ERR_MSK_VF2PF_U(ADF_DH895XCC_VF_MSK);
| ADF_DH895XCC_ERR_MSK_VF2PF_U(vf_mask); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val);
ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val);
}
} }
static u32 disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) static u32 disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr)
...@@ -240,7 +237,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) ...@@ -240,7 +237,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts; hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts;
hw_data->pfvf_ops.disable_vf2pf_interrupts = disable_vf2pf_interrupts; hw_data->pfvf_ops.disable_all_vf2pf_interrupts = disable_all_vf2pf_interrupts;
hw_data->pfvf_ops.disable_pending_vf2pf_interrupts = disable_pending_vf2pf_interrupts; hw_data->pfvf_ops.disable_pending_vf2pf_interrupts = disable_pending_vf2pf_interrupts;
adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);
} }
......
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