ARM: dts: rockchip: add handles for shared nodes that don't have one yet

Some nodes that are changed in the dtsi hierarchy do not have handles yet.
As it was suggested in the rk3288 submission to do subsequent nodes changes
through such handle-references, add the missing ones.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

arch/arm/boot/dts/rk3066a.dtsi

@@ -86,7 +86,7 @@ cru: clock-controller@20000000 {
 		#reset-cells = <1>;
 	};
 
-	pinctrl@20008000 {
+	pinctrl: pinctrl@20008000 {
 		compatible = "rockchip,rk3066a-pinctrl";
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;

arch/arm/boot/dts/rk3188.dtsi

@@ -82,7 +82,7 @@ cru: clock-controller@20000000 {
 		#reset-cells = <1>;
 	};
 
-	pinctrl@20008000 {
+	pinctrl: pinctrl@20008000 {
 		compatible = "rockchip,rk3188-pinctrl";
 		rockchip,grf = <&grf>;
 		rockchip,pmu = <&pmu>;

arch/arm/boot/dts/rk3xxx.dtsi

@@ -57,14 +57,14 @@ L2: l2-cache-controller@10138000 {
 		cache-level = <2>;
 	};
 
-	global-timer@1013c200 {
+	global_timer: global-timer@1013c200 {
 		compatible = "arm,cortex-a9-global-timer";
 		reg = <0x1013c200 0x20>;
 		interrupts = <GIC_PPI 11 0x304>;
 		clocks = <&cru CORE_PERI>;
 	};
 
-	local-timer@1013c600 {
+	local_timer: local-timer@1013c600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0x1013c600 0x20>;
 		interrupts = <GIC_PPI 13 0x304>;
@@ -111,7 +111,7 @@ uart3: serial@20068000 {
 		status = "disabled";
 	};
 
-	dwmmc@10214000 {
+	mmc0: dwmmc@10214000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10214000 0x1000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@ dwmmc@10214000 {
 		status = "disabled";
 	};
 
-	dwmmc@10218000 {
+	mmc1: dwmmc@10218000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10218000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;