Commit e40f97ef authored by Thomas Zimmermann's avatar Thomas Zimmermann Committed by Patrik Jakobsson

drm/gma500: Drop DRM_GMA600 config option

With support for the MID-only Medfield chips removed, simply build
the complete driver if DRM_GMA500 has been selected. Anyone who wants
to enable one of the chips would probably also want the rest.
Signed-off-by: default avatarThomas Zimmermann <tzimmermann@suse.de>
Fixes: 837f23bb ("drm/gma500: Drop DRM_GMA3600 config option")
Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: default avatarPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210209112721.3421-1-tzimmermann@suse.de
parent 6f02e9df
...@@ -9,12 +9,5 @@ config DRM_GMA500 ...@@ -9,12 +9,5 @@ config DRM_GMA500
select INPUT if ACPI select INPUT if ACPI
help help
Say yes for an experimental 2D KMS framebuffer driver for the Say yes for an experimental 2D KMS framebuffer driver for the
Intel GMA500 ('Poulsbo') and other Intel IMG based graphics Intel GMA500 (Poulsbo), Intel GMA600 (Moorestown/Oak Trail) and
devices. Intel GMA3600/3650 (Cedar Trail).
config DRM_GMA600
bool "Intel GMA600 support (Experimental)"
depends on DRM_GMA500
help
Say yes to include support for GMA600 (Intel Moorestown/Oaktrail)
platforms with LVDS ports. MIPI is not currently supported.
...@@ -23,6 +23,12 @@ gma500_gfx-y += \ ...@@ -23,6 +23,12 @@ gma500_gfx-y += \
intel_i2c.o \ intel_i2c.o \
mid_bios.o \ mid_bios.o \
mmu.o \ mmu.o \
oaktrail_device.o \
oaktrail_crtc.o \
oaktrail_hdmi.o \
oaktrail_hdmi_i2c.o \
oaktrail_lvds.o \
oaktrail_lvds_i2c.o \
power.o \ power.o \
psb_device.o \ psb_device.o \
psb_drv.o \ psb_drv.o \
...@@ -33,13 +39,6 @@ gma500_gfx-y += \ ...@@ -33,13 +39,6 @@ gma500_gfx-y += \
psb_lid.o \ psb_lid.o \
psb_irq.o psb_irq.o
gma500_gfx-$(CONFIG_ACPI) += opregion.o \ gma500_gfx-$(CONFIG_ACPI) += opregion.o
gma500_gfx-$(CONFIG_DRM_GMA600) += oaktrail_device.o \
oaktrail_crtc.o \
oaktrail_lvds.o \
oaktrail_lvds_i2c.o \
oaktrail_hdmi.o \
oaktrail_hdmi_i2c.o
obj-$(CONFIG_DRM_GMA500) += gma500_gfx.o obj-$(CONFIG_DRM_GMA500) += gma500_gfx.o
...@@ -54,7 +54,7 @@ static const struct pci_device_id pciidlist[] = { ...@@ -54,7 +54,7 @@ static const struct pci_device_id pciidlist[] = {
/* Poulsbo */ /* Poulsbo */
{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
#if defined(CONFIG_DRM_GMA600) /* Oak Trail */
{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
...@@ -64,8 +64,7 @@ static const struct pci_device_id pciidlist[] = { ...@@ -64,8 +64,7 @@ static const struct pci_device_id pciidlist[] = {
{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
#endif /* Cedar Trail */
/* Cedartrail */
{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
......
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