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Commit e4a0709d authored by Gregory CLEMENT's avatar Gregory CLEMENT
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ARM: dts: armada-375: Add node labels 

As it was previously done for kirkwood and for aramda 370/XP, this adds
missing node labels to Armada 375 and SoC specific nodes to allow to
reference them more easily.
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent baa2f744
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Showing with 31 additions and 31 deletions
arch/arm/boot/dts/armada-375.dtsi
View file @ e4a0709d
......@@ -84,12 +84,12 @@ cpus {
#size-cells = <0>;
enable-method = "marvell,armada-375-smp";
cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
......@@ -115,7 +115,7 @@ bootrom {
reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
};
devbus-bootcs {
devbus_bootcs: devbus-bootcs {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
......@@ -125,7 +125,7 @@ devbus-bootcs {
status = "disabled";
};
devbus-cs0 {
devbus_cs0: devbus-cs0 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
......@@ -135,7 +135,7 @@ devbus-cs0 {
status = "disabled";
};
devbus-cs1 {
devbus_cs1: devbus-cs1 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
......@@ -145,7 +145,7 @@ devbus-cs1 {
status = "disabled";
};
devbus-cs2 {
devbus_cs2: devbus-cs2 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
......@@ -155,7 +155,7 @@ devbus-cs2 {
status = "disabled";
};
devbus-cs3 {
devbus_cs3: devbus-cs3 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
......@@ -182,12 +182,12 @@ L2: cache-controller@8000 {
prefetch-data = <1>;
};
scu@c000 {
scu: scu@c000 {
compatible = "arm,cortex-a9-scu";
reg = <0xc000 0x58>;
};
timer@c600 {
timer0: timer@c600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xc600 0x20>;
interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
......@@ -203,7 +203,7 @@ gic: interrupt-controller@d000 {
<0xc100 0x100>;
};
mdio {
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
......@@ -212,7 +212,7 @@ mdio {
};
/* Network controller */
ethernet@f0000 {
ethernet: ethernet@f0000 {
compatible = "marvell,armada-375-pp2";
reg = <0xf0000 0xa000>, /* Packet Processor regs */
<0xc0000 0x3060>, /* LMS regs */
......@@ -235,7 +235,7 @@ eth1: eth1@c5000 {
};
};
rtc@10300 {
rtc: rtc@10300 {
compatible = "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
......@@ -307,7 +307,7 @@ uart1: serial@12100 {
status = "disabled";
};
pinctrl {
pinctrl: pinctrl {
compatible = "marvell,mv88f6720-pinctrl";
reg = <0x18000 0x24>;
......@@ -382,7 +382,7 @@ gpio2: gpio@18180 {
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
};
system-controller@18200 {
systemc: system-controller@18200 {
compatible = "marvell,armada-375-system-controller";
reg = <0x18200 0x100>;
};
......@@ -415,7 +415,7 @@ mpic: interrupt-controller@20a00 {
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
timer@20300 {
timer1: timer@20300 {
compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
......@@ -428,24 +428,24 @@ timer@20300 {
clock-names = "nbclk", "fixed";
};
watchdog@20300 {
watchdog: watchdog@20300 {
compatible = "marvell,armada-375-wdt";
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
clocks = <&coreclk 0>, <&refclk>;
clock-names = "nbclk", "fixed";
};
cpurst@20800 {
cpurst: cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x10>;
};
coherency-fabric@21010 {
coherencyfab: coherency-fabric@21010 {
compatible = "marvell,armada-375-coherency-fabric";
reg = <0x21010 0x1c>;
};
usb@50000 {
usb0: usb@50000 {
compatible = "marvell,orion-ehci";
reg = <0x50000 0x500>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
......@@ -455,7 +455,7 @@ usb@50000 {
status = "disabled";
};
usb@54000 {
usb1: usb@54000 {
compatible = "marvell,orion-ehci";
reg = <0x54000 0x500>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
......@@ -463,7 +463,7 @@ usb@54000 {
status = "disabled";
};
usb3@58000 {
usb2: usb3@58000 {
compatible = "marvell,armada-375-xhci";
reg = <0x58000 0x20000>,<0x5b880 0x80>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
......@@ -473,7 +473,7 @@ usb3@58000 {
status = "disabled";
};
xor@60800 {
xor0: xor@60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
0x60A00 0x100>;
......@@ -493,7 +493,7 @@ xor01 {
};
};
xor@60900 {
xor1: xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
......@@ -513,7 +513,7 @@ xor11 {
};
};
crypto@90000 {
cesa: crypto@90000 {
compatible = "marvell,armada-375-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
......@@ -528,7 +528,7 @@ crypto@90000 {
marvell,crypto-sram-size = <0x800>;
};
sata@a0000 {
sata: sata@a0000 {
compatible = "marvell,armada-370-sata";
reg = <0xa0000 0x5000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
......@@ -537,7 +537,7 @@ sata@a0000 {
status = "disabled";
};
nand@d0000 {
nand: nand@d0000 {
compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>;
#address-cells = <1>;
......@@ -547,7 +547,7 @@ nand@d0000 {
status = "disabled";
};
mvsdio@d4000 {
sdio: mvsdio@d4000 {
compatible = "marvell,orion-sdio";
reg = <0xd4000 0x200>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
......@@ -559,7 +559,7 @@ mvsdio@d4000 {
status = "disabled";
};
thermal@e8078 {
thermal: thermal@e8078 {
compatible = "marvell,armada375-thermal";
reg = <0xe8078 0x4>, <0xe807c 0x8>;
status = "okay";
......@@ -580,7 +580,7 @@ coredivclk: corediv-clock@e8250 {
};
};
pcie-controller {
pciec: pcie-controller {
compatible = "marvell,armada-370-pcie";
status = "disabled";
device_type = "pci";
......@@ -599,7 +599,7 @@ pcie-controller {
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1 MEM */
0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1 IO */>;
pcie@1,0 {
pcie0: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
......@@ -616,7 +616,7 @@ pcie@1,0 {
status = "disabled";
};
pcie@2,0 {
pcie1: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
......
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