Commit e58aee95 authored by Clemens Ladisch's avatar Clemens Ladisch Committed by Jaroslav Kysela

[ALSA] oxygen: save register writes

Save the written values of all CMI8788 and AC97 registers and of some of
the DAC/ADC registers so that it is possible to restore the register
state later.
Signed-off-by: default avatarClemens Ladisch <clemens@ladisch.de>
Signed-off-by: default avatarJaroslav Kysela <perex@perex.cz>
parent c1365007
......@@ -80,6 +80,7 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids);
struct generic_data {
u8 ak4396_ctl2;
u16 saved_wm8785_registers[2];
};
static void ak4396_write(struct oxygen *chip, unsigned int codec,
......@@ -99,12 +100,16 @@ static void ak4396_write(struct oxygen *chip, unsigned int codec,
static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
{
struct generic_data *data = chip->model_data;
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
OXYGEN_SPI_DATA_LENGTH_2 |
OXYGEN_SPI_CLOCK_160 |
(3 << OXYGEN_SPI_CODEC_SHIFT) |
OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
(reg << 9) | value);
if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
data->saved_wm8785_registers[reg] = value;
}
static void ak4396_init(struct oxygen *chip)
......@@ -135,10 +140,16 @@ static void ak5385_init(struct oxygen *chip)
static void wm8785_init(struct oxygen *chip)
{
struct generic_data *data = chip->model_data;
data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE |
WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
data->saved_wm8785_registers[1] = WM8785_WL_24;
wm8785_write(chip, WM8785_R7, 0);
wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
wm8785_write(chip, WM8785_R1, WM8785_WL_24);
wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
snd_component_add(chip->card, "WM8785");
}
......
......@@ -80,6 +80,12 @@ struct oxygen {
struct work_struct spdif_input_bits_work;
struct work_struct gpio_work;
wait_queue_head_t ac97_waitqueue;
union {
u8 _8[OXYGEN_IO_SIZE];
__le16 _16[OXYGEN_IO_SIZE / 2];
__le32 _32[OXYGEN_IO_SIZE / 4];
} saved_registers;
u16 saved_ac97_registers[2][0x40];
};
struct oxygen_model {
......
......@@ -44,18 +44,21 @@ EXPORT_SYMBOL(oxygen_read32);
void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
{
outb(value, chip->addr + reg);
chip->saved_registers._8[reg] = value;
}
EXPORT_SYMBOL(oxygen_write8);
void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
{
outw(value, chip->addr + reg);
chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
}
EXPORT_SYMBOL(oxygen_write16);
void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
{
outl(value, chip->addr + reg);
chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
}
EXPORT_SYMBOL(oxygen_write32);
......@@ -63,7 +66,10 @@ void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
u8 value, u8 mask)
{
u8 tmp = inb(chip->addr + reg);
outb((tmp & ~mask) | (value & mask), chip->addr + reg);
tmp &= ~mask;
tmp |= value & mask;
outb(tmp, chip->addr + reg);
chip->saved_registers._8[reg] = tmp;
}
EXPORT_SYMBOL(oxygen_write8_masked);
......@@ -71,7 +77,10 @@ void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
u16 value, u16 mask)
{
u16 tmp = inw(chip->addr + reg);
outw((tmp & ~mask) | (value & mask), chip->addr + reg);
tmp &= ~mask;
tmp |= value & mask;
outw(tmp, chip->addr + reg);
chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
}
EXPORT_SYMBOL(oxygen_write16_masked);
......@@ -79,7 +88,10 @@ void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
u32 value, u32 mask)
{
u32 tmp = inl(chip->addr + reg);
outl((tmp & ~mask) | (value & mask), chip->addr + reg);
tmp &= ~mask;
tmp |= value & mask;
outl(tmp, chip->addr + reg);
chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
}
EXPORT_SYMBOL(oxygen_write32_masked);
......@@ -128,8 +140,10 @@ void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
/* require two "completed" writes, just to be sure */
if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
++succeeded >= 2)
++succeeded >= 2) {
chip->saved_ac97_registers[codec][index / 2] = data;
return;
}
}
snd_printk(KERN_ERR "AC'97 write timeout\n");
}
......
......@@ -132,6 +132,9 @@ struct xonar_data {
u8 ext_power_int_reg;
u8 ext_power_bit;
u8 has_power;
u8 pcm1796_oversampling;
u8 cs4398_fm;
u8 cs4362a_fm;
};
static void pcm1796_write(struct oxygen *chip, unsigned int codec,
......@@ -186,12 +189,13 @@ static void xonar_d2_init(struct oxygen *chip)
data->anti_pop_delay = 300;
data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
data->pcm1796_oversampling = PCM1796_OS_64;
for (i = 0; i < 4; ++i) {
pcm1796_write(chip, i, 18, PCM1796_MUTE | PCM1796_DMF_DISABLED |
PCM1796_FMT_24_LJUST | PCM1796_ATLD);
pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
pcm1796_write(chip, i, 20, PCM1796_OS_64);
pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
pcm1796_write(chip, i, 21, 0);
pcm1796_write(chip, i, 16, 0x0f); /* set ATL/ATR after ATLD */
pcm1796_write(chip, i, 17, 0x0f);
......@@ -226,6 +230,9 @@ static void xonar_dx_init(struct oxygen *chip)
data->ext_power_reg = OXYGEN_GPI_DATA;
data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
data->ext_power_bit = GPI_DX_EXT_POWER;
data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
data->cs4362a_fm = CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
OXYGEN_2WIRE_LENGTH_8 |
......@@ -236,8 +243,7 @@ static void xonar_dx_init(struct oxygen *chip)
cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
/* configure */
cs4398_write(chip, 2, CS4398_FM_SINGLE |
CS4398_DEM_NONE | CS4398_DIF_LJUST);
cs4398_write(chip, 2, data->cs4398_fm);
cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE);
cs4398_write(chip, 5, 0xfe);
......@@ -249,16 +255,13 @@ static void xonar_dx_init(struct oxygen *chip)
CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
cs4362a_write(chip, 0x05, 0);
cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x06, data->cs4362a_fm);
cs4362a_write(chip, 0x07, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x08, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x09, data->cs4362a_fm);
cs4362a_write(chip, 0x0a, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0b, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x0c, data->cs4362a_fm);
cs4362a_write(chip, 0x0d, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0e, 0x7f | CS4362A_MUTE);
/* clear power down */
......@@ -294,12 +297,13 @@ static void xonar_dx_cleanup(struct oxygen *chip)
static void set_pcm1796_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
struct xonar_data *data = chip->model_data;
unsigned int i;
u8 value;
value = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
data->pcm1796_oversampling =
params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
for (i = 0; i < 4; ++i)
pcm1796_write(chip, i, 20, value);
pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
}
static void update_pcm1796_volume(struct oxygen *chip)
......@@ -342,24 +346,24 @@ static void set_cs53x1_params(struct oxygen *chip,
static void set_cs43xx_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
u8 fm_cs4398, fm_cs4362a;
struct xonar_data *data = chip->model_data;
fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST;
fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST;
data->cs4362a_fm = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
if (params_rate(params) <= 50000) {
fm_cs4398 |= CS4398_FM_SINGLE;
fm_cs4362a |= CS4362A_FM_SINGLE;
data->cs4398_fm |= CS4398_FM_SINGLE;
data->cs4362a_fm |= CS4362A_FM_SINGLE;
} else if (params_rate(params) <= 100000) {
fm_cs4398 |= CS4398_FM_DOUBLE;
fm_cs4362a |= CS4362A_FM_DOUBLE;
data->cs4398_fm |= CS4398_FM_DOUBLE;
data->cs4362a_fm |= CS4362A_FM_DOUBLE;
} else {
fm_cs4398 |= CS4398_FM_QUAD;
fm_cs4362a |= CS4362A_FM_QUAD;
data->cs4398_fm |= CS4398_FM_QUAD;
data->cs4362a_fm |= CS4362A_FM_QUAD;
}
cs4398_write(chip, 2, fm_cs4398);
cs4362a_write(chip, 0x06, fm_cs4362a);
cs4362a_write(chip, 0x09, fm_cs4362a);
cs4362a_write(chip, 0x0c, fm_cs4362a);
cs4398_write(chip, 2, data->cs4398_fm);
cs4362a_write(chip, 0x06, data->cs4362a_fm);
cs4362a_write(chip, 0x09, data->cs4362a_fm);
cs4362a_write(chip, 0x0c, data->cs4362a_fm);
}
static void update_cs4362a_volumes(struct oxygen *chip)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment