Commit e5b83a04 authored by Robin Murphy's avatar Robin Murphy Committed by Greg Kroah-Hartman

ARM: 8165/1: alignment: don't break misaligned NEON load/store

commit 5ca918e5 upstream.

The alignment fixup incorrectly decodes faulting ARM VLDn/VSTn
instructions (where the optional alignment hint is given but incorrect)
as LDR/STR, leading to register corruption. Detect these and correctly
treat them as unhandled, so that userspace gets the fault it expects.
Reported-by: default avatarSimon Hosie <simon.hosie@arm.com>
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 32e8dec8
...@@ -41,6 +41,7 @@ ...@@ -41,6 +41,7 @@
* This code is not portable to processors with late data abort handling. * This code is not portable to processors with late data abort handling.
*/ */
#define CODING_BITS(i) (i & 0x0e000000) #define CODING_BITS(i) (i & 0x0e000000)
#define COND_BITS(i) (i & 0xf0000000)
#define LDST_I_BIT(i) (i & (1 << 26)) /* Immediate constant */ #define LDST_I_BIT(i) (i & (1 << 26)) /* Immediate constant */
#define LDST_P_BIT(i) (i & (1 << 24)) /* Preindex */ #define LDST_P_BIT(i) (i & (1 << 24)) /* Preindex */
...@@ -819,6 +820,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) ...@@ -819,6 +820,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
break; break;
case 0x04000000: /* ldr or str immediate */ case 0x04000000: /* ldr or str immediate */
if (COND_BITS(instr) == 0xf0000000) /* NEON VLDn, VSTn */
goto bad;
offset.un = OFFSET_BITS(instr); offset.un = OFFSET_BITS(instr);
handler = do_alignment_ldrstr; handler = do_alignment_ldrstr;
break; break;
......
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