Commit e6423407 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-2.6.31' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6

* 'for-2.6.31' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (34 commits)
  ide-cd: prevent null pointer deref via cdrom_newpc_intr
  ide: BUG() on unknown requests
  ide: filter out invalid DMA xfer mode changes in HDIO_DRIVE_CMD ioctl handler
  ide: do not access ide_drive_t 'drive_data' field directly
  sl82c105: implement test_irq() method
  siimage: implement test_irq() method
  pdc202xx_old: implement test_irq() method (take 2)
  cmd64x: implement test_irq() method
  cmd640: implement test_irq() method
  ide: move ack_intr() method into 'struct ide_port_ops' (take 2)
  ide: move IRQ clearing from ack_intr() method to clear_irq() method (take 2)
  siimage: use ide_dma_test_irq() (take 2)
  cmd64x: implement clear_irq() method (take 2)
  ide: call clear_irq() method in ide_timer_expiry()
  sgiioc4: coding style cleanup
  ide: don't enable IORDY at a probe time
  ide: IORDY handling fixes
  ata: add ata_id_pio_need_iordy() helper (v2)
  ide-tape: fix build issue
  ide: unify interrupt reason checking
  ...
parents 7f818906 39c58f37
......@@ -185,8 +185,7 @@ static void at91_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
timing = ide_timing_find_mode(XFER_PIO_0 + pio);
BUG_ON(!timing);
if ((pio > 2 || ata_id_has_iordy(drive->id)) &&
!(ata_id_is_cfa(drive->id) && pio > 4))
if (ide_pio_need_iordy(drive, pio))
use_iordy = 1;
apply_timings(chipselect, pio, timing, use_iordy);
......
......@@ -99,7 +99,7 @@ static const char *buddha_board_name[] = { "Buddha", "Catweasel", "X-Surf" };
* Check and acknowledge the interrupt status
*/
static int buddha_ack_intr(ide_hwif_t *hwif)
static int buddha_test_irq(ide_hwif_t *hwif)
{
unsigned char ch;
......@@ -109,21 +109,16 @@ static int buddha_ack_intr(ide_hwif_t *hwif)
return 1;
}
static int xsurf_ack_intr(ide_hwif_t *hwif)
static void xsurf_clear_irq(ide_drive_t *drive)
{
unsigned char ch;
ch = z_readb(hwif->io_ports.irq_addr);
/* X-Surf needs a 0 written to IRQ register to ensure ISA bit A11 stays at 0 */
z_writeb(0, hwif->io_ports.irq_addr);
if (!(ch & 0x80))
return 0;
return 1;
/*
* X-Surf needs 0 written to IRQ register to ensure ISA bit A11 stays at 0
*/
z_writeb(0, drive->hwif->io_ports.irq_addr);
}
static void __init buddha_setup_ports(struct ide_hw *hw, unsigned long base,
unsigned long ctl, unsigned long irq_port,
ide_ack_intr_t *ack_intr)
unsigned long ctl, unsigned long irq_port)
{
int i;
......@@ -138,10 +133,19 @@ static void __init buddha_setup_ports(struct ide_hw *hw, unsigned long base,
hw->io_ports.irq_addr = irq_port;
hw->irq = IRQ_AMIGA_PORTS;
hw->ack_intr = ack_intr;
}
static const struct ide_port_ops buddha_port_ops = {
.test_irq = buddha_test_irq,
};
static const struct ide_port_ops xsurf_port_ops = {
.clear_irq = xsurf_clear_irq,
.test_irq = buddha_test_irq,
};
static const struct ide_port_info buddha_port_info = {
.port_ops = &buddha_port_ops,
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
.irq_flags = IRQF_SHARED,
.chipset = ide_generic,
......@@ -161,6 +165,7 @@ static int __init buddha_init(void)
while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
unsigned long board;
struct ide_hw hw[MAX_NUM_HWIFS], *hws[MAX_NUM_HWIFS];
struct ide_port_info d = buddha_port_info;
if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA) {
buddha_num_hwifs = BUDDHA_NUM_HWIFS;
......@@ -171,6 +176,7 @@ static int __init buddha_init(void)
} else if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF) {
buddha_num_hwifs = XSURF_NUM_HWIFS;
type=BOARD_XSURF;
d.port_ops = &xsurf_port_ops;
} else
continue;
......@@ -203,28 +209,24 @@ static int __init buddha_init(void)
for (i = 0; i < buddha_num_hwifs; i++) {
unsigned long base, ctl, irq_port;
ide_ack_intr_t *ack_intr;
if (type != BOARD_XSURF) {
base = buddha_board + buddha_bases[i];
ctl = base + BUDDHA_CONTROL;
irq_port = buddha_board + buddha_irqports[i];
ack_intr = buddha_ack_intr;
} else {
base = buddha_board + xsurf_bases[i];
/* X-Surf has no CS1* (Control/AltStat) */
ctl = 0;
irq_port = buddha_board + xsurf_irqports[i];
ack_intr = xsurf_ack_intr;
}
buddha_setup_ports(&hw[i], base, ctl, irq_port,
ack_intr);
buddha_setup_ports(&hw[i], base, ctl, irq_port);
hws[i] = &hw[i];
}
ide_host_add(&buddha_port_info, hws, i, NULL);
ide_host_add(&d, hws, i, NULL);
}
return 0;
......
......@@ -153,6 +153,7 @@ static int cmd640_vlb;
#define ARTTIM23 0x57
#define ARTTIM23_DIS_RA2 0x04
#define ARTTIM23_DIS_RA3 0x08
#define ARTTIM23_IDE23INTR 0x10
#define DRWTIM23 0x58
#define BRST 0x59
......@@ -629,12 +630,24 @@ static void cmd640_init_dev(ide_drive_t *drive)
#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
}
static int cmd640_test_irq(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
int irq_reg = hwif->channel ? ARTTIM23 : CFR;
u8 irq_stat, irq_mask = hwif->channel ? ARTTIM23_IDE23INTR :
CFR_IDE01INTR;
pci_read_config_byte(dev, irq_reg, &irq_stat);
return (irq_stat & irq_mask) ? 1 : 0;
}
static const struct ide_port_ops cmd640_port_ops = {
.init_dev = cmd640_init_dev,
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
.set_pio_mode = cmd640_set_pio_mode,
#endif
.test_irq = cmd640_test_irq,
};
static int pci_conf1(void)
......
......@@ -7,7 +7,7 @@
* Copyright (C) 1998 David S. Miller (davem@redhat.com)
*
* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
* Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
* Copyright (C) 2007,2009 MontaVista Software, Inc. <source@mvista.com>
*/
#include <linux/module.h>
......@@ -118,8 +118,9 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
unsigned long setup_count;
unsigned int cycle_time;
u8 setup_count, arttim = 0;
u8 arttim = 0;
static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
......@@ -140,10 +141,11 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
if (hwif->channel) {
ide_drive_t *pair = ide_get_pair_dev(drive);
drive->drive_data = setup_count;
ide_set_drivedata(drive, (void *)setup_count);
if (pair)
setup_count = max_t(u8, setup_count, pair->drive_data);
setup_count = max_t(u8, setup_count,
(unsigned long)ide_get_drivedata(pair));
}
if (setup_count > 5) /* shouldn't actually happen... */
......@@ -226,11 +228,11 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
(void) pci_write_config_byte(dev, pciU, regU);
}
static int cmd648_dma_end(ide_drive_t *drive)
static void cmd648_clear_irq(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
unsigned long base = hwif->dma_base - (hwif->channel * 8);
int err = ide_dma_end(drive);
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long base = pci_resource_start(dev, 4);
u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
MRDMODE_INTR_CH0;
u8 mrdmode = inb(base + 1);
......@@ -238,11 +240,9 @@ static int cmd648_dma_end(ide_drive_t *drive)
/* clear the interrupt bit */
outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask,
base + 1);
return err;
}
static int cmd64x_dma_end(ide_drive_t *drive)
static void cmd64x_clear_irq(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
......@@ -250,62 +250,40 @@ static int cmd64x_dma_end(ide_drive_t *drive)
u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
CFR_INTR_CH0;
u8 irq_stat = 0;
int err = ide_dma_end(drive);
(void) pci_read_config_byte(dev, irq_reg, &irq_stat);
/* clear the interrupt bit */
(void) pci_write_config_byte(dev, irq_reg, irq_stat | irq_mask);
return err;
}
static int cmd648_dma_test_irq(ide_drive_t *drive)
static int cmd648_test_irq(ide_hwif_t *hwif)
{
ide_hwif_t *hwif = drive->hwif;
unsigned long base = hwif->dma_base - (hwif->channel * 8);
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long base = pci_resource_start(dev, 4);
u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
MRDMODE_INTR_CH0;
u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
u8 mrdmode = inb(base + 1);
#ifdef DEBUG
printk("%s: dma_stat: 0x%02x mrdmode: 0x%02x irq_mask: 0x%02x\n",
drive->name, dma_stat, mrdmode, irq_mask);
#endif
if (!(mrdmode & irq_mask))
return 0;
/* return 1 if INTR asserted */
if (dma_stat & 4)
return 1;
pr_debug("%s: mrdmode: 0x%02x irq_mask: 0x%02x\n",
hwif->name, mrdmode, irq_mask);
return 0;
return (mrdmode & irq_mask) ? 1 : 0;
}
static int cmd64x_dma_test_irq(ide_drive_t *drive)
static int cmd64x_test_irq(ide_hwif_t *hwif)
{
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int irq_reg = hwif->channel ? ARTTIM23 : CFR;
u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
CFR_INTR_CH0;
u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
u8 irq_stat = 0;
(void) pci_read_config_byte(dev, irq_reg, &irq_stat);
#ifdef DEBUG
printk("%s: dma_stat: 0x%02x irq_stat: 0x%02x irq_mask: 0x%02x\n",
drive->name, dma_stat, irq_stat, irq_mask);
#endif
if (!(irq_stat & irq_mask))
return 0;
/* return 1 if INTR asserted */
if (dma_stat & 4)
return 1;
pr_debug("%s: irq_stat: 0x%02x irq_mask: 0x%02x\n",
hwif->name, irq_stat, irq_mask);
return 0;
return (irq_stat & irq_mask) ? 1 : 0;
}
/*
......@@ -370,18 +348,17 @@ static u8 cmd64x_cable_detect(ide_hwif_t *hwif)
static const struct ide_port_ops cmd64x_port_ops = {
.set_pio_mode = cmd64x_set_pio_mode,
.set_dma_mode = cmd64x_set_dma_mode,
.clear_irq = cmd64x_clear_irq,
.test_irq = cmd64x_test_irq,
.cable_detect = cmd64x_cable_detect,
};
static const struct ide_dma_ops cmd64x_dma_ops = {
.dma_host_set = ide_dma_host_set,
.dma_setup = ide_dma_setup,
.dma_start = ide_dma_start,
.dma_end = cmd64x_dma_end,
.dma_test_irq = cmd64x_dma_test_irq,
.dma_lost_irq = ide_dma_lost_irq,
.dma_timer_expiry = ide_dma_sff_timer_expiry,
.dma_sff_read_status = ide_dma_sff_read_status,
static const struct ide_port_ops cmd648_port_ops = {
.set_pio_mode = cmd64x_set_pio_mode,
.set_dma_mode = cmd64x_set_dma_mode,
.clear_irq = cmd648_clear_irq,
.test_irq = cmd648_test_irq,
.cable_detect = cmd64x_cable_detect,
};
static const struct ide_dma_ops cmd646_rev1_dma_ops = {
......@@ -395,24 +372,12 @@ static const struct ide_dma_ops cmd646_rev1_dma_ops = {
.dma_sff_read_status = ide_dma_sff_read_status,
};
static const struct ide_dma_ops cmd648_dma_ops = {
.dma_host_set = ide_dma_host_set,
.dma_setup = ide_dma_setup,
.dma_start = ide_dma_start,
.dma_end = cmd648_dma_end,
.dma_test_irq = cmd648_dma_test_irq,
.dma_lost_irq = ide_dma_lost_irq,
.dma_timer_expiry = ide_dma_sff_timer_expiry,
.dma_sff_read_status = ide_dma_sff_read_status,
};
static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
{ /* 0: CMD643 */
.name = DRV_NAME,
.init_chipset = init_chipset_cmd64x,
.enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
.port_ops = &cmd64x_port_ops,
.dma_ops = &cmd64x_dma_ops,
.host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
......@@ -423,8 +388,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.name = DRV_NAME,
.init_chipset = init_chipset_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
.port_ops = &cmd64x_port_ops,
.dma_ops = &cmd648_dma_ops,
.port_ops = &cmd648_port_ops,
.host_flags = IDE_HFLAG_SERIALIZE |
IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
......@@ -435,8 +399,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.name = DRV_NAME,
.init_chipset = init_chipset_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
.port_ops = &cmd64x_port_ops,
.dma_ops = &cmd648_dma_ops,
.port_ops = &cmd648_port_ops,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
......@@ -446,8 +409,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.name = DRV_NAME,
.init_chipset = init_chipset_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
.port_ops = &cmd64x_port_ops,
.dma_ops = &cmd648_dma_ops,
.port_ops = &cmd648_port_ops,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
......@@ -484,10 +446,9 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic
*/
if (dev->revision < 3) {
d.enablebits[0].reg = 0;
d.port_ops = &cmd64x_port_ops;
if (dev->revision == 1)
d.dma_ops = &cmd646_rev1_dma_ops;
else
d.dma_ops = &cmd64x_dma_ops;
}
}
}
......
......@@ -146,14 +146,16 @@ static void cs5536_set_pio_mode(ide_drive_t *drive, const u8 pio)
struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
ide_drive_t *pair = ide_get_pair_dev(drive);
int cshift = (drive->dn & 1) ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u32 cast;
u8 cmd_pio = pio;
if (pair)
cmd_pio = min(pio, ide_get_best_pio_mode(pair, 255, 4));
drive->drive_data &= (IDE_DRV_MASK << 8);
drive->drive_data |= drv_timings[pio];
timings &= (IDE_DRV_MASK << 8);
timings |= drv_timings[pio];
ide_set_drivedata(drive, (void *)timings);
cs5536_program_dtc(drive, drv_timings[pio]);
......@@ -186,6 +188,7 @@ static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
int dshift = (drive->dn & 1) ? IDE_D1_SHIFT : IDE_D0_SHIFT;
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u32 etc;
cs5536_read(pdev, ETC, &etc);
......@@ -195,8 +198,9 @@ static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
etc |= udma_timings[mode - XFER_UDMA_0] << dshift;
} else { /* MWDMA */
etc &= ~(IDE_ETC_UDMA_MASK << dshift);
drive->drive_data &= IDE_DRV_MASK;
drive->drive_data |= mwdma_timings[mode - XFER_MW_DMA_0] << 8;
timings &= IDE_DRV_MASK;
timings |= mwdma_timings[mode - XFER_MW_DMA_0] << 8;
ide_set_drivedata(drive, (void *)timings);
}
cs5536_write(pdev, ETC, etc);
......@@ -204,9 +208,11 @@ static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
static void cs5536_dma_start(ide_drive_t *drive)
{
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
if (drive->current_speed < XFER_UDMA_0 &&
(drive->drive_data >> 8) != (drive->drive_data & IDE_DRV_MASK))
cs5536_program_dtc(drive, drive->drive_data >> 8);
(timings >> 8) != (timings & IDE_DRV_MASK))
cs5536_program_dtc(drive, timings >> 8);
ide_dma_start(drive);
}
......@@ -214,10 +220,11 @@ static void cs5536_dma_start(ide_drive_t *drive)
static int cs5536_dma_end(ide_drive_t *drive)
{
int ret = ide_dma_end(drive);
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
if (drive->current_speed < XFER_UDMA_0 &&
(drive->drive_data >> 8) != (drive->drive_data & IDE_DRV_MASK))
cs5536_program_dtc(drive, drive->drive_data & IDE_DRV_MASK);
(timings >> 8) != (timings & IDE_DRV_MASK))
cs5536_program_dtc(drive, timings & IDE_DRV_MASK);
return ret;
}
......
......@@ -128,7 +128,6 @@ static void __init falconide_setup_ports(struct ide_hw *hw)
hw->io_ports.ctl_addr = ATA_HD_BASE + ATA_HD_CONTROL;
hw->irq = IRQ_MFP_IDE;
hw->ack_intr = NULL;
}
/*
......
......@@ -66,7 +66,7 @@ MODULE_PARM_DESC(doubler, "enable support for IDE doublers");
* Check and acknowledge the interrupt status
*/
static int gayle_ack_intr_a4000(ide_hwif_t *hwif)
static int gayle_test_irq(ide_hwif_t *hwif)
{
unsigned char ch;
......@@ -76,21 +76,16 @@ static int gayle_ack_intr_a4000(ide_hwif_t *hwif)
return 1;
}
static int gayle_ack_intr_a1200(ide_hwif_t *hwif)
static void gayle_a1200_clear_irq(ide_drive_t *drive)
{
unsigned char ch;
ide_hwif_t *hwif = drive->hwif;
ch = z_readb(hwif->io_ports.irq_addr);
if (!(ch & GAYLE_IRQ_IDE))
return 0;
(void)z_readb(hwif->io_ports.status_addr);
z_writeb(0x7c, hwif->io_ports.irq_addr);
return 1;
}
static void __init gayle_setup_ports(struct ide_hw *hw, unsigned long base,
unsigned long ctl, unsigned long irq_port,
ide_ack_intr_t *ack_intr)
unsigned long ctl, unsigned long irq_port)
{
int i;
......@@ -105,9 +100,17 @@ static void __init gayle_setup_ports(struct ide_hw *hw, unsigned long base,
hw->io_ports.irq_addr = irq_port;
hw->irq = IRQ_AMIGA_PORTS;
hw->ack_intr = ack_intr;
}
static const struct ide_port_ops gayle_a4000_port_ops = {
.test_irq = gayle_test_irq,
};
static const struct ide_port_ops gayle_a1200_port_ops = {
.clear_irq = gayle_a1200_clear_irq,
.test_irq = gayle_test_irq,
};
static const struct ide_port_info gayle_port_info = {
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_SERIALIZE |
IDE_HFLAG_NO_DMA,
......@@ -123,9 +126,9 @@ static int __init gayle_init(void)
{
unsigned long phys_base, res_start, res_n;
unsigned long base, ctrlport, irqport;
ide_ack_intr_t *ack_intr;
int a4000, i, rc;
struct ide_hw hw[GAYLE_NUM_HWIFS], *hws[GAYLE_NUM_HWIFS];
struct ide_port_info d = gayle_port_info;
if (!MACH_IS_AMIGA)
return -ENODEV;
......@@ -148,11 +151,11 @@ static int __init gayle_init(void)
if (a4000) {
phys_base = GAYLE_BASE_4000;
irqport = (unsigned long)ZTWO_VADDR(GAYLE_IRQ_4000);
ack_intr = gayle_ack_intr_a4000;
d.port_ops = &gayle_a4000_port_ops;
} else {
phys_base = GAYLE_BASE_1200;
irqport = (unsigned long)ZTWO_VADDR(GAYLE_IRQ_1200);
ack_intr = gayle_ack_intr_a1200;
d.port_ops = &gayle_a1200_port_ops;
}
res_start = ((unsigned long)phys_base) & ~(GAYLE_NEXT_PORT-1);
......@@ -165,12 +168,12 @@ static int __init gayle_init(void)
base = (unsigned long)ZTWO_VADDR(phys_base + i * GAYLE_NEXT_PORT);
ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;
gayle_setup_ports(&hw[i], base, ctrlport, irqport, ack_intr);
gayle_setup_ports(&hw[i], base, ctrlport, irqport);
hws[i] = &hw[i];
}
rc = ide_host_add(&gayle_port_info, hws, i, NULL);
rc = ide_host_add(&d, hws, i, NULL);
if (rc)
release_mem_region(res_start, res_n);
......
......@@ -44,7 +44,12 @@
* bit3 (0x08): "1" 3 cycle time, "0" 2 cycle time (?)
*/
#define HT_CONFIG_PORT 0x3e6
#define HT_CONFIG(drivea) (u8)(((drivea)->drive_data & 0xff00) >> 8)
static inline u8 HT_CONFIG(ide_drive_t *drive)
{
return ((unsigned long)ide_get_drivedata(drive) & 0xff00) >> 8;
}
/*
* FIFO + PREFETCH (both a/b-model)
*/
......@@ -90,7 +95,11 @@
* Active Time for each drive. Smaller value gives higher speed.
* In case of failures you should probably fall back to a higher value.
*/
#define HT_TIMING(drivea) (u8)((drivea)->drive_data & 0x00ff)
static inline u8 HT_TIMING(ide_drive_t *drive)
{
return (unsigned long)ide_get_drivedata(drive) & 0x00ff;
}
#define HT_TIMING_DEFAULT 0xff
/*
......@@ -242,23 +251,27 @@ static DEFINE_SPINLOCK(ht6560b_lock);
*/
static void ht_set_prefetch(ide_drive_t *drive, u8 state)
{
unsigned long flags;
unsigned long flags, config;
int t = HT_PREFETCH_MODE << 8;
spin_lock_irqsave(&ht6560b_lock, flags);
config = (unsigned long)ide_get_drivedata(drive);
/*
* Prefetch mode and unmask irq seems to conflict
*/
if (state) {
drive->drive_data |= t; /* enable prefetch mode */
config |= t; /* enable prefetch mode */
drive->dev_flags |= IDE_DFLAG_NO_UNMASK;
drive->dev_flags &= ~IDE_DFLAG_UNMASK;
} else {
drive->drive_data &= ~t; /* disable prefetch mode */
config &= ~t; /* disable prefetch mode */
drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK;
}
ide_set_drivedata(drive, (void *)config);
spin_unlock_irqrestore(&ht6560b_lock, flags);
#ifdef DEBUG
......@@ -268,7 +281,7 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state)
static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
unsigned long flags;
unsigned long flags, config;
u8 timing;
switch (pio) {
......@@ -281,8 +294,10 @@ static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
timing = ht_pio2timings(drive, pio);
spin_lock_irqsave(&ht6560b_lock, flags);
drive->drive_data &= 0xff00;
drive->drive_data |= timing;
config = (unsigned long)ide_get_drivedata(drive);
config &= 0xff00;
config |= timing;
ide_set_drivedata(drive, (void *)config);
spin_unlock_irqrestore(&ht6560b_lock, flags);
#ifdef DEBUG
......@@ -299,7 +314,7 @@ static void __init ht6560b_init_dev(ide_drive_t *drive)
if (hwif->channel)
t |= (HT_SECONDARY_IF << 8);
drive->drive_data = t;
ide_set_drivedata(drive, (void *)t);
}
static int probe_ht6560b;
......
......@@ -187,7 +187,8 @@ static const expansioncard_ops_t icside_ops_arcin_v6 = {
*/
static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
{
int cycle_time, use_dma_info = 0;
unsigned long cycle_time;
int use_dma_info = 0;
switch (xfer_mode) {
case XFER_MW_DMA_2:
......@@ -218,10 +219,11 @@ static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
if (use_dma_info && drive->id[ATA_ID_EIDE_DMA_TIME] > cycle_time)
cycle_time = drive->id[ATA_ID_EIDE_DMA_TIME];
drive->drive_data = cycle_time;
ide_set_drivedata(drive, (void *)cycle_time);
printk("%s: %s selected (peak %dMB/s)\n", drive->name,
ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
ide_xfer_verbose(xfer_mode),
2000 / (unsigned long)ide_get_drivedata(drive));
}
static const struct ide_port_ops icside_v6_port_ops = {
......@@ -277,7 +279,7 @@ static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
/*
* Select the correct timing for this drive.
*/
set_dma_speed(ec->dma, drive->drive_data);
set_dma_speed(ec->dma, (unsigned long)ide_get_drivedata(drive));
/*
* Tell the DMA engine about the SG table and
......
This diff is collapsed.
......@@ -92,16 +92,16 @@ static void cdrom_saw_media_change(ide_drive_t *drive)
drive->atapi_flags &= ~IDE_AFLAG_TOC_VALID;
}
static int cdrom_log_sense(ide_drive_t *drive, struct request *rq,
struct request_sense *sense)
static int cdrom_log_sense(ide_drive_t *drive, struct request *rq)
{
struct request_sense *sense = &drive->sense_data;
int log = 0;
ide_debug_log(IDE_DBG_SENSE, "sense_key: 0x%x", sense->sense_key);
if (!sense || !rq || (rq->cmd_flags & REQ_QUIET))
return 0;
ide_debug_log(IDE_DBG_SENSE, "sense_key: 0x%x", sense->sense_key);
switch (sense->sense_key) {
case NO_SENSE:
case RECOVERED_ERROR:
......@@ -140,12 +140,12 @@ static int cdrom_log_sense(ide_drive_t *drive, struct request *rq,
}
static void cdrom_analyze_sense_data(ide_drive_t *drive,
struct request *failed_command,
struct request_sense *sense)
struct request *failed_command)
{
struct request_sense *sense = &drive->sense_data;
struct cdrom_info *info = drive->driver_data;
unsigned long sector;
unsigned long bio_sectors;
struct cdrom_info *info = drive->driver_data;
ide_debug_log(IDE_DBG_SENSE, "error_code: 0x%x, sense_key: 0x%x",
sense->error_code, sense->sense_key);
......@@ -154,7 +154,7 @@ static void cdrom_analyze_sense_data(ide_drive_t *drive,
ide_debug_log(IDE_DBG_SENSE, "failed cmd: 0x%x",
failed_command->cmd[0]);
if (!cdrom_log_sense(drive, failed_command, sense))
if (!cdrom_log_sense(drive, failed_command))
return;
/*
......@@ -225,15 +225,14 @@ static void ide_cd_complete_failed_rq(ide_drive_t *drive, struct request *rq)
* sense pointer set.
*/
memcpy(failed->sense, sense, 18);
sense = failed->sense;
failed->sense_len = rq->sense_len;
}
cdrom_analyze_sense_data(drive, failed, sense);
cdrom_analyze_sense_data(drive, failed);
if (ide_end_rq(drive, failed, -EIO, blk_rq_bytes(failed)))
BUG();
} else
cdrom_analyze_sense_data(drive, NULL, sense);
cdrom_analyze_sense_data(drive, NULL);
}
......@@ -410,50 +409,6 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat)
return 2;
}
/*
* Check the contents of the interrupt reason register from the cdrom
* and attempt to recover if there are problems. Returns 0 if everything's
* ok; nonzero if the request has been terminated.
*/
static int ide_cd_check_ireason(ide_drive_t *drive, struct request *rq,
int len, int ireason, int rw)
{
ide_hwif_t *hwif = drive->hwif;
ide_debug_log(IDE_DBG_FUNC, "ireason: 0x%x, rw: 0x%x", ireason, rw);
/*
* ireason == 0: the drive wants to receive data from us
* ireason == 2: the drive is expecting to transfer data to us
*/
if (ireason == (!rw << 1))
return 0;
else if (ireason == (rw << 1)) {
/* whoops... */
printk(KERN_ERR PFX "%s: %s: wrong transfer direction!\n",
drive->name, __func__);
ide_pad_transfer(drive, rw, len);
} else if (rw == 0 && ireason == 1) {
/*
* Some drives (ASUS) seem to tell us that status info is
* available. Just get it and ignore.
*/
(void)hwif->tp_ops->read_status(hwif);
return 0;
} else {
/* drive wants a command packet, or invalid ireason... */
printk(KERN_ERR PFX "%s: %s: bad interrupt reason 0x%02x\n",
drive->name, __func__, ireason);
}
if (rq->cmd_type == REQ_TYPE_ATA_PC)
rq->cmd_flags |= REQ_FAILED;
return -1;
}
static void ide_cd_request_sense_fixup(ide_drive_t *drive, struct ide_cmd *cmd)
{
struct request *rq = cmd->rq;
......@@ -645,8 +600,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
goto out_end;
}
/* check which way to transfer data */
rc = ide_cd_check_ireason(drive, rq, len, ireason, write);
rc = ide_check_ireason(drive, rq, len, ireason, write);
if (rc)
goto out_end;
......@@ -713,7 +667,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
rq->errors = -EIO;
}
if (uptodate == 0)
if (uptodate == 0 && rq->bio)
ide_cd_error_cmd(drive, cmd);
/* make sure it's fully ended */
......@@ -831,12 +785,8 @@ static ide_startstop_t ide_cd_do_request(ide_drive_t *drive, struct request *rq,
/* right now this can only be a reset... */
uptodate = 1;
goto out_end;
} else {
blk_dump_rq_flags(rq, DRV_NAME " bad flags");
if (rq->errors == 0)
rq->errors = -EIO;
goto out_end;
}
} else
BUG();
/* prepare sense request for this command */
ide_prep_sense(drive, rq);
......
......@@ -184,14 +184,7 @@ static ide_startstop_t ide_do_rw_disk(ide_drive_t *drive, struct request *rq,
ide_hwif_t *hwif = drive->hwif;
BUG_ON(drive->dev_flags & IDE_DFLAG_BLOCKED);
if (!blk_fs_request(rq)) {
blk_dump_rq_flags(rq, "ide_do_rw_disk - bad command");
if (rq->errors == 0)
rq->errors = -EIO;
ide_complete_rq(drive, -EIO, ide_rq_bytes(rq));
return ide_stopped;
}
BUG_ON(!blk_fs_request(rq));
ledtrig_ide_activity();
......
......@@ -77,7 +77,8 @@ static int ide_floppy_callback(ide_drive_t *drive, int dsc)
(rq && blk_pc_request(rq)))
uptodate = 1; /* FIXME */
else if (pc->c[0] == GPCMD_REQUEST_SENSE) {
u8 *buf = pc->buf;
u8 *buf = bio_data(rq->bio);
if (!pc->error) {
floppy->sense_key = buf[2] & 0x0F;
......@@ -209,8 +210,7 @@ static void idefloppy_create_rw_cmd(ide_drive_t *drive,
pc->rq = rq;
if (rq->cmd_flags & REQ_RW)
pc->flags |= PC_FLAG_WRITING;
pc->buf = NULL;
pc->req_xfer = pc->buf_size = blocks * floppy->block_size;
pc->flags |= PC_FLAG_DMA_OK;
}
......@@ -225,9 +225,6 @@ static void idefloppy_blockpc_cmd(struct ide_disk_obj *floppy,
if (rq_data_dir(rq) == WRITE)
pc->flags |= PC_FLAG_WRITING;
}
/* pio will be performed by ide_pio_bytes() which handles sg fine */
pc->buf = NULL;
pc->req_xfer = pc->buf_size = blk_rq_bytes(rq);
}
static ide_startstop_t ide_floppy_do_request(ide_drive_t *drive,
......@@ -272,10 +269,8 @@ static ide_startstop_t ide_floppy_do_request(ide_drive_t *drive,
} else if (blk_pc_request(rq)) {
pc = &floppy->queued_pc;
idefloppy_blockpc_cmd(floppy, pc, rq);
} else {
blk_dump_rq_flags(rq, PFX "unsupported command in queue");
goto out_end;
}
} else
BUG();
ide_prep_sense(drive, rq);
......@@ -286,8 +281,8 @@ static ide_startstop_t ide_floppy_do_request(ide_drive_t *drive,
cmd.rq = rq;
if (blk_fs_request(rq) || pc->req_xfer) {
ide_init_sg_cmd(&cmd, pc->req_xfer);
if (blk_fs_request(rq) || blk_rq_bytes(rq)) {
ide_init_sg_cmd(&cmd, blk_rq_bytes(rq));
ide_map_sg(drive, &cmd);
}
......@@ -311,33 +306,33 @@ static int ide_floppy_get_flexible_disk_page(ide_drive_t *drive,
{
struct ide_disk_obj *floppy = drive->driver_data;
struct gendisk *disk = floppy->disk;
u8 *page;
u8 *page, buf[40];
int capacity, lba_capacity;
u16 transfer_rate, sector_size, cyls, rpm;
u8 heads, sectors;
ide_floppy_create_mode_sense_cmd(pc, IDEFLOPPY_FLEXIBLE_DISK_PAGE);
if (ide_queue_pc_tail(drive, disk, pc)) {
if (ide_queue_pc_tail(drive, disk, pc, buf, pc->req_xfer)) {
printk(KERN_ERR PFX "Can't get flexible disk page params\n");
return 1;
}
if (pc->buf[3] & 0x80)
if (buf[3] & 0x80)
drive->dev_flags |= IDE_DFLAG_WP;
else
drive->dev_flags &= ~IDE_DFLAG_WP;
set_disk_ro(disk, !!(drive->dev_flags & IDE_DFLAG_WP));
page = &pc->buf[8];
page = &buf[8];
transfer_rate = be16_to_cpup((__be16 *)&pc->buf[8 + 2]);
sector_size = be16_to_cpup((__be16 *)&pc->buf[8 + 6]);
cyls = be16_to_cpup((__be16 *)&pc->buf[8 + 8]);
rpm = be16_to_cpup((__be16 *)&pc->buf[8 + 28]);
heads = pc->buf[8 + 4];
sectors = pc->buf[8 + 5];
transfer_rate = be16_to_cpup((__be16 *)&buf[8 + 2]);
sector_size = be16_to_cpup((__be16 *)&buf[8 + 6]);
cyls = be16_to_cpup((__be16 *)&buf[8 + 8]);
rpm = be16_to_cpup((__be16 *)&buf[8 + 28]);
heads = buf[8 + 4];
sectors = buf[8 + 5];
capacity = cyls * heads * sectors * sector_size;
......@@ -387,22 +382,19 @@ static int ide_floppy_get_capacity(ide_drive_t *drive)
drive->capacity64 = 0;
ide_floppy_create_read_capacity_cmd(&pc);
pc.buf = &pc_buf[0];
pc.buf_size = sizeof(pc_buf);
if (ide_queue_pc_tail(drive, disk, &pc)) {
if (ide_queue_pc_tail(drive, disk, &pc, pc_buf, pc.req_xfer)) {
printk(KERN_ERR PFX "Can't get floppy parameters\n");
return 1;
}
header_len = pc.buf[3];
cap_desc = &pc.buf[4];
header_len = pc_buf[3];
cap_desc = &pc_buf[4];
desc_cnt = header_len / 8; /* capacity descriptor of 8 bytes */
for (i = 0; i < desc_cnt; i++) {
unsigned int desc_start = 4 + i*8;
blocks = be32_to_cpup((__be32 *)&pc.buf[desc_start]);
length = be16_to_cpup((__be16 *)&pc.buf[desc_start + 6]);
blocks = be32_to_cpup((__be32 *)&pc_buf[desc_start]);
length = be16_to_cpup((__be16 *)&pc_buf[desc_start + 6]);
ide_debug_log(IDE_DBG_PROBE, "Descriptor %d: %dkB, %d blocks, "
"%d sector size",
......@@ -415,7 +407,7 @@ static int ide_floppy_get_capacity(ide_drive_t *drive)
* the code below is valid only for the 1st descriptor, ie i=0
*/
switch (pc.buf[desc_start + 4] & 0x03) {
switch (pc_buf[desc_start + 4] & 0x03) {
/* Clik! drive returns this instead of CAPACITY_CURRENT */
case CAPACITY_UNFORMATTED:
if (!(drive->atapi_flags & IDE_AFLAG_CLIK_DRIVE))
......@@ -464,7 +456,7 @@ static int ide_floppy_get_capacity(ide_drive_t *drive)
break;
}
ide_debug_log(IDE_DBG_PROBE, "Descriptor 0 Code: %d",
pc.buf[desc_start + 4] & 0x03);
pc_buf[desc_start + 4] & 0x03);
}
/* Clik! disk does not support get_flexible_disk_page */
......
......@@ -47,15 +47,13 @@ static int ide_floppy_get_format_capacities(ide_drive_t *drive,
return -EINVAL;
ide_floppy_create_read_capacity_cmd(pc);
pc->buf = &pc_buf[0];
pc->buf_size = sizeof(pc_buf);
if (ide_queue_pc_tail(drive, floppy->disk, pc)) {
if (ide_queue_pc_tail(drive, floppy->disk, pc, pc_buf, pc->req_xfer)) {
printk(KERN_ERR "ide-floppy: Can't get floppy parameters\n");
return -EIO;
}
header_len = pc->buf[3];
header_len = pc_buf[3];
desc_cnt = header_len / 8; /* capacity descriptor of 8 bytes */
u_index = 0;
......@@ -72,8 +70,8 @@ static int ide_floppy_get_format_capacities(ide_drive_t *drive,
if (u_index >= u_array_size)
break; /* User-supplied buffer too small */
blocks = be32_to_cpup((__be32 *)&pc->buf[desc_start]);
length = be16_to_cpup((__be16 *)&pc->buf[desc_start + 6]);
blocks = be32_to_cpup((__be32 *)&pc_buf[desc_start]);
length = be16_to_cpup((__be16 *)&pc_buf[desc_start + 6]);
if (put_user(blocks, argp))
return -EFAULT;
......@@ -94,40 +92,42 @@ static int ide_floppy_get_format_capacities(ide_drive_t *drive,
return 0;
}
static void ide_floppy_create_format_unit_cmd(struct ide_atapi_pc *pc, int b,
int l, int flags)
static void ide_floppy_create_format_unit_cmd(struct ide_atapi_pc *pc,
u8 *buf, int b, int l,
int flags)
{
ide_init_pc(pc);
pc->c[0] = GPCMD_FORMAT_UNIT;
pc->c[1] = 0x17;
memset(pc->buf, 0, 12);
pc->buf[1] = 0xA2;
memset(buf, 0, 12);
buf[1] = 0xA2;
/* Default format list header, u8 1: FOV/DCRT/IMM bits set */
if (flags & 1) /* Verify bit on... */
pc->buf[1] ^= 0x20; /* ... turn off DCRT bit */
pc->buf[3] = 8;
buf[1] ^= 0x20; /* ... turn off DCRT bit */
buf[3] = 8;
put_unaligned(cpu_to_be32(b), (unsigned int *)(&pc->buf[4]));
put_unaligned(cpu_to_be32(l), (unsigned int *)(&pc->buf[8]));
pc->buf_size = 12;
put_unaligned(cpu_to_be32(b), (unsigned int *)(&buf[4]));
put_unaligned(cpu_to_be32(l), (unsigned int *)(&buf[8]));
pc->req_xfer = 12;
pc->flags |= PC_FLAG_WRITING;
}
static int ide_floppy_get_sfrp_bit(ide_drive_t *drive, struct ide_atapi_pc *pc)
{
struct ide_disk_obj *floppy = drive->driver_data;
u8 buf[20];
drive->atapi_flags &= ~IDE_AFLAG_SRFP;
ide_floppy_create_mode_sense_cmd(pc, IDEFLOPPY_CAPABILITIES_PAGE);
pc->flags |= PC_FLAG_SUPPRESS_ERROR;
if (ide_queue_pc_tail(drive, floppy->disk, pc))
if (ide_queue_pc_tail(drive, floppy->disk, pc, buf, pc->req_xfer))
return 1;
if (pc->buf[8 + 2] & 0x40)
if (buf[8 + 2] & 0x40)
drive->atapi_flags |= IDE_AFLAG_SRFP;
return 0;
......@@ -137,6 +137,7 @@ static int ide_floppy_format_unit(ide_drive_t *drive, struct ide_atapi_pc *pc,
int __user *arg)
{
struct ide_disk_obj *floppy = drive->driver_data;
u8 buf[12];
int blocks, length, flags, err = 0;
if (floppy->openers > 1) {
......@@ -170,9 +171,9 @@ static int ide_floppy_format_unit(ide_drive_t *drive, struct ide_atapi_pc *pc,
}
ide_floppy_get_sfrp_bit(drive, pc);
ide_floppy_create_format_unit_cmd(pc, blocks, length, flags);
ide_floppy_create_format_unit_cmd(pc, buf, blocks, length, flags);
if (ide_queue_pc_tail(drive, floppy->disk, pc))
if (ide_queue_pc_tail(drive, floppy->disk, pc, buf, pc->req_xfer))
err = -EIO;
out:
......@@ -196,11 +197,13 @@ static int ide_floppy_get_format_progress(ide_drive_t *drive,
int __user *arg)
{
struct ide_disk_obj *floppy = drive->driver_data;
u8 sense_buf[18];
int progress_indication = 0x10000;
if (drive->atapi_flags & IDE_AFLAG_SRFP) {
ide_create_request_sense_cmd(drive, pc);
if (ide_queue_pc_tail(drive, floppy->disk, pc))
if (ide_queue_pc_tail(drive, floppy->disk, pc, sense_buf,
pc->req_xfer))
return -EIO;
if (floppy->sense_key == 2 &&
......
......@@ -683,8 +683,9 @@ void ide_timer_expiry (unsigned long data)
} else if (drive_is_ready(drive)) {
if (drive->waiting_for_dma)
hwif->dma_ops->dma_lost_irq(drive);
if (hwif->ack_intr)
hwif->ack_intr(hwif);
if (hwif->port_ops && hwif->port_ops->clear_irq)
hwif->port_ops->clear_irq(drive);
printk(KERN_WARNING "%s: lost interrupt\n",
drive->name);
startstop = handler(drive);
......@@ -803,7 +804,8 @@ irqreturn_t ide_intr (int irq, void *dev_id)
spin_lock_irqsave(&hwif->lock, flags);
if (hwif->ack_intr && hwif->ack_intr(hwif) == 0)
if (hwif->port_ops && hwif->port_ops->test_irq &&
hwif->port_ops->test_irq(hwif) == 0)
goto out;
handler = hwif->handler;
......
......@@ -118,7 +118,6 @@ static int ide_cmd_ioctl(ide_drive_t *drive, unsigned long arg)
u8 args[4], xfer_rate = 0;
struct ide_cmd cmd;
struct ide_taskfile *tf = &cmd.tf;
u16 *id = drive->id;
if (NULL == (void *) arg) {
struct request *rq;
......@@ -161,14 +160,10 @@ static int ide_cmd_ioctl(ide_drive_t *drive, unsigned long arg)
if (tf->command == ATA_CMD_SET_FEATURES &&
tf->feature == SETFEATURES_XFER &&
tf->nsect >= XFER_SW_DMA_0 &&
(id[ATA_ID_UDMA_MODES] ||
id[ATA_ID_MWDMA_MODES] ||
id[ATA_ID_SWDMA_MODES])) {
xfer_rate = args[1];
if (tf->nsect > XFER_UDMA_2 && !eighty_ninty_three(drive)) {
printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
"be set\n", drive->name);
tf->nsect >= XFER_SW_DMA_0) {
xfer_rate = ide_find_dma_mode(drive, XFER_UDMA_6);
if (xfer_rate != tf->nsect) {
err = -EINVAL;
goto abort;
}
}
......
......@@ -1170,7 +1170,6 @@ static void ide_init_port_hw(ide_hwif_t *hwif, struct ide_hw *hw)
hwif->irq = hw->irq;
hwif->dev = hw->dev;
hwif->gendev.parent = hw->parent ? hw->parent : hw->dev;
hwif->ack_intr = hw->ack_intr;
hwif->config_data = hw->config;
}
......@@ -1378,6 +1377,9 @@ int ide_host_register(struct ide_host *host, const struct ide_port_info *d,
ide_init_port(hwif, i & 1, d);
ide_port_cable_detect(hwif);
hwif->port_flags |= IDE_PFLAG_PROBING;
ide_port_init_devices(hwif);
}
......@@ -1388,6 +1390,8 @@ int ide_host_register(struct ide_host *host, const struct ide_port_info *d,
if (ide_probe_port(hwif) == 0)
hwif->present = 1;
hwif->port_flags &= ~IDE_PFLAG_PROBING;
if ((hwif->host_flags & IDE_HFLAG_4DRIVES) == 0 ||
hwif->mate == NULL || hwif->mate->present == 0) {
if (ide_register_port(hwif)) {
......@@ -1569,11 +1573,20 @@ EXPORT_SYMBOL_GPL(ide_host_remove);
void ide_port_scan(ide_hwif_t *hwif)
{
int rc;
ide_port_apply_params(hwif);
ide_port_cable_detect(hwif);
hwif->port_flags |= IDE_PFLAG_PROBING;
ide_port_init_devices(hwif);
if (ide_probe_port(hwif) < 0)
rc = ide_probe_port(hwif);
hwif->port_flags &= ~IDE_PFLAG_PROBING;
if (rc < 0)
return;
hwif->present = 1;
......
This diff is collapsed.
......@@ -107,6 +107,18 @@ u8 ide_get_best_pio_mode(ide_drive_t *drive, u8 mode_wanted, u8 max_mode)
}
EXPORT_SYMBOL_GPL(ide_get_best_pio_mode);
int ide_pio_need_iordy(ide_drive_t *drive, const u8 pio)
{
/*
* IORDY may lead to controller lock up on certain controllers
* if the port is not occupied.
*/
if (pio == 0 && (drive->hwif->port_flags & IDE_PFLAG_PROBING))
return 0;
return ata_id_pio_need_iordy(drive->id, pio);
}
EXPORT_SYMBOL_GPL(ide_pio_need_iordy);
int ide_set_pio_mode(ide_drive_t *drive, const u8 mode)
{
ide_hwif_t *hwif = drive->hwif;
......
......@@ -66,7 +66,7 @@ static void it8172_set_pio_mode(ide_drive_t *drive, const u8 pio)
if (drive->media == ide_disk)
/* enable prefetch */
drive_enables |= 0x0004 << (drive->dn * 4);
if (ata_id_has_iordy(drive->id))
if (ide_pio_need_iordy(drive, pio))
/* enable IORDY sample-point */
drive_enables |= 0x0002 << (drive->dn * 4);
......
......@@ -50,7 +50,7 @@ static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
control |= 1; /* Programmable timing on */
if (drive->media != ide_disk)
control |= 4; /* ATAPI */
if (pio > 2)
if (ide_pio_need_iordy(drive, pio))
control |= 2; /* IORDY */
if (is_slave) {
master_data |= 0x4000;
......
......@@ -53,17 +53,20 @@
volatile unsigned char *ide_ifr = (unsigned char *) (IDE_BASE + IDE_IFR);
int macide_ack_intr(ide_hwif_t* hwif)
int macide_test_irq(ide_hwif_t *hwif)
{
if (*ide_ifr & 0x20) {
*ide_ifr &= ~0x20;
if (*ide_ifr & 0x20)
return 1;
}
return 0;
}
static void macide_clear_irq(ide_drive_t *drive)
{
*ide_ifr &= ~0x20;
}
static void __init macide_setup_ports(struct ide_hw *hw, unsigned long base,
int irq, ide_ack_intr_t *ack_intr)
int irq)
{
int i;
......@@ -75,10 +78,15 @@ static void __init macide_setup_ports(struct ide_hw *hw, unsigned long base,
hw->io_ports.ctl_addr = base + IDE_CONTROL;
hw->irq = irq;
hw->ack_intr = ack_intr;
}
static const struct ide_port_ops macide_port_ops = {
.clear_irq = macide_clear_irq,
.test_irq = macide_test_irq,
};
static const struct ide_port_info macide_port_info = {
.port_ops = &macide_port_ops,
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
.irq_flags = IRQF_SHARED,
.chipset = ide_generic,
......@@ -93,10 +101,10 @@ static const char *mac_ide_name[] =
static int __init macide_init(void)
{
ide_ack_intr_t *ack_intr;
unsigned long base;
int irq;
struct ide_hw hw, *hws[] = { &hw };
struct ide_port_info d = macide_port_info;
if (!MACH_IS_MAC)
return -ENODEV;
......@@ -104,17 +112,15 @@ static int __init macide_init(void)
switch (macintosh_config->ide_type) {
case MAC_IDE_QUADRA:
base = IDE_BASE;
ack_intr = macide_ack_intr;
irq = IRQ_NUBUS_F;
break;
case MAC_IDE_PB:
base = IDE_BASE;
ack_intr = macide_ack_intr;
irq = IRQ_NUBUS_C;
break;
case MAC_IDE_BABOON:
base = BABOON_BASE;
ack_intr = NULL;
d.port_ops = NULL;
irq = IRQ_BABOON_1;
break;
default:
......@@ -124,9 +130,9 @@ static int __init macide_init(void)
printk(KERN_INFO "ide: Macintosh %s IDE controller\n",
mac_ide_name[macintosh_config->ide_type - 1]);
macide_setup_ports(&hw, base, irq, ack_intr);
macide_setup_ports(&hw, base, irq);
return ide_host_add(&macide_port_info, hws, 1, NULL);
return ide_host_add(&d, hws, 1, NULL);
}
module_init(macide_init);
......
......@@ -138,6 +138,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
ide_hwif_t *hwif = drive->hwif;
ide_drive_t *pair = ide_get_pair_dev(drive);
unsigned long flags;
unsigned long mode = XFER_PIO_0 + pio, pair_mode;
u8 tim, misc, addr_pio = pio, clk;
/* DRDY is default 2 (by OPTi Databook) */
......@@ -150,11 +151,12 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
{ 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */
};
drive->drive_data = XFER_PIO_0 + pio;
ide_set_drivedata(drive, (void *)mode);
if (pair) {
if (pair->drive_data && pair->drive_data < drive->drive_data)
addr_pio = pair->drive_data - XFER_PIO_0;
pair_mode = (unsigned long)ide_get_drivedata(pair);
if (pair_mode && pair_mode < mode)
addr_pio = pair_mode - XFER_PIO_0;
}
spin_lock_irqsave(&opti621_lock, flags);
......
......@@ -73,7 +73,7 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
* Prefetch_EN / IORDY_EN / PA[3:0] bits of register A
*/
AP &= ~0x3f;
if (ata_id_iordy_disable(drive->id))
if (ide_pio_need_iordy(drive, speed - XFER_PIO_0))
AP |= 0x20; /* set IORDY_EN bit */
if (drive->media == ide_disk)
AP |= 0x10; /* set Prefetch_EN bit */
......@@ -104,6 +104,27 @@ static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
pdc202xx_set_mode(drive, XFER_PIO_0 + pio);
}
static int pdc202xx_test_irq(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long high_16 = pci_resource_start(dev, 4);
u8 sc1d = inb(high_16 + 0x1d);
if (hwif->channel) {
/*
* bit 7: error, bit 6: interrupting,
* bit 5: FIFO full, bit 4: FIFO empty
*/
return ((sc1d & 0x50) == 0x40) ? 1 : 0;
} else {
/*
* bit 3: error, bit 2: interrupting,
* bit 1: FIFO full, bit 0: FIFO empty
*/
return ((sc1d & 0x05) == 0x04) ? 1 : 0;
}
}
static u8 pdc2026x_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
......@@ -231,6 +252,7 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
static const struct ide_port_ops pdc20246_port_ops = {
.set_pio_mode = pdc202xx_set_pio_mode,
.set_dma_mode = pdc202xx_set_mode,
.test_irq = pdc202xx_test_irq,
};
static const struct ide_port_ops pdc2026x_port_ops = {
......
......@@ -98,7 +98,7 @@ static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
control |= 1; /* Programmable timing on */
if (drive->media == ide_disk)
control |= 4; /* Prefetch, post write */
if (pio > 2)
if (ide_pio_need_iordy(drive, pio))
control |= 2; /* IORDY */
if (is_slave) {
master_data |= 0x4000;
......
......@@ -51,9 +51,7 @@ static int q40ide_default_irq(unsigned long base)
/*
* Addresses are pretranslated for Q40 ISA access.
*/
static void q40_ide_setup_ports(struct ide_hw *hw, unsigned long base,
ide_ack_intr_t *ack_intr,
int irq)
static void q40_ide_setup_ports(struct ide_hw *hw, unsigned long base, int irq)
{
memset(hw, 0, sizeof(*hw));
/* BIG FAT WARNING:
......@@ -69,7 +67,6 @@ static void q40_ide_setup_ports(struct ide_hw *hw, unsigned long base,
hw->io_ports.ctl_addr = Q40_ISA_IO_B(base + 0x206);
hw->irq = irq;
hw->ack_intr = ack_intr;
}
static void q40ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd,
......@@ -156,7 +153,7 @@ static int __init q40ide_init(void)
release_region(pcide_bases[i], 8);
continue;
}
q40_ide_setup_ports(&hw[i], pcide_bases[i], NULL,
q40_ide_setup_ports(&hw[i], pcide_bases[i],
q40ide_default_irq(pcide_bases[i]));
hws[i] = &hw[i];
......
......@@ -180,8 +180,11 @@ static int qd_find_disk_type (ide_drive_t *drive,
static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
drive->drive_data &= 0xff00;
drive->drive_data |= timing;
unsigned long data = (unsigned long)ide_get_drivedata(drive);
data &= 0xff00;
data |= timing;
ide_set_drivedata(drive, (void *)data);
printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}
......@@ -292,7 +295,7 @@ static void __init qd6500_init_dev(ide_drive_t *drive)
u8 base = (hwif->config_data & 0xff00) >> 8;
u8 config = QD_CONFIG(hwif);
drive->drive_data = QD6500_DEF_DATA;
ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
}
static void __init qd6580_init_dev(ide_drive_t *drive)
......@@ -308,7 +311,7 @@ static void __init qd6580_init_dev(ide_drive_t *drive)
} else
t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
drive->drive_data = (drive->dn & 1) ? t2 : t1;
ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
}
static const struct ide_tp_ops qd65xx_tp_ops = {
......
......@@ -31,8 +31,15 @@
#define QD_CONFIG(hwif) ((hwif)->config_data & 0x00ff)
#define QD_TIMING(drive) (u8)(((drive)->drive_data) & 0x00ff)
#define QD_TIMREG(drive) (u8)((((drive)->drive_data) & 0xff00) >> 8)
static inline u8 QD_TIMING(ide_drive_t *drive)
{
return (unsigned long)ide_get_drivedata(drive) & 0x00ff;
}
static inline u8 QD_TIMREG(ide_drive_t *drive)
{
return ((unsigned long)ide_get_drivedata(drive) & 0xff00) >> 8;
}
#define QD6500_DEF_DATA ((QD_TIM1_PORT<<8) | (QD_ID3 ? 0x0c : 0x08))
#define QD6580_DEF_DATA ((QD_TIM1_PORT<<8) | (QD_ID3 ? 0x0a : 0x00))
......
This diff is collapsed.
......@@ -32,7 +32,6 @@
* smarter code in libata.
*
* TODO:
* - IORDY fixes
* - VDMA support
*/
......@@ -234,8 +233,7 @@ static u8 sil_sata_udma_filter(ide_drive_t *drive)
* @pio: PIO mode number
*
* Load the timing settings for this device mode into the
* controller. If we are in PIO mode 3 or 4 turn on IORDY
* monitoring (bit 9). The TF timing is bits 31:16
* controller.
*/
static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
......@@ -276,13 +274,16 @@ static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
/* now set up IORDY */
speedp = sil_ioread16(dev, tfaddr - 2);
speedp &= ~0x200;
if (pio > 2)
speedp |= 0x200;
sil_iowrite16(dev, speedp, tfaddr - 2);
mode = sil_ioread8(dev, base + addr_mask);
mode &= ~(unit ? 0x30 : 0x03);
mode |= unit ? 0x10 : 0x01;
if (ide_pio_need_iordy(drive, pio)) {
speedp |= 0x200;
mode |= unit ? 0x10 : 0x01;
}
sil_iowrite16(dev, speedp, tfaddr - 2);
sil_iowrite8(dev, mode, base + addr_mask);
}
......@@ -337,24 +338,14 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
sil_iowrite16(dev, ultra, ua);
}
/* returns 1 if dma irq issued, 0 otherwise */
static int siimage_io_dma_test_irq(ide_drive_t *drive)
static int sil_test_irq(ide_hwif_t *hwif)
{
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 dma_altstat = 0;
unsigned long addr = siimage_selreg(hwif, 1);
u8 val = sil_ioread8(dev, addr);
/* return 1 if INTR asserted */
if (inb(hwif->dma_base + ATA_DMA_STATUS) & 4)
return 1;
/* return 1 if Device INTR asserted */
pci_read_config_byte(dev, addr, &dma_altstat);
if (dma_altstat & 8)
return 0; /* return 1; */
return 0;
/* Return 1 if INTRQ asserted */
return (val & 8) ? 1 : 0;
}
/**
......@@ -368,7 +359,6 @@ static int siimage_io_dma_test_irq(ide_drive_t *drive)
static int siimage_mmio_dma_test_irq(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
unsigned long addr = siimage_selreg(hwif, 0x1);
void __iomem *sata_error_addr
= (void __iomem *)hwif->sata_scr[SATA_ERROR_OFFSET];
......@@ -397,10 +387,6 @@ static int siimage_mmio_dma_test_irq(ide_drive_t *drive)
if (readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)) & 4)
return 1;
/* return 1 if Device INTR asserted */
if (readb((void __iomem *)addr) & 8)
return 0; /* return 1; */
return 0;
}
......@@ -409,7 +395,7 @@ static int siimage_dma_test_irq(ide_drive_t *drive)
if (drive->hwif->host_flags & IDE_HFLAG_MMIO)
return siimage_mmio_dma_test_irq(drive);
else
return siimage_io_dma_test_irq(drive);
return ide_dma_test_irq(drive);
}
/**
......@@ -694,6 +680,7 @@ static const struct ide_port_ops sil_pata_port_ops = {
.set_pio_mode = sil_set_pio_mode,
.set_dma_mode = sil_set_dma_mode,
.quirkproc = sil_quirkproc,
.test_irq = sil_test_irq,
.udma_filter = sil_pata_udma_filter,
.cable_detect = sil_cable_detect,
};
......@@ -704,6 +691,7 @@ static const struct ide_port_ops sil_sata_port_ops = {
.reset_poll = sil_sata_reset_poll,
.pre_reset = sil_sata_pre_reset,
.quirkproc = sil_quirkproc,
.test_irq = sil_test_irq,
.udma_filter = sil_sata_udma_filter,
.cable_detect = sil_cable_detect,
};
......
......@@ -61,8 +61,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
if (cmd_off == 0)
cmd_off = 1;
if ((pio > 2 || ata_id_has_iordy(drive->id)) &&
!(pio > 4 && ata_id_is_cfa(drive->id)))
if (ide_pio_need_iordy(drive, pio))
iordy = 0x40;
return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy;
......@@ -74,6 +73,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
int reg = 0x44 + drive->dn * 4;
u16 drv_ctrl;
......@@ -83,8 +83,9 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
* Store the PIO timings so that we can restore them
* in case DMA will be turned off...
*/
drive->drive_data &= 0xffff0000;
drive->drive_data |= drv_ctrl;
timings &= 0xffff0000;
timings |= drv_ctrl;
ide_set_drivedata(drive, (void *)timings);
pci_write_config_word(dev, reg, drv_ctrl);
pci_read_config_word (dev, reg, &drv_ctrl);
......@@ -100,6 +101,7 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u16 drv_ctrl;
DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
......@@ -111,8 +113,19 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
* Store the DMA timings so that we can actually program
* them when DMA will be turned on...
*/
drive->drive_data &= 0x0000ffff;
drive->drive_data |= (unsigned long)drv_ctrl << 16;
timings &= 0x0000ffff;
timings |= (unsigned long)drv_ctrl << 16;
ide_set_drivedata(drive, (void *)timings);
}
static int sl82c105_test_irq(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
pci_read_config_dword(dev, 0x40, &val);
return (val & mask) ? 1 : 0;
}
/*
......@@ -185,7 +198,8 @@ static void sl82c105_dma_start(ide_drive_t *drive)
DBG(("%s(drive:%s)\n", __func__, drive->name));
pci_write_config_word(dev, reg, drive->drive_data >> 16);
pci_write_config_word(dev, reg,
(unsigned long)ide_get_drivedata(drive) >> 16);
sl82c105_reset_host(dev);
ide_dma_start(drive);
......@@ -210,7 +224,8 @@ static int sl82c105_dma_end(ide_drive_t *drive)
ret = ide_dma_end(drive);
pci_write_config_word(dev, reg, drive->drive_data);
pci_write_config_word(dev, reg,
(unsigned long)ide_get_drivedata(drive));
return ret;
}
......@@ -289,6 +304,7 @@ static const struct ide_port_ops sl82c105_port_ops = {
.set_pio_mode = sl82c105_set_pio_mode,
.set_dma_mode = sl82c105_set_dma_mode,
.resetproc = sl82c105_resetproc,
.test_irq = sl82c105_test_irq,
};
static const struct ide_dma_ops sl82c105_dma_ops = {
......
......@@ -44,7 +44,7 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
control |= 1; /* Programmable timing on */
if (drive->media == ide_disk)
control |= 4; /* Prefetch, post write */
if (pio > 2)
if (ide_pio_need_iordy(drive, pio))
control |= 2; /* IORDY */
if (is_slave) {
master_data |= 0x4000;
......
......@@ -800,6 +800,20 @@ static inline int ata_id_is_ssd(const u16 *id)
return id[ATA_ID_ROT_SPEED] == 0x01;
}
static inline int ata_id_pio_need_iordy(const u16 *id, const u8 pio)
{
/* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
if (pio > 4 && ata_id_is_cfa(id))
return 0;
/* For PIO3 and higher it is mandatory. */
if (pio > 2)
return 1;
/* Turn it on when possible. */
if (ata_id_has_iordy(id))
return 1;
return 0;
}
static inline int ata_drive_40wire(const u16 *dev_id)
{
if (ata_id_is_sata(dev_id))
......
......@@ -156,12 +156,6 @@ enum {
#define REQ_PARK_HEADS 0x22
#define REQ_UNPARK_HEADS 0x23
/*
* Check for an interrupt and acknowledge the interrupt status
*/
struct hwif_s;
typedef int (ide_ack_intr_t)(struct hwif_s *);
/*
* hwif_chipset_t is used to keep track of the specific hardware
* chipset used by each IDE interface, if known.
......@@ -185,7 +179,6 @@ struct ide_hw {
};
int irq; /* our irq number */
ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
struct device *dev, *parent;
unsigned long config;
};
......@@ -331,11 +324,6 @@ enum {
PC_FLAG_WRITING = (1 << 6),
};
/*
* With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
* This is used for several packet commands (not for READ/WRITE commands).
*/
#define IDE_PC_BUFFER_SIZE 64
#define ATAPI_WAIT_PC (60 * HZ)
struct ide_atapi_pc {
......@@ -347,12 +335,6 @@ struct ide_atapi_pc {
/* bytes to transfer */
int req_xfer;
/* bytes actually transferred */
int xferred;
/* data buffer */
u8 *buf;
int buf_size;
/* the corresponding request */
struct request *rq;
......@@ -363,8 +345,6 @@ struct ide_atapi_pc {
* those are more or less driver-specific and some of them are subject
* to change/removal later.
*/
u8 pc_buf[IDE_PC_BUFFER_SIZE];
unsigned long timeout;
};
......@@ -552,7 +532,7 @@ struct ide_drive_s {
unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
unsigned int cyl; /* "real" number of cyls */
unsigned int drive_data; /* used by set_pio_mode/dev_select() */
void *drive_data; /* used by set_pio_mode/dev_select() */
unsigned int failures; /* current failure count */
unsigned int max_failures; /* maximum allowed failure count */
u64 probed_capacity;/* initial/native media capacity */
......@@ -649,6 +629,7 @@ struct ide_port_ops {
void (*maskproc)(ide_drive_t *, int);
void (*quirkproc)(ide_drive_t *);
void (*clear_irq)(ide_drive_t *);
int (*test_irq)(struct hwif_s *);
u8 (*mdma_filter)(ide_drive_t *);
u8 (*udma_filter)(ide_drive_t *);
......@@ -674,6 +655,10 @@ struct ide_dma_ops {
u8 (*dma_sff_read_status)(struct hwif_s *);
};
enum {
IDE_PFLAG_PROBING = (1 << 0),
};
struct ide_host;
typedef struct hwif_s {
......@@ -690,6 +675,8 @@ typedef struct hwif_s {
ide_drive_t *devices[MAX_DRIVES + 1];
unsigned long port_flags;
u8 major; /* our major number */
u8 index; /* 0 for ide0; 1 for ide1; ... */
u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
......@@ -708,8 +695,6 @@ typedef struct hwif_s {
struct device *dev;
ide_ack_intr_t *ack_intr;
void (*rw_disk)(ide_drive_t *, struct request *);
const struct ide_tp_ops *tp_ops;
......@@ -1130,6 +1115,8 @@ void SELECT_MASK(ide_drive_t *, int);
u8 ide_read_error(ide_drive_t *);
void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
int ide_check_ireason(ide_drive_t *, struct request *, int, int, int);
int ide_check_atapi_device(ide_drive_t *, const char *);
void ide_init_pc(struct ide_atapi_pc *);
......@@ -1154,7 +1141,8 @@ enum {
REQ_IDETAPE_WRITE = (1 << 3),
};
int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *,
void *, unsigned int);
int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
......@@ -1524,6 +1512,7 @@ int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
int ide_scan_pio_blacklist(char *);
const char *ide_xfer_verbose(u8);
u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
int ide_pio_need_iordy(ide_drive_t *, const u8);
int ide_set_pio_mode(ide_drive_t *, u8);
int ide_set_dma_mode(ide_drive_t *, u8);
void ide_set_pio(ide_drive_t *, u8);
......@@ -1561,6 +1550,16 @@ static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
}
static inline void *ide_get_drivedata(ide_drive_t *drive)
{
return drive->drive_data;
}
static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
{
drive->drive_data = data;
}
#define ide_port_for_each_dev(i, dev, port) \
for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
......
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