Commit e77c32fe authored by David Daney's avatar David Daney Committed by Ralf Baechle

MIPS: Probe for presence of KScratch registers.

Probe c0_config4 for KScratch registers and report them in /proc/cpuinfo.
Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1877/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 487d70d0
...@@ -78,6 +78,7 @@ struct cpuinfo_mips { ...@@ -78,6 +78,7 @@ struct cpuinfo_mips {
unsigned int watch_reg_use_cnt; /* Usable by ptrace */ unsigned int watch_reg_use_cnt; /* Usable by ptrace */
#define NUM_WATCH_REGS 4 #define NUM_WATCH_REGS 4
u16 watch_reg_masks[NUM_WATCH_REGS]; u16 watch_reg_masks[NUM_WATCH_REGS];
unsigned int kscratch_mask; /* Usable KScratch mask. */
} __attribute__((aligned(SMP_CACHE_BYTES))); } __attribute__((aligned(SMP_CACHE_BYTES)));
extern struct cpuinfo_mips cpu_data[]; extern struct cpuinfo_mips cpu_data[];
......
...@@ -739,6 +739,8 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c) ...@@ -739,6 +739,8 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
&& cpu_has_tlb) && cpu_has_tlb)
c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40; c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;
c->kscratch_mask = (config4 >> 16) & 0xff;
return config4 & MIPS_CONF_M; return config4 & MIPS_CONF_M;
} }
......
...@@ -74,6 +74,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) ...@@ -74,6 +74,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
); );
seq_printf(m, "shadow register sets\t: %d\n", seq_printf(m, "shadow register sets\t: %d\n",
cpu_data[n].srsets); cpu_data[n].srsets);
seq_printf(m, "kscratch registers\t: %d\n",
hweight8(cpu_data[n].kscratch_mask));
seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
......
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