Commit e817e49f authored by Arnd Bergmann's avatar Arnd Bergmann

Merge branch 'tegra/cleanup' into next/dt

Dependency for tegra/dt
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 384703b8 f5ce5e7e
...@@ -18,20 +18,20 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o ...@@ -18,20 +18,20 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
obj-$(CONFIG_TEGRA_PCI) += pcie.o obj-$(CONFIG_TEGRA_PCI) += pcie.o
obj-$(CONFIG_USB_SUPPORT) += usb_phy.o obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-$(CONFIG_MACH_HARMONY) += board-harmony.o
obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o
obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o
obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o
obj-${CONFIG_MACH_PAZ00} += board-paz00.o obj-$(CONFIG_MACH_PAZ00) += board-paz00.o
obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o
obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o
obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o
obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o obj-$(CONFIG_MACH_TEGRA_DT) += board-dt.o
obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o
obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o
obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o
obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o
...@@ -15,7 +15,6 @@ ...@@ -15,7 +15,6 @@
#include <mach/iomap.h> #include <mach/iomap.h>
#include <mach/io.h> #include <mach/io.h>
#if defined(CONFIG_ARM_GIC)
#define HAVE_GET_IRQNR_PREAMBLE #define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S> #include <asm/hardware/entry-macro-gic.S>
...@@ -32,25 +31,3 @@ ...@@ -32,25 +31,3 @@
.macro arch_ret_to_user, tmp1, tmp2 .macro arch_ret_to_user, tmp1, tmp2
.endm .endm
#else
/* legacy interrupt controller for AP16 */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
@ enable imprecise aborts
cpsie a
@ EVP base at 0xf010f000
mov \base, #0xf0000000
orr \base, #0x00100000
orr \base, #0x0000f000
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
cmp \irqnr, #0x80
.endm
#endif
...@@ -28,10 +28,6 @@ ...@@ -28,10 +28,6 @@
#include "board.h" #include "board.h"
#define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE)
#define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE)
#define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ)
#define ICTLR_CPU_IEP_VFIQ 0x08 #define ICTLR_CPU_IEP_VFIQ 0x08
#define ICTLR_CPU_IEP_FIR 0x14 #define ICTLR_CPU_IEP_FIR 0x14
#define ICTLR_CPU_IEP_FIR_SET 0x18 #define ICTLR_CPU_IEP_FIR_SET 0x18
......
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