Commit e8722508 authored by Bjorn Helgaas's avatar Bjorn Helgaas

Merge branch 'pci/enumeration'

- Decode PCIe 64 GT/s link speed (Gustavo Pimentel)

- De-duplicate Device IDs in the driver dynamic IDs list (Zhenzhong Duan)

- Return u8 from pci_find_capability() and similar (Puranjay Mohan)

- Return u16 from pci_find_ext_capability() and similar (Bjorn Helgaas)

- Include both device and resource name in config space resources
  (Alexander Lobakin)

- Fix ACPI companion lookup for device 0 on the root bus (Rafael J.
  Wysocki)

* pci/enumeration:
  PCI/ACPI: Fix companion lookup for device 0 on the root bus
  PCI: Keep both device and resource name for config space remaps
  PCI: Return u16 from pci_find_ext_capability() and similar
  PCI: Return u8 from pci_find_capability() and similar
  PCI: Avoid duplicate IDs in driver dynamic IDs list
  PCI: Move pci_match_device() ahead of new_id_store()
  PCI: Decode PCIe 64 GT/s link speed
parents 1559c4b5 aa0b1574
...@@ -1162,14 +1162,34 @@ void acpi_pci_remove_bus(struct pci_bus *bus) ...@@ -1162,14 +1162,34 @@ void acpi_pci_remove_bus(struct pci_bus *bus)
static struct acpi_device *acpi_pci_find_companion(struct device *dev) static struct acpi_device *acpi_pci_find_companion(struct device *dev)
{ {
struct pci_dev *pci_dev = to_pci_dev(dev); struct pci_dev *pci_dev = to_pci_dev(dev);
struct acpi_device *adev;
bool check_children; bool check_children;
u64 addr; u64 addr;
check_children = pci_is_bridge(pci_dev); check_children = pci_is_bridge(pci_dev);
/* Please ref to ACPI spec for the syntax of _ADR */ /* Please ref to ACPI spec for the syntax of _ADR */
addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr, adev = acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
check_children); check_children);
/*
* There may be ACPI device objects in the ACPI namespace that are
* children of the device object representing the host bridge, but don't
* represent PCI devices. Both _HID and _ADR may be present for them,
* even though that is against the specification (for example, see
* Section 6.1 of ACPI 6.3), but in many cases the _ADR returns 0 which
* appears to indicate that they should not be taken into consideration
* as potential companions of PCI devices on the root bus.
*
* To catch this special case, disregard the returned device object if
* it has a valid _HID, addr is 0 and the PCI device at hand is on the
* root bus.
*/
if (adev && adev->pnp.type.platform_id && !addr &&
pci_is_root_bus(pci_dev->bus))
return NULL;
return adev;
} }
/** /**
......
...@@ -89,6 +89,79 @@ static void pci_free_dynids(struct pci_driver *drv) ...@@ -89,6 +89,79 @@ static void pci_free_dynids(struct pci_driver *drv)
spin_unlock(&drv->dynids.lock); spin_unlock(&drv->dynids.lock);
} }
/**
* pci_match_id - See if a PCI device matches a given pci_id table
* @ids: array of PCI device ID structures to search in
* @dev: the PCI device structure to match against.
*
* Used by a driver to check whether a PCI device is in its list of
* supported devices. Returns the matching pci_device_id structure or
* %NULL if there is no match.
*
* Deprecated; don't use this as it will not catch any dynamic IDs
* that a driver might want to check for.
*/
const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
struct pci_dev *dev)
{
if (ids) {
while (ids->vendor || ids->subvendor || ids->class_mask) {
if (pci_match_one_device(ids, dev))
return ids;
ids++;
}
}
return NULL;
}
EXPORT_SYMBOL(pci_match_id);
static const struct pci_device_id pci_device_id_any = {
.vendor = PCI_ANY_ID,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
};
/**
* pci_match_device - See if a device matches a driver's list of IDs
* @drv: the PCI driver to match against
* @dev: the PCI device structure to match against
*
* Used by a driver to check whether a PCI device is in its list of
* supported devices or in the dynids list, which may have been augmented
* via the sysfs "new_id" file. Returns the matching pci_device_id
* structure or %NULL if there is no match.
*/
static const struct pci_device_id *pci_match_device(struct pci_driver *drv,
struct pci_dev *dev)
{
struct pci_dynid *dynid;
const struct pci_device_id *found_id = NULL;
/* When driver_override is set, only bind to the matching driver */
if (dev->driver_override && strcmp(dev->driver_override, drv->name))
return NULL;
/* Look at the dynamic ids first, before the static ones */
spin_lock(&drv->dynids.lock);
list_for_each_entry(dynid, &drv->dynids.list, node) {
if (pci_match_one_device(&dynid->id, dev)) {
found_id = &dynid->id;
break;
}
}
spin_unlock(&drv->dynids.lock);
if (!found_id)
found_id = pci_match_id(drv->id_table, dev);
/* driver_override will always match, send a dummy id */
if (!found_id && dev->driver_override)
found_id = &pci_device_id_any;
return found_id;
}
/** /**
* store_new_id - sysfs frontend to pci_add_dynid() * store_new_id - sysfs frontend to pci_add_dynid()
* @driver: target device driver * @driver: target device driver
...@@ -125,7 +198,7 @@ static ssize_t new_id_store(struct device_driver *driver, const char *buf, ...@@ -125,7 +198,7 @@ static ssize_t new_id_store(struct device_driver *driver, const char *buf,
pdev->subsystem_device = subdevice; pdev->subsystem_device = subdevice;
pdev->class = class; pdev->class = class;
if (pci_match_id(pdrv->id_table, pdev)) if (pci_match_device(pdrv, pdev))
retval = -EEXIST; retval = -EEXIST;
kfree(pdev); kfree(pdev);
...@@ -208,78 +281,6 @@ static struct attribute *pci_drv_attrs[] = { ...@@ -208,78 +281,6 @@ static struct attribute *pci_drv_attrs[] = {
}; };
ATTRIBUTE_GROUPS(pci_drv); ATTRIBUTE_GROUPS(pci_drv);
/**
* pci_match_id - See if a pci device matches a given pci_id table
* @ids: array of PCI device id structures to search in
* @dev: the PCI device structure to match against.
*
* Used by a driver to check whether a PCI device present in the
* system is in its list of supported devices. Returns the matching
* pci_device_id structure or %NULL if there is no match.
*
* Deprecated, don't use this as it will not catch any dynamic ids
* that a driver might want to check for.
*/
const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
struct pci_dev *dev)
{
if (ids) {
while (ids->vendor || ids->subvendor || ids->class_mask) {
if (pci_match_one_device(ids, dev))
return ids;
ids++;
}
}
return NULL;
}
EXPORT_SYMBOL(pci_match_id);
static const struct pci_device_id pci_device_id_any = {
.vendor = PCI_ANY_ID,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
};
/**
* pci_match_device - Tell if a PCI device structure has a matching PCI device id structure
* @drv: the PCI driver to match against
* @dev: the PCI device structure to match against
*
* Used by a driver to check whether a PCI device present in the
* system is in its list of supported devices. Returns the matching
* pci_device_id structure or %NULL if there is no match.
*/
static const struct pci_device_id *pci_match_device(struct pci_driver *drv,
struct pci_dev *dev)
{
struct pci_dynid *dynid;
const struct pci_device_id *found_id = NULL;
/* When driver_override is set, only bind to the matching driver */
if (dev->driver_override && strcmp(dev->driver_override, drv->name))
return NULL;
/* Look at the dynamic ids first, before the static ones */
spin_lock(&drv->dynids.lock);
list_for_each_entry(dynid, &drv->dynids.list, node) {
if (pci_match_one_device(&dynid->id, dev)) {
found_id = &dynid->id;
break;
}
}
spin_unlock(&drv->dynids.lock);
if (!found_id)
found_id = pci_match_id(drv->id_table, dev);
/* driver_override will always match, send a dummy id */
if (!found_id && dev->driver_override)
found_id = &pci_device_id_any;
return found_id;
}
struct drv_dev_and_id { struct drv_dev_and_id {
struct pci_driver *drv; struct pci_driver *drv;
struct pci_dev *dev; struct pci_dev *dev;
......
...@@ -399,8 +399,8 @@ static int pci_dev_str_match(struct pci_dev *dev, const char *p, ...@@ -399,8 +399,8 @@ static int pci_dev_str_match(struct pci_dev *dev, const char *p,
return 1; return 1;
} }
static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn, static u8 __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
u8 pos, int cap, int *ttl) u8 pos, int cap, int *ttl)
{ {
u8 id; u8 id;
u16 ent; u16 ent;
...@@ -423,22 +423,22 @@ static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn, ...@@ -423,22 +423,22 @@ static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
return 0; return 0;
} }
static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, static u8 __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn,
u8 pos, int cap) u8 pos, int cap)
{ {
int ttl = PCI_FIND_CAP_TTL; int ttl = PCI_FIND_CAP_TTL;
return __pci_find_next_cap_ttl(bus, devfn, pos, cap, &ttl); return __pci_find_next_cap_ttl(bus, devfn, pos, cap, &ttl);
} }
int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap) u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap)
{ {
return __pci_find_next_cap(dev->bus, dev->devfn, return __pci_find_next_cap(dev->bus, dev->devfn,
pos + PCI_CAP_LIST_NEXT, cap); pos + PCI_CAP_LIST_NEXT, cap);
} }
EXPORT_SYMBOL_GPL(pci_find_next_capability); EXPORT_SYMBOL_GPL(pci_find_next_capability);
static int __pci_bus_find_cap_start(struct pci_bus *bus, static u8 __pci_bus_find_cap_start(struct pci_bus *bus,
unsigned int devfn, u8 hdr_type) unsigned int devfn, u8 hdr_type)
{ {
u16 status; u16 status;
...@@ -477,9 +477,9 @@ static int __pci_bus_find_cap_start(struct pci_bus *bus, ...@@ -477,9 +477,9 @@ static int __pci_bus_find_cap_start(struct pci_bus *bus,
* %PCI_CAP_ID_PCIX PCI-X * %PCI_CAP_ID_PCIX PCI-X
* %PCI_CAP_ID_EXP PCI Express * %PCI_CAP_ID_EXP PCI Express
*/ */
int pci_find_capability(struct pci_dev *dev, int cap) u8 pci_find_capability(struct pci_dev *dev, int cap)
{ {
int pos; u8 pos;
pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type); pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type);
if (pos) if (pos)
...@@ -502,10 +502,9 @@ EXPORT_SYMBOL(pci_find_capability); ...@@ -502,10 +502,9 @@ EXPORT_SYMBOL(pci_find_capability);
* device's PCI configuration space or 0 in case the device does not * device's PCI configuration space or 0 in case the device does not
* support it. * support it.
*/ */
int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap) u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
{ {
int pos; u8 hdr_type, pos;
u8 hdr_type;
pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type); pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type);
...@@ -528,11 +527,11 @@ EXPORT_SYMBOL(pci_bus_find_capability); ...@@ -528,11 +527,11 @@ EXPORT_SYMBOL(pci_bus_find_capability);
* not support it. Some capabilities can occur several times, e.g., the * not support it. Some capabilities can occur several times, e.g., the
* vendor-specific capability, and this provides a way to find them all. * vendor-specific capability, and this provides a way to find them all.
*/ */
int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap) u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 start, int cap)
{ {
u32 header; u32 header;
int ttl; int ttl;
int pos = PCI_CFG_SPACE_SIZE; u16 pos = PCI_CFG_SPACE_SIZE;
/* minimum 8 bytes per capability */ /* minimum 8 bytes per capability */
ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
...@@ -583,7 +582,7 @@ EXPORT_SYMBOL_GPL(pci_find_next_ext_capability); ...@@ -583,7 +582,7 @@ EXPORT_SYMBOL_GPL(pci_find_next_ext_capability);
* %PCI_EXT_CAP_ID_DSN Device Serial Number * %PCI_EXT_CAP_ID_DSN Device Serial Number
* %PCI_EXT_CAP_ID_PWR Power Budgeting * %PCI_EXT_CAP_ID_PWR Power Budgeting
*/ */
int pci_find_ext_capability(struct pci_dev *dev, int cap) u16 pci_find_ext_capability(struct pci_dev *dev, int cap)
{ {
return pci_find_next_ext_capability(dev, 0, cap); return pci_find_next_ext_capability(dev, 0, cap);
} }
...@@ -623,7 +622,7 @@ u64 pci_get_dsn(struct pci_dev *dev) ...@@ -623,7 +622,7 @@ u64 pci_get_dsn(struct pci_dev *dev)
} }
EXPORT_SYMBOL_GPL(pci_get_dsn); EXPORT_SYMBOL_GPL(pci_get_dsn);
static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) static u8 __pci_find_next_ht_cap(struct pci_dev *dev, u8 pos, int ht_cap)
{ {
int rc, ttl = PCI_FIND_CAP_TTL; int rc, ttl = PCI_FIND_CAP_TTL;
u8 cap, mask; u8 cap, mask;
...@@ -650,11 +649,12 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) ...@@ -650,11 +649,12 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
return 0; return 0;
} }
/** /**
* pci_find_next_ht_capability - query a device's Hypertransport capabilities * pci_find_next_ht_capability - query a device's HyperTransport capabilities
* @dev: PCI device to query * @dev: PCI device to query
* @pos: Position from which to continue searching * @pos: Position from which to continue searching
* @ht_cap: Hypertransport capability code * @ht_cap: HyperTransport capability code
* *
* To be used in conjunction with pci_find_ht_capability() to search for * To be used in conjunction with pci_find_ht_capability() to search for
* all capabilities matching @ht_cap. @pos should always be a value returned * all capabilities matching @ht_cap. @pos should always be a value returned
...@@ -663,26 +663,26 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) ...@@ -663,26 +663,26 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
* NB. To be 100% safe against broken PCI devices, the caller should take * NB. To be 100% safe against broken PCI devices, the caller should take
* steps to avoid an infinite loop. * steps to avoid an infinite loop.
*/ */
int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap) u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap)
{ {
return __pci_find_next_ht_cap(dev, pos + PCI_CAP_LIST_NEXT, ht_cap); return __pci_find_next_ht_cap(dev, pos + PCI_CAP_LIST_NEXT, ht_cap);
} }
EXPORT_SYMBOL_GPL(pci_find_next_ht_capability); EXPORT_SYMBOL_GPL(pci_find_next_ht_capability);
/** /**
* pci_find_ht_capability - query a device's Hypertransport capabilities * pci_find_ht_capability - query a device's HyperTransport capabilities
* @dev: PCI device to query * @dev: PCI device to query
* @ht_cap: Hypertransport capability code * @ht_cap: HyperTransport capability code
* *
* Tell if a device supports a given Hypertransport capability. * Tell if a device supports a given HyperTransport capability.
* Returns an address within the device's PCI configuration space * Returns an address within the device's PCI configuration space
* or 0 in case the device does not support the request capability. * or 0 in case the device does not support the request capability.
* The address points to the PCI capability, of type PCI_CAP_ID_HT, * The address points to the PCI capability, of type PCI_CAP_ID_HT,
* which has a Hypertransport capability matching @ht_cap. * which has a HyperTransport capability matching @ht_cap.
*/ */
int pci_find_ht_capability(struct pci_dev *dev, int ht_cap) u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap)
{ {
int pos; u8 pos;
pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type); pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type);
if (pos) if (pos)
...@@ -4195,7 +4195,14 @@ void __iomem *devm_pci_remap_cfg_resource(struct device *dev, ...@@ -4195,7 +4195,14 @@ void __iomem *devm_pci_remap_cfg_resource(struct device *dev,
} }
size = resource_size(res); size = resource_size(res);
name = res->name ?: dev_name(dev);
if (res->name)
name = devm_kasprintf(dev, GFP_KERNEL, "%s %s", dev_name(dev),
res->name);
else
name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
if (!name)
return IOMEM_ERR_PTR(-ENOMEM);
if (!devm_request_mem_region(dev, res->start, size, name)) { if (!devm_request_mem_region(dev, res->start, size, name)) {
dev_err(dev, "can't request region for resource %pR\n", res); dev_err(dev, "can't request region for resource %pR\n", res);
......
...@@ -294,7 +294,8 @@ void pci_bus_put(struct pci_bus *bus); ...@@ -294,7 +294,8 @@ void pci_bus_put(struct pci_bus *bus);
/* PCIe link information from Link Capabilities 2 */ /* PCIe link information from Link Capabilities 2 */
#define PCIE_LNKCAP2_SLS2SPEED(lnkcap2) \ #define PCIE_LNKCAP2_SLS2SPEED(lnkcap2) \
((lnkcap2) & PCI_EXP_LNKCAP2_SLS_32_0GB ? PCIE_SPEED_32_0GT : \ ((lnkcap2) & PCI_EXP_LNKCAP2_SLS_64_0GB ? PCIE_SPEED_64_0GT : \
(lnkcap2) & PCI_EXP_LNKCAP2_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
(lnkcap2) & PCI_EXP_LNKCAP2_SLS_16_0GB ? PCIE_SPEED_16_0GT : \ (lnkcap2) & PCI_EXP_LNKCAP2_SLS_16_0GB ? PCIE_SPEED_16_0GT : \
(lnkcap2) & PCI_EXP_LNKCAP2_SLS_8_0GB ? PCIE_SPEED_8_0GT : \ (lnkcap2) & PCI_EXP_LNKCAP2_SLS_8_0GB ? PCIE_SPEED_8_0GT : \
(lnkcap2) & PCI_EXP_LNKCAP2_SLS_5_0GB ? PCIE_SPEED_5_0GT : \ (lnkcap2) & PCI_EXP_LNKCAP2_SLS_5_0GB ? PCIE_SPEED_5_0GT : \
...@@ -303,7 +304,8 @@ void pci_bus_put(struct pci_bus *bus); ...@@ -303,7 +304,8 @@ void pci_bus_put(struct pci_bus *bus);
/* PCIe speed to Mb/s reduced by encoding overhead */ /* PCIe speed to Mb/s reduced by encoding overhead */
#define PCIE_SPEED2MBS_ENC(speed) \ #define PCIE_SPEED2MBS_ENC(speed) \
((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \ ((speed) == PCIE_SPEED_64_0GT ? 64000*128/130 : \
(speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \
(speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ (speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \
(speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \
(speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \
......
...@@ -677,7 +677,7 @@ const unsigned char pcie_link_speed[] = { ...@@ -677,7 +677,7 @@ const unsigned char pcie_link_speed[] = {
PCIE_SPEED_8_0GT, /* 3 */ PCIE_SPEED_8_0GT, /* 3 */
PCIE_SPEED_16_0GT, /* 4 */ PCIE_SPEED_16_0GT, /* 4 */
PCIE_SPEED_32_0GT, /* 5 */ PCIE_SPEED_32_0GT, /* 5 */
PCI_SPEED_UNKNOWN, /* 6 */ PCIE_SPEED_64_0GT, /* 6 */
PCI_SPEED_UNKNOWN, /* 7 */ PCI_SPEED_UNKNOWN, /* 7 */
PCI_SPEED_UNKNOWN, /* 8 */ PCI_SPEED_UNKNOWN, /* 8 */
PCI_SPEED_UNKNOWN, /* 9 */ PCI_SPEED_UNKNOWN, /* 9 */
...@@ -719,6 +719,7 @@ const char *pci_speed_string(enum pci_bus_speed speed) ...@@ -719,6 +719,7 @@ const char *pci_speed_string(enum pci_bus_speed speed)
"8.0 GT/s PCIe", /* 0x16 */ "8.0 GT/s PCIe", /* 0x16 */
"16.0 GT/s PCIe", /* 0x17 */ "16.0 GT/s PCIe", /* 0x17 */
"32.0 GT/s PCIe", /* 0x18 */ "32.0 GT/s PCIe", /* 0x18 */
"64.0 GT/s PCIe", /* 0x19 */
}; };
if (speed < ARRAY_SIZE(speed_strings)) if (speed < ARRAY_SIZE(speed_strings))
......
...@@ -281,6 +281,7 @@ enum pci_bus_speed { ...@@ -281,6 +281,7 @@ enum pci_bus_speed {
PCIE_SPEED_8_0GT = 0x16, PCIE_SPEED_8_0GT = 0x16,
PCIE_SPEED_16_0GT = 0x17, PCIE_SPEED_16_0GT = 0x17,
PCIE_SPEED_32_0GT = 0x18, PCIE_SPEED_32_0GT = 0x18,
PCIE_SPEED_64_0GT = 0x19,
PCI_SPEED_UNKNOWN = 0xff, PCI_SPEED_UNKNOWN = 0xff,
}; };
...@@ -380,7 +381,7 @@ struct pci_dev { ...@@ -380,7 +381,7 @@ struct pci_dev {
struct pcie_link_state *link_state; /* ASPM link state */ struct pcie_link_state *link_state; /* ASPM link state */
unsigned int ltr_path:1; /* Latency Tolerance Reporting unsigned int ltr_path:1; /* Latency Tolerance Reporting
supported from root to here */ supported from root to here */
int l1ss; /* L1SS Capability pointer */ u16 l1ss; /* L1SS Capability pointer */
#endif #endif
unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */ unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
...@@ -1063,12 +1064,13 @@ void pci_sort_breadthfirst(void); ...@@ -1063,12 +1064,13 @@ void pci_sort_breadthfirst(void);
/* Generic PCI functions exported to card drivers */ /* Generic PCI functions exported to card drivers */
int pci_find_capability(struct pci_dev *dev, int cap); u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); u8 pci_find_capability(struct pci_dev *dev, int cap);
int pci_find_ext_capability(struct pci_dev *dev, int cap); u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap);
int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); u16 pci_find_ext_capability(struct pci_dev *dev, int cap);
u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap);
struct pci_bus *pci_find_next_bus(const struct pci_bus *from); struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
u64 pci_get_dsn(struct pci_dev *dev); u64 pci_get_dsn(struct pci_dev *dev);
...@@ -1279,7 +1281,6 @@ void set_pcie_port_type(struct pci_dev *pdev); ...@@ -1279,7 +1281,6 @@ void set_pcie_port_type(struct pci_dev *pdev);
void set_pcie_hotplug_bridge(struct pci_dev *pdev); void set_pcie_hotplug_bridge(struct pci_dev *pdev);
/* Functions for PCI Hotplug drivers to use */ /* Functions for PCI Hotplug drivers to use */
int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
unsigned int pci_rescan_bus(struct pci_bus *bus); unsigned int pci_rescan_bus(struct pci_bus *bus);
void pci_lock_rescan_remove(void); void pci_lock_rescan_remove(void);
...@@ -1719,7 +1720,7 @@ static inline int __pci_register_driver(struct pci_driver *drv, ...@@ -1719,7 +1720,7 @@ static inline int __pci_register_driver(struct pci_driver *drv,
static inline int pci_register_driver(struct pci_driver *drv) static inline int pci_register_driver(struct pci_driver *drv)
{ return 0; } { return 0; }
static inline void pci_unregister_driver(struct pci_driver *drv) { } static inline void pci_unregister_driver(struct pci_driver *drv) { }
static inline int pci_find_capability(struct pci_dev *dev, int cap) static inline u8 pci_find_capability(struct pci_dev *dev, int cap)
{ return 0; } { return 0; }
static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
int cap) int cap)
......
...@@ -531,6 +531,7 @@ ...@@ -531,6 +531,7 @@
#define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */ #define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */
#define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */ #define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */
#define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 */ #define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 */
#define PCI_EXP_LNKCAP_SLS_64_0GB 0x00000006 /* LNKCAP2 SLS Vector bit 5 */
#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ #define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* ASPM L0s Support */ #define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* ASPM L0s Support */
...@@ -562,6 +563,7 @@ ...@@ -562,6 +563,7 @@
#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ #define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
#define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */ #define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */
#define PCI_EXP_LNKSTA_CLS_32_0GB 0x0005 /* Current Link Speed 32.0GT/s */ #define PCI_EXP_LNKSTA_CLS_32_0GB 0x0005 /* Current Link Speed 32.0GT/s */
#define PCI_EXP_LNKSTA_CLS_64_0GB 0x0006 /* Current Link Speed 64.0GT/s */
#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ #define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
#define PCI_EXP_LNKSTA_NLW_X1 0x0010 /* Current Link Width x1 */ #define PCI_EXP_LNKSTA_NLW_X1 0x0010 /* Current Link Width x1 */
#define PCI_EXP_LNKSTA_NLW_X2 0x0020 /* Current Link Width x2 */ #define PCI_EXP_LNKSTA_NLW_X2 0x0020 /* Current Link Width x2 */
...@@ -670,6 +672,7 @@ ...@@ -670,6 +672,7 @@
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */ #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */ #define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */
#define PCI_EXP_LNKCAP2_SLS_32_0GB 0x00000020 /* Supported Speed 32GT/s */ #define PCI_EXP_LNKCAP2_SLS_32_0GB 0x00000020 /* Supported Speed 32GT/s */
#define PCI_EXP_LNKCAP2_SLS_64_0GB 0x00000040 /* Supported Speed 64GT/s */
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */ #define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ #define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
#define PCI_EXP_LNKCTL2_TLS 0x000f #define PCI_EXP_LNKCTL2_TLS 0x000f
...@@ -678,6 +681,7 @@ ...@@ -678,6 +681,7 @@
#define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */ #define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */
#define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */ #define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */
#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */ #define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */
#define PCI_EXP_LNKCTL2_TLS_64_0GT 0x0006 /* Supported Speed 64GT/s */
#define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010 /* Enter Compliance */ #define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010 /* Enter Compliance */
#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380 /* Transmit Margin */ #define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380 /* Transmit Margin */
#define PCI_EXP_LNKCTL2_HASD 0x0020 /* HW Autonomous Speed Disable */ #define PCI_EXP_LNKCTL2_HASD 0x0020 /* HW Autonomous Speed Disable */
......
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