Commit e8ba4922 authored by Colin Ian King's avatar Colin Ian King Committed by Alex Deucher

drm/amdgpu: sdma: clean up identation

There is a statement that is indented incorrectly. Clean it up.
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarColin Ian King <colin.king@canonical.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9ae807f0
...@@ -375,10 +375,10 @@ static void sdma_v5_2_ring_emit_ib(struct amdgpu_ring *ring, ...@@ -375,10 +375,10 @@ static void sdma_v5_2_ring_emit_ib(struct amdgpu_ring *ring,
*/ */
static void sdma_v5_2_ring_emit_mem_sync(struct amdgpu_ring *ring) static void sdma_v5_2_ring_emit_mem_sync(struct amdgpu_ring *ring)
{ {
uint32_t gcr_cntl = uint32_t gcr_cntl = SDMA_GCR_GL2_INV | SDMA_GCR_GL2_WB |
SDMA_GCR_GL2_INV | SDMA_GCR_GL2_WB | SDMA_GCR_GLM_INV | SDMA_GCR_GLM_INV | SDMA_GCR_GL1_INV |
SDMA_GCR_GL1_INV | SDMA_GCR_GLV_INV | SDMA_GCR_GLK_INV | SDMA_GCR_GLV_INV | SDMA_GCR_GLK_INV |
SDMA_GCR_GLI_INV(1); SDMA_GCR_GLI_INV(1);
/* flush entire cache L0/L1/L2, this can be optimized by performance requirement */ /* flush entire cache L0/L1/L2, this can be optimized by performance requirement */
amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ)); amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ));
......
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