Commit e9dd54da authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
  sparc32: pass -m32 when building vmlinux.lds
  sparc: Fixes the DRM layer build on sparc.
  ide: merge <asm-sparc/ide_64.h> with <asm-sparc/ide_32.h>
  ide: <asm-sparc/ide_64.h>: use __raw_{read,write}w()
  ide: <asm-sparc/ide_32.h>: use __raw_{read,write}w()
  ide: <asm-sparc/ide_64.h>: use %r0 for outw_be()
  sparc64: Do not define BIO_VMERGE_BOUNDARY.
parents 0988c37c 4a0a0889
...@@ -18,6 +18,7 @@ CHECKFLAGS += -D__sparc__ ...@@ -18,6 +18,7 @@ CHECKFLAGS += -D__sparc__
#KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7 #KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7
KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7 KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7
KBUILD_AFLAGS += -m32 KBUILD_AFLAGS += -m32
CPPFLAGS_vmlinux.lds += -m32
#LDFLAGS_vmlinux = -N -Ttext 0xf0004000 #LDFLAGS_vmlinux = -N -Ttext 0xf0004000
# Since 2.5.40, the first stage is left not btfix-ed. # Since 2.5.40, the first stage is left not btfix-ed.
......
#ifndef ___ASM_SPARC_IDE_H /* ide.h: SPARC PCI specific IDE glue.
#define ___ASM_SPARC_IDE_H *
#if defined(__sparc__) && defined(__arch64__) * Copyright (C) 1997 David S. Miller (davem@davemloft.net)
#include <asm-sparc/ide_64.h> * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
* Adaptation from sparc64 version to sparc by Pete Zaitcev.
*/
#ifndef _SPARC_IDE_H
#define _SPARC_IDE_H
#ifdef __KERNEL__
#include <asm/io.h>
#ifdef CONFIG_SPARC64
#include <asm/pgalloc.h>
#include <asm/spitfire.h>
#include <asm/cacheflush.h>
#include <asm/page.h>
#else #else
#include <asm-sparc/ide_32.h> #include <asm/pgtable.h>
#include <asm/psr.h>
#endif #endif
#undef MAX_HWIFS
#define MAX_HWIFS 2
#define __ide_insl(data_reg, buffer, wcount) \
__ide_insw(data_reg, buffer, (wcount)<<1)
#define __ide_outsl(data_reg, buffer, wcount) \
__ide_outsw(data_reg, buffer, (wcount)<<1)
/* On sparc, I/O ports and MMIO registers are accessed identically. */
#define __ide_mm_insw __ide_insw
#define __ide_mm_insl __ide_insl
#define __ide_mm_outsw __ide_outsw
#define __ide_mm_outsl __ide_outsl
static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
{
#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
unsigned long end = (unsigned long)dst + (count << 1);
#endif #endif
u16 *ps = dst;
u32 *pi;
if(((unsigned long)ps) & 0x2) {
*ps++ = __raw_readw(port);
count--;
}
pi = (u32 *)ps;
while(count >= 2) {
u32 w;
w = __raw_readw(port) << 16;
w |= __raw_readw(port);
*pi++ = w;
count -= 2;
}
ps = (u16 *)pi;
if(count)
*ps++ = __raw_readw(port);
#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
__flush_dcache_range((unsigned long)dst, end);
#endif
}
static inline void __ide_outsw(void __iomem *port, const void *src, u32 count)
{
#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
unsigned long end = (unsigned long)src + (count << 1);
#endif
const u16 *ps = src;
const u32 *pi;
if(((unsigned long)src) & 0x2) {
__raw_writew(*ps++, port);
count--;
}
pi = (const u32 *)ps;
while(count >= 2) {
u32 w;
w = *pi++;
__raw_writew((w >> 16), port);
__raw_writew(w, port);
count -= 2;
}
ps = (const u16 *)pi;
if(count)
__raw_writew(*ps, port);
#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
__flush_dcache_range((unsigned long)src, end);
#endif
}
#endif /* __KERNEL__ */
#endif /* _SPARC_IDE_H */
/* ide.h: SPARC PCI specific IDE glue.
*
* Copyright (C) 1997 David S. Miller (davem@davemloft.net)
* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
* Adaptation from sparc64 version to sparc by Pete Zaitcev.
*/
#ifndef _SPARC_IDE_H
#define _SPARC_IDE_H
#ifdef __KERNEL__
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/psr.h>
#undef MAX_HWIFS
#define MAX_HWIFS 2
#define __ide_insl(data_reg, buffer, wcount) \
__ide_insw(data_reg, buffer, (wcount)<<1)
#define __ide_outsl(data_reg, buffer, wcount) \
__ide_outsw(data_reg, buffer, (wcount)<<1)
/* On sparc, I/O ports and MMIO registers are accessed identically. */
#define __ide_mm_insw __ide_insw
#define __ide_mm_insl __ide_insl
#define __ide_mm_outsw __ide_outsw
#define __ide_mm_outsl __ide_outsl
static inline void __ide_insw(unsigned long port,
void *dst,
unsigned long count)
{
volatile unsigned short *data_port;
/* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */
u16 *ps = dst;
u32 *pi;
data_port = (volatile unsigned short *)port;
if(((unsigned long)ps) & 0x2) {
*ps++ = *data_port;
count--;
}
pi = (u32 *)ps;
while(count >= 2) {
u32 w;
w = (*data_port) << 16;
w |= (*data_port);
*pi++ = w;
count -= 2;
}
ps = (u16 *)pi;
if(count)
*ps++ = *data_port;
/* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */
}
static inline void __ide_outsw(unsigned long port,
const void *src,
unsigned long count)
{
volatile unsigned short *data_port;
/* unsigned long end = (unsigned long)src + (count << 1); */
const u16 *ps = src;
const u32 *pi;
data_port = (volatile unsigned short *)port;
if(((unsigned long)src) & 0x2) {
*data_port = *ps++;
count--;
}
pi = (const u32 *)ps;
while(count >= 2) {
u32 w;
w = *pi++;
*data_port = (w >> 16);
*data_port = w;
count -= 2;
}
ps = (const u16 *)pi;
if(count)
*data_port = *ps;
/* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
}
#endif /* __KERNEL__ */
#endif /* _SPARC_IDE_H */
/*
* ide.h: Ultra/PCI specific IDE glue.
*
* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
*/
#ifndef _SPARC64_IDE_H
#define _SPARC64_IDE_H
#ifdef __KERNEL__
#include <asm/pgalloc.h>
#include <asm/io.h>
#include <asm/spitfire.h>
#include <asm/cacheflush.h>
#include <asm/page.h>
#ifndef MAX_HWIFS
# ifdef CONFIG_BLK_DEV_IDEPCI
#define MAX_HWIFS 10
# else
#define MAX_HWIFS 2
# endif
#endif
#define __ide_insl(data_reg, buffer, wcount) \
__ide_insw(data_reg, buffer, (wcount)<<1)
#define __ide_outsl(data_reg, buffer, wcount) \
__ide_outsw(data_reg, buffer, (wcount)<<1)
/* On sparc64, I/O ports and MMIO registers are accessed identically. */
#define __ide_mm_insw __ide_insw
#define __ide_mm_insl __ide_insl
#define __ide_mm_outsw __ide_outsw
#define __ide_mm_outsl __ide_outsl
static inline unsigned int inw_be(void __iomem *addr)
{
unsigned int ret;
__asm__ __volatile__("lduha [%1] %2, %0"
: "=r" (ret)
: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
return ret;
}
static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
{
#ifdef DCACHE_ALIASING_POSSIBLE
unsigned long end = (unsigned long)dst + (count << 1);
#endif
u16 *ps = dst;
u32 *pi;
if(((u64)ps) & 0x2) {
*ps++ = inw_be(port);
count--;
}
pi = (u32 *)ps;
while(count >= 2) {
u32 w;
w = inw_be(port) << 16;
w |= inw_be(port);
*pi++ = w;
count -= 2;
}
ps = (u16 *)pi;
if(count)
*ps++ = inw_be(port);
#ifdef DCACHE_ALIASING_POSSIBLE
__flush_dcache_range((unsigned long)dst, end);
#endif
}
static inline void outw_be(unsigned short w, void __iomem *addr)
{
__asm__ __volatile__("stha %0, [%1] %2"
: /* no outputs */
: "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}
static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
{
#ifdef DCACHE_ALIASING_POSSIBLE
unsigned long end = (unsigned long)src + (count << 1);
#endif
const u16 *ps = src;
const u32 *pi;
if(((u64)src) & 0x2) {
outw_be(*ps++, port);
count--;
}
pi = (const u32 *)ps;
while(count >= 2) {
u32 w;
w = *pi++;
outw_be((w >> 16), port);
outw_be(w, port);
count -= 2;
}
ps = (const u16 *)pi;
if(count)
outw_be(*ps, port);
#ifdef DCACHE_ALIASING_POSSIBLE
__flush_dcache_range((unsigned long)src, end);
#endif
}
#endif /* __KERNEL__ */
#endif /* _SPARC64_IDE_H */
...@@ -244,6 +244,7 @@ _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) ...@@ -244,6 +244,7 @@ _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
*/ */
extern void __iomem *ioremap(unsigned long offset, unsigned long size); extern void __iomem *ioremap(unsigned long offset, unsigned long size);
#define ioremap_nocache(X,Y) ioremap((X),(Y)) #define ioremap_nocache(X,Y) ioremap((X),(Y))
#define ioremap_wc(X,Y) ioremap((X),(Y))
extern void iounmap(volatile void __iomem *addr); extern void iounmap(volatile void __iomem *addr);
#define ioread8(X) readb(X) #define ioread8(X) readb(X)
......
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
/* BIO layer definitions. */ /* BIO layer definitions. */
extern unsigned long kern_base, kern_size; extern unsigned long kern_base, kern_size;
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
#define BIO_VMERGE_BOUNDARY 8192
static inline u8 _inb(unsigned long addr) static inline u8 _inb(unsigned long addr)
{ {
...@@ -461,6 +460,7 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size) ...@@ -461,6 +460,7 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
} }
#define ioremap_nocache(X,Y) ioremap((X),(Y)) #define ioremap_nocache(X,Y) ioremap((X),(Y))
#define ioremap_wc(X,Y) ioremap((X),(Y))
static inline void iounmap(volatile void __iomem *addr) static inline void iounmap(volatile void __iomem *addr)
{ {
......
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